Home
last modified time | relevance | path

Searched +full:gpio +full:- +full:lvl (Results 1 – 25 of 43) sorted by relevance

12

/openbmc/u-boot/drivers/gpio/
H A Dintel_ich6_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
7 * This is a GPIO driver for Intel ICH6 and later. The x86 GPIOs are accessed
9 * consisting of a standard header and a device-specific set of registers. PCI
17 * PCI I/O space + [GPIOBASE] => start of GPIO registers
18 * GPIO registers => gpio pin function, direction, value
21 * Danger Will Robinson! Bank 0 (GPIOs 0-31) seems to be fairly stable. Most
36 #include <asm/gpio.h>
48 uint16_t lvl; member
62 if (bank->use_lvl_write_cache) in _ich6_gpio_set_value()
63 val = bank->lvl_write_cache; in _ich6_gpio_set_value()
[all …]
/openbmc/u-boot/arch/x86/dts/
H A Dminnowmax.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include <asm/arch-baytrail/fsp/fsp_configs.h>
9 #include <dt-bindings/gpio/x86-gpio.h>
10 #include <dt-bindings/interrupt-router/intel-irq.h>
32 compatible = "intel,x86-pinctrl";
35 /* GPIO E0 */
37 gpio-offset = <0x80 0>;
38 mode-gpio;
39 output-value = <0>;
[all …]
H A Dbayleybay.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include <asm/arch-baytrail/fsp/fsp_configs.h>
9 #include <dt-bindings/gpio/x86-gpio.h>
10 #include <dt-bindings/interrupt-router/intel-irq.h>
33 stdout-path = "/serial";
37 #address-cells = <1>;
38 #size-cells = <0>;
42 compatible = "intel,baytrail-cpu";
44 intel,apic-id = <0>;
[all …]
H A Dbaytrail_som-db5800-som-6867.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include <asm/arch-baytrail/fsp/fsp_configs.h>
10 #include <dt-bindings/gpio/x86-gpio.h>
11 #include <dt-bindings/interrupt-router/intel-irq.h>
20 model = "Advantech SOM-DB5800-SOM-6867";
21 compatible = "advantech,som-db5800-som-6867", "intel,baytrail";
33 compatible = "intel,x86-pinctrl";
38 pad-offset = <0x220>;
39 mode-func = <2>;
[all …]
H A Ddfi-bt700.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 #include <asm/arch-baytrail/fsp/fsp_configs.h>
8 #include <dt-bindings/gpio/x86-gpio.h>
9 #include <dt-bindings/interrupt-router/intel-irq.h>
22 compatible = "intel,x86-pinctrl";
25 /* Add UART1 PAD configuration (SIO HS-UART) */
27 pad-offset = <0x10>;
28 mode-func = <1>;
32 pad-offset = <0x20>;
33 mode-func = <1>;
[all …]
H A Dconga-qeval20-qa3-e3845.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include <asm/arch-baytrail/fsp/fsp_configs.h>
10 #include <dt-bindings/gpio/x86-gpio.h>
11 #include <dt-bindings/interrupt-router/intel-irq.h>
20 model = "congatec-QEVAL20-QA3-E3845";
21 compatible = "congatec,qeval20-qa3-e3845", "intel,baytrail";
33 compatible = "intel,x86-pinctrl";
40 * the pin to work in GPIO mode, which causes card detect
47 pad-offset = <0x3a0>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dcs42l52.txt5 - compatible : "cirrus,cs42l52"
7 - reg : the I2C address of the device for I2C
11 - cirrus,reset-gpio : GPIO controller's phandle and the number
12 of the GPIO used to reset the codec.
14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
21 - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
23 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
25 - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
27 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
29 - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin
[all …]
H A Dcs42l56.txt5 - compatible : "cirrus,cs42l56"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VCP-supply, VLDO-supply : power supplies for the device,
14 - cirrus,gpio-nreset : GPIO controller's phandle and the number
15 of the GPIO used to reset the codec.
17 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
24 - cirrus,ain1a-ref-cfg, ain1b-ref-cfg : boolean, If present, AIN1A or AIN1B are configured
25 as a pseudo-differential input referenced to AIN1REF/AIN3A.
27 - cirrus,ain2a-ref-cfg, ain2b-ref-cfg : boolean, If present, AIN2A or AIN2B are configured
28 as a pseudo-differential input referenced to AIN2REF/AIN3B.
[all …]
H A Dcs53l30.txt5 - compatible : "cirrus,cs53l30"
7 - reg : the I2C address of the device
9 - VA-supply, VP-supply : power supplies for the device,
14 - reset-gpios : a GPIO spec for the reset pin.
16 - mute-gpios : a GPIO spec for the MUTE pin. The active state can be either
20 - cirrus,micbias-lvl : Set the output voltage level on the MICBIAS Pin.
21 0 = Hi-Z
25 - cirrus,use-sdout2 : This is a boolean property. If present, it indicates
29 * CS53l30 supports 4-channel data output in the same
31 * 1) Normal I2S mode on two data pins -- each SDOUT
[all …]
H A Dcirrus,cs35l45.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
11 - Richard Fitzgerald <rf@opensource.cirrus.com>
18 - $ref: dai-common.yaml#
23 - cirrus,cs35l45
28 '#sound-dai-cells':
31 reset-gpios:
34 vdd-a-supply:
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm8450-sony-xperia-nagara.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 /delete-node/ &adsp_mem;
17 /delete-node/ &rmtfs_mem;
18 /delete-node/ &video_mem;
21 chassis-type = "handset";
28 stdout-path = "serial0:115200n8";
31 gpio-keys {
32 compatible = "gpio-keys";
[all …]
H A Dsm8350-sony-xperia-sagami.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
18 * Yes, you are correct, there is NO MORE {msm,board,pmic}-id on SM8350!
24 chassis-type = "handset";
27 #address-cells = <2>;
28 #size-cells = <2>;
32 compatible = "simple-framebuffer";
35 /* The display, even though it's 4K, initializes at 1080-ish p */
49 gpio-keys {
[all …]
H A Dsm8250-sony-xperia-edo.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 /delete-node/ &adsp_mem;
14 /delete-node/ &spss_mem;
15 /delete-node/ &cdsp_secure_heap;
18 qcom,msm-id = <356 0x20001>; /* SM8250 v2.1 */
19 qcom,board-id = <0x10008 0>;
22 #address-cells = <2>;
23 #size-cells = <2>;
27 compatible = "simple-framebuffer";
[all …]
H A Dsm8250-xiaomi-elish-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/arm/qcom,ids.h>
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
19 /delete-node/ &adsp_mem;
20 /delete-node/ &cdsp_secure_heap;
21 /delete-node/ &slpi_mem;
22 /delete-node/ &spss_mem;
23 /delete-node/ &xbl_aop_mem;
26 classis-type = "tablet";
[all …]
H A Dmsm8916-huawei-g7.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "msm8916-pm8916.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/sound/apq8016-lpass.h>
16 * Note: The original firmware from Huawei can only boot 32-bit kernels.
17 * To boot this device tree using arm64 it is necessary to flash 64-bit TZ/HYP
[all …]
/openbmc/linux/drivers/media/common/siano/
H A Dsms-cards.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Card-specific functions for the Siano SMS1xxx USB dongle
8 #include "sms-cards.h"
45 .name = "Hauppauge Okemo-A",
51 .name = "Hauppauge Okemo-B",
86 .lna_ctrl = -1,
134 .name = "Siano Denver (ATSC-M/H) Digital Receiver",
161 p_gpio_config->direction = SMS_GPIO_DIRECTION_OUTPUT; in sms_gpio_assign_11xx_default_led_config()
162 p_gpio_config->inputcharacteristics = in sms_gpio_assign_11xx_default_led_config()
164 p_gpio_config->outputdriving = SMS_GPIO_OUTPUTDRIVING_4mA; in sms_gpio_assign_11xx_default_led_config()
[all …]
/openbmc/linux/include/dt-bindings/sound/
H A Dcs35l45.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header
12 * cirrus,asp-sdout-hiz-ctrl
14 * TX_HIZ_UNUSED: TX pin high-impedance during unused slots.
15 * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled.
21 * Optional GPIOX Sub-nodes:
22 * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])
23 * sub-nodes for configuring the GPIO pins.
25 * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'
30 * - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0.
[all …]
/openbmc/linux/drivers/media/usb/cx231xx/
H A Dcx231xx-i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 cx231xx-i2c.c - driver for Conexant Cx23100/101/102 USB video capture devices
15 #include <linux/i2c-mux.h>
16 #include <media/v4l2-common.h>
20 /* ----------------------------------------------------------- */
30 #define dprintk1(lvl, fmt, args...) \ argument
32 if (i2c_debug >= lvl) { \
37 #define dprintk2(lvl, fmt, args...) \ argument
39 if (i2c_debug >= lvl) { \
41 dev->name, __func__ , ##args); \
[all …]
/openbmc/linux/drivers/media/pci/cx23885/
H A Dcx23885-f300.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * TBS 6920 PCIe DVB-S2 cards.
8 * Microcontroller connected to cx23885 GPIO pins:
9 * GPIO0 - data - P0.3 F300
10 * GPIO1 - reset - P0.2 F300
11 * GPIO2 - clk - P0.1 F300
12 * GPIO3 - busy - P0.0 F300
18 #include "cx23885-f300.h"
25 static void f300_set_line(struct cx23885_dev *dev, u32 line, u8 lvl) in f300_set_line() argument
28 if (lvl == 1) in f300_set_line()
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-tegra/gpio.c
6 * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved.
17 #include <linux/gpio/driver.h>
31 #define GPIO_REG(tgi, x) (GPIO_BANK(x) * tgi->soc->bank_stride + \
45 #define GPIO_MSK_CNF(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x00)
46 #define GPIO_MSK_OE(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x10)
47 #define GPIO_MSK_OUT(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0X20)
48 #define GPIO_MSK_DBC_EN(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x30)
49 #define GPIO_MSK_INT_STA(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x40)
[all …]
H A Dgpio-ich.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver
9 #include <linux/gpio/driver.h>
18 * GPIO register offsets in GPIO I/O space.
22 * number in that register. For example, to read the value of GPIO bit 50
34 {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */
35 {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */
36 {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */
54 #define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start)
55 #define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start)
[all …]
/openbmc/linux/sound/soc/codecs/
H A Darizona-jack.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * extcon-arizona.c - Extcon driver Wolfson Arizona devices
5 * Copyright (C) 2012-2014 Wolfson Microelectronics plc
13 #include <linux/gpio/consumer.h>
14 #include <linux/gpio.h>
26 #include <dt-bindings/mfd/arizona.h>
33 * The hardware supports 8 ranges / buttons, but the snd-jack interface
34 * only supports 6 buttons (button 0-5).
100 struct arizona *arizona = info->arizona; in arizona_extcon_hp_clamp()
105 switch (arizona->type) { in arizona_extcon_hp_clamp()
[all …]
/openbmc/linux/drivers/media/pci/saa7164/
H A Dsaa7164-api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
22 i->deviceinst = 0; in saa7164_api_get_load_info()
23 i->devicespec = 0; in saa7164_api_get_load_info()
24 i->mode = 0; in saa7164_api_get_load_info()
25 i->status = 0; in saa7164_api_get_load_info()
32 printk(KERN_INFO "saa7164[%d]-CPU: %d percent", dev->nr, i->CPULoad); in saa7164_api_get_load_info()
45 while (more--) { in saa7164_api_collect_debug()
58 printk(KERN_INFO "saa7164[%d]-FWMSG: %s", dev->nr, in saa7164_api_collect_debug()
67 struct tmComResDebugSetLevel lvl; in saa7164_api_set_debug() local
[all …]
/openbmc/linux/drivers/pcmcia/
H A Dsoc_common.c4 integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
35 #include <linux/gpio.h>
36 #include <linux/gpio/consumer.h>
61 int lvl, const char *fmt, ...) in soc_pcmcia_debug() argument
65 if (pc_debug > lvl) { in soc_pcmcia_debug()
71 printk(KERN_DEBUG "skt%u: %s: %pV", skt->nr, func, &vaf); in soc_pcmcia_debug()
89 if (!r->reg) in soc_pcmcia_regulator_set()
93 if (r->on == on) in soc_pcmcia_regulator_set()
97 ret = regulator_set_voltage(r->reg, v * 100000, v * 100000); in soc_pcmcia_regulator_set()
99 int vout = regulator_get_voltage(r->reg) / 100000; in soc_pcmcia_regulator_set()
[all …]
/openbmc/linux/drivers/tty/serial/
H A Dmax310x.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2012-2016 Alexander Shiyan <shc_work@mail.ru>
16 #include <linux/gpio/driver.h>
61 #define MAX310X_GPIOCFG_REG (0x18) /* GPIO config */
62 #define MAX310X_GPIODATA_REG (0x19) /* GPIO data */
104 #define MAX310X_SPCHR_MULTIDROP_BIT (1 << 5) /* 9-bit multidrop addr char */
107 #define MAX310X_STS_GPIO0_BIT (1 << 0) /* GPIO 0 interrupt */
108 #define MAX310X_STS_GPIO1_BIT (1 << 1) /* GPIO 1 interrupt */
109 #define MAX310X_STS_GPIO2_BIT (1 << 2) /* GPIO 2 interrupt */
110 #define MAX310X_STS_GPIO3_BIT (1 << 3) /* GPIO 3 interrupt */
[all …]

12