Lines Matching +full:gpio +full:- +full:lvl
1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include <asm/arch-baytrail/fsp/fsp_configs.h>
9 #include <dt-bindings/gpio/x86-gpio.h>
10 #include <dt-bindings/interrupt-router/intel-irq.h>
32 compatible = "intel,x86-pinctrl";
35 /* GPIO E0 */
37 gpio-offset = <0x80 0>;
38 mode-gpio;
39 output-value = <0>;
43 /* GPIO E1 */
45 gpio-offset = <0x80 1>;
46 mode-gpio;
47 output-value = <0>;
51 /* GPIO E2 */
53 gpio-offset = <0x80 2>;
54 mode-gpio;
55 output-value = <0>;
60 gpio-offset = <0x80 8>;
61 mode-gpio;
62 output-value = <1>;
67 gpio-offset = <0x80 9>;
68 mode-gpio;
69 output-value = <1>;
77 * the pin to work in GPIO mode, which causes card detect
84 pad-offset = <0x3a0>;
85 mode-func = <1>;
90 stdout-path = "/serial";
94 #address-cells = <1>;
95 #size-cells = <0>;
99 compatible = "intel,baytrail-cpu";
101 intel,apic-id = <0>;
106 compatible = "intel,baytrail-cpu";
108 intel,apic-id = <4>;
114 compatible = "intel,pci-baytrail", "pci-x86";
115 #address-cells = <3>;
116 #size-cells = <2>;
117 u-boot,dm-pre-reloc;
125 #address-cells = <1>;
126 #size-cells = <1>;
128 irq-router {
129 compatible = "intel,irq-router";
130 intel,pirq-config = "ibase";
131 intel,ibase-offset = <0x50>;
132 intel,actl-addr = <0>;
133 intel,pirq-link = <8 8>;
134 intel,pirq-mask = <0xdee0>;
135 intel,pirq-routing = <
194 #address-cells = <1>;
195 #size-cells = <0>;
196 compatible = "intel,ich9-spi";
197 spi-flash@0 {
198 #address-cells = <1>;
199 #size-cells = <1>;
202 "spi-flash";
203 memory-map = <0xff800000 0x00800000>;
204 rw-mrc-cache {
205 label = "rw-mrc-cache";
212 compatible = "intel,ich6-gpio";
213 u-boot,dm-pre-reloc;
215 bank-name = "A";
216 use-lvl-write-cache;
220 compatible = "intel,ich6-gpio";
221 u-boot,dm-pre-reloc;
223 bank-name = "B";
224 use-lvl-write-cache;
228 compatible = "intel,ich6-gpio";
229 u-boot,dm-pre-reloc;
231 bank-name = "C";
232 use-lvl-write-cache;
236 compatible = "intel,ich6-gpio";
237 u-boot,dm-pre-reloc;
239 bank-name = "D";
240 use-lvl-write-cache;
244 compatible = "intel,ich6-gpio";
245 u-boot,dm-pre-reloc;
247 bank-name = "E";
248 use-lvl-write-cache;
252 compatible = "intel,ich6-gpio";
253 u-boot,dm-pre-reloc;
255 bank-name = "F";
256 use-lvl-write-cache;
262 compatible = "intel,baytrail-fsp";
263 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
264 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
265 fsp,mrc-init-spd-addr1 = <0xa0>;
266 fsp,mrc-init-spd-addr2 = <0xa2>;
267 fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
268 fsp,enable-sdio;
269 fsp,enable-sdcard;
270 fsp,enable-hsuart1;
271 fsp,enable-spi;
272 fsp,enable-sata;
273 fsp,sata-mode = <SATA_MODE_AHCI>;
275 fsp,enable-xhci;
277 fsp,lpe-mode = <LPE_MODE_PCI>;
278 fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
279 fsp,enable-dma0;
280 fsp,enable-dma1;
281 fsp,enable-i2c0;
282 fsp,enable-i2c1;
283 fsp,enable-i2c2;
284 fsp,enable-i2c3;
285 fsp,enable-i2c4;
286 fsp,enable-i2c5;
287 fsp,enable-i2c6;
288 fsp,enable-pwm0;
289 fsp,enable-pwm1;
290 fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
291 fsp,aperture-size = <APERTURE_SIZE_256MB>;
292 fsp,gtt-size = <GTT_SIZE_2MB>;
293 fsp,scc-mode = <SCC_MODE_PCI>;
294 fsp,os-selection = <OS_SELECTION_LINUX>;
295 fsp,emmc45-ddr50-enabled;
296 fsp,emmc45-retune-timer-value = <8>;
297 fsp,enable-igd;
298 fsp,enable-memory-down;
299 fsp,memory-down-params {
300 compatible = "intel,baytrail-fsp-mdp";
301 fsp,dram-speed = <DRAM_SPEED_1066MTS>;
302 fsp,dram-type = <DRAM_TYPE_DDR3L>;
303 fsp,dimm-0-enable;
304 fsp,dimm-width = <DIMM_WIDTH_X16>;
305 fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
306 fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
307 fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
308 fsp,dimm-tcl = <0xb>;
309 fsp,dimm-trpt-rcd = <0xb>;
310 fsp,dimm-twr = <0xc>;
311 fsp,dimm-twtr = <6>;
312 fsp,dimm-trrd = <6>;
313 fsp,dimm-trtp = <6>;
314 fsp,dimm-tfaw = <0x14>;