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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
13 ARM SMP cores are often associated with a GIC, providing per processor
17 Primary GIC is attached directly to the CPU and typically has PPIs and SGIs.
22 - $ref: /schemas/interrupt-controller.yaml#
27 - items:
28 - enum:
[all …]
/openbmc/linux/arch/arm64/boot/dts/apm/
H A Dapm-shadowcat.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC
9 compatible = "apm,xgene-shadowcat";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
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/openbmc/u-boot/arch/arm/dts/
H A Darmada-ap806.dtsi4 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 /dts-v1/;
53 compatible = "marvell,armada-ap806";
54 #address-cells = <2>;
55 #size-cells = <2>;
63 compatible = "arm,psci-0.2";
67 reserved-memory {
68 #address-cells = <2>;
69 #size-cells = <2>;
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/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap80x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <2>;
25 compatible = "arm,psci-0.2";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dipq5332.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 #include <dt-bindings/clock/qcom,apss-ipq.h>
9 #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 sleep_clk: sleep-clk {
19 compatible = "fixed-clock";
[all …]
H A Dipq5018.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
13 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 sleep_clk: sleep-clk {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
[all …]
H A Dipq9574.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
9 #include <dt-bindings/clock/qcom,apss-ipq.h>
10 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&intc>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
H A Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&intc>;
19 sleep_clk: sleep-clk {
20 compatible = "fixed-clock";
[all …]
H A Dipq8074.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
15 interrupt-parent = <&intc>;
19 compatible = "fixed-clock";
20 clock-frequency = <32768>;
21 #clock-cells = <0>;
25 compatible = "fixed-clock";
[all …]
/openbmc/linux/drivers/irqchip/
H A Dirq-gic-v2m.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ARM GIC v2m MSI(-X) support
26 #include <linux/irqchip/arm-gic.h>
27 #include <linux/irqchip/arm-gic-common.h>
50 /* APM X-Gene with GICv2m MSI_IIDR register value */
56 /* List of flags for specific v2m implementation */
72 u32 flags; /* v2m flags for specific implementation */
100 static phys_addr_t gicv2m_get_msi_addr(struct v2m_data *v2m, int hwirq) in gicv2m_get_msi_addr() argument
102 if (v2m->flags & GICV2M_GRAVITON_ADDRESS_ONLY) in gicv2m_get_msi_addr()
103 return v2m->res.start | ((hwirq - 32) << 3); in gicv2m_get_msi_addr()
[all …]
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 frame@2a830000 {
19 frame-number = <1>;
31 #mbox-cells = <1>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-soc.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 interrupt-parent = <&gic0>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 gic0: interrupt-controller@e1101000 {
15 compatible = "arm,gic-400", "arm,cortex-a15-gic";
16 interrupt-controller;
17 #interrupt-cells = <3>;
18 #address-cells = <2>;
19 #size-cells = <2>;
[all …]
/openbmc/qemu/hw/arm/
H A Dvirt.c2 * ARM mach-virt emulation
23 * + we want to present a very stripped-down minimalist platform,
41 #include "hw/vfio/vfio-calxeda-xgmac.h"
42 #include "hw/vfio/vfio-amd-xgbe.h"
56 #include "qemu/error-report.h"
58 #include "hw/pci-host/gpex.h"
59 #include "hw/virtio/virtio-pci.h"
60 #include "hw/core/sysbus-fdt.h"
61 #include "hw/platform-bus.h"
62 #include "hw/qdev-properties.h"
[all …]
/openbmc/linux/
H A DMAINTAINERS5 ----------
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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