/openbmc/linux/net/sctp/ |
H A D | endpointola.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (c) 1999-2000 Cisco, Inc. 4 * Copyright (c) 1999-2001 Motorola, Inc. 5 * Copyright (c) 2001-2002 International Business Machines, Corp. 12 * This abstraction represents an SCTP endpoint. 16 * lksctp developers <linux-sctp@vger.kernel.org> 39 * Initialize the base fields of the endpoint structure. 48 ep->digest = kzalloc(SCTP_SIGNATURE_SIZE, gfp); in sctp_endpoint_init() 49 if (!ep->digest) in sctp_endpoint_init() 52 ep->asconf_enable = net->sctp.addip_enable; in sctp_endpoint_init() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/media/i2c/ |
H A D | ti,ds90ub960.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs 10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 13 The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO 17 - $ref: /schemas/i2c/i2c-atr.yaml# 22 - ti,ds90ub960-q1 23 - ti,ds90ub9702-q1 33 clock-names: [all …]
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H A D | st,st-mipid02.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/i2c/st,st-mipid02.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge 10 - Benjamin Mugnier <benjamin.mugnier@foss.st.com> 11 - Sylvain Petinot <sylvain.petinot@foss.st.com> 14 MIPID02 has two CSI-2 input ports, only one of those ports can be 15 active at a time. Active port input stream will be de-serialized 17 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 [all …]
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H A D | adv748x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Kieran Bingham <kieran.bingham@ideasonboard.com> 11 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 15 HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB 21 - enum: 22 - adi,adv7481 23 - adi,adv7482 29 The ADV748x has up to twelve 256-byte maps that can be accessed via the [all …]
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | audio-graph-port.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/audio-graph-port.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 15 port-base: 16 $ref: /schemas/graph.yaml#/$defs/port-base 18 convert-rate: 19 $ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate 20 convert-channels: [all …]
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/openbmc/linux/arch/m68k/include/asm/ |
H A D | m5272sim.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * m5272sim.h -- ColdFire 5272 System Integration Module support. 46 #define MCFSIM_CSBR0 (MCF_MBAR + 0x40) /* CS0 Base Address */ 48 #define MCFSIM_CSBR1 (MCF_MBAR + 0x48) /* CS1 Base Address */ 50 #define MCFSIM_CSBR2 (MCF_MBAR + 0x50) /* CS2 Base Address */ 52 #define MCFSIM_CSBR3 (MCF_MBAR + 0x58) /* CS3 Base Address */ 54 #define MCFSIM_CSBR4 (MCF_MBAR + 0x60) /* CS4 Base Address */ 56 #define MCFSIM_CSBR5 (MCF_MBAR + 0x68) /* CS5 Base Address */ 58 #define MCFSIM_CSBR6 (MCF_MBAR + 0x70) /* CS6 Base Address */ 60 #define MCFSIM_CSBR7 (MCF_MBAR + 0x78) /* CS7 Base Address */ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | ite,it6505.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Allen Chen <allen.chen@ite.com.tw> 13 The IT6505 is a high-performance DisplayPort 1.1a transmitter, 16 and ensures robust transmission of high-quality uncompressed video 27 transmission of high-definition content. Users of the IT6505 need not 37 ovdd-supply: 40 pwr18-supply: 47 reset-gpios: [all …]
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H A D | toshiba,tc358768.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peter Ujfalusi <peter.ujfalusi@ti.com> 18 - toshiba,tc358768 19 - toshiba,tc358778 23 description: base I2C address of the device 25 reset-gpios: 29 vddc-supply: 32 vddmipi-supply: [all …]
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H A D | ti,tfp410.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tomi Valkeinen <tomi.valkeinen@ti.com> 11 - Jyri Sarha <jsarha@ti.com> 21 powerdown-gpios: 26 Data de-skew value in 350ps increments, from 0 to 7, as configured 27 through the DK[3:1] pins. The de-skew multiplier is computed as 28 (DK[3:1] - 4), so it ranges from -4 to 3. 38 $ref: /schemas/graph.yaml#/$defs/port-base [all …]
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H A D | ite,it66121.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Phong LE <ple@baylibre.com> 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 The IT66121 is a high-performance and low-power single channel HDMI 21 - ite,it66121 22 - ite,it6610 27 reset-gpios: 31 vrf12-supply: [all …]
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H A D | ti,sn65dsi83.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marek Vasut <marex@denx.de> 13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI 14 to 1x Single-link LVDS 16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI 17 to 1x Dual-link or 2x Single-link LVDS 23 - ti,sn65dsi83 24 - ti,sn65dsi84 [all …]
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/openbmc/linux/drivers/gpu/drm/msm/dp/ |
H A D | dp_parser.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 28 void __iomem *base; in dp_ioremap() local 30 base = devm_platform_get_and_ioremap_resource(pdev, idx, &res); in dp_ioremap() 31 if (!IS_ERR(base)) in dp_ioremap() 34 return base; in dp_ioremap() 39 struct platform_device *pdev = parser->pdev; in dp_parser_ctrl_res() 40 struct dp_io *io = &parser->io; in dp_parser_ctrl_res() 41 struct dss_io_data *dss = &io->dp_controller; in dp_parser_ctrl_res() 43 dss->ahb.base = dp_ioremap(pdev, 0, &dss->ahb.len); in dp_parser_ctrl_res() [all …]
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/openbmc/linux/drivers/usb/gadget/udc/cdns2/ |
H A D | cdns2-gadget.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * USBHS-DEV device controller driver header file 14 #include <linux/dma-direction.h> 22 * struct cdns2_ep0_regs - endpoint 0 related registers. 23 * @rxbc: receive (OUT) 0 endpoint byte count register. 24 * @txbc: transmit (IN) 0 endpoint byte count register. 25 * @cs: 0 endpoint control and status register. 27 * @fifo: 0 endpoint fifo register. 31 * @maxpack: 0 endpoint max packet size. 45 /* EP0CS - bitmasks. */ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | onnn,nb7vpq904m.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ON Semiconductor Type-C DisplayPort ALT Mode Linear Redriver 10 - Neil Armstrong <neil.armstrong@linaro.org> 15 - onnn,nb7vpq904m 20 vcc-supply: 23 enable-gpios: true 25 retimer-switch: 29 orientation-switch: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/imx/ |
H A D | fsl-imx-drm.txt | 8 - compatible: Should be "fsl,imx-display-subsystem" 9 - ports: Should contain a list of phandles pointing to display interface ports 14 display-subsystem { 15 compatible = "fsl,imx-display-subsystem"; 24 - compatible: Should be "fsl,<chip>-ipu" where <chip> is one of 25 - imx51 26 - imx53 27 - imx6q 28 - imx6qp 29 - reg: should be register base and length as documented in the [all …]
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/openbmc/linux/arch/arm64/boot/dts/sprd/ |
H A D | sc9836.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 #address-cells = <2>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-a53"; 23 enable-method = "psci"; 28 compatible = "arm,cortex-a53"; 30 enable-method = "psci"; 35 compatible = "arm,cortex-a53"; 37 enable-method = "psci"; 42 compatible = "arm,cortex-a53"; [all …]
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/openbmc/linux/drivers/usb/cdns3/ |
H A D | cdnsp-mem.c | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <linux/dma-mapping.h> 18 #include "cdnsp-gadget.h" 19 #include "cdnsp-trace.h" 42 seg->trbs = dma_pool_zalloc(pdev->segment_pool, flags, &dma); in cdnsp_segment_alloc() 43 if (!seg->trbs) { in cdnsp_segment_alloc() 49 seg->bounce_buf = kzalloc(max_packet, flags | GFP_DMA); in cdnsp_segment_alloc() 50 if (!seg->bounce_buf) in cdnsp_segment_alloc() 57 seg->trbs[i].link.control |= cpu_to_le32(TRB_CYCLE); in cdnsp_segment_alloc() 59 seg->dma = dma; in cdnsp_segment_alloc() [all …]
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H A D | cdnsp-gadget.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include <linux/dma-mapping.h> 23 #include "gadget-export.h" 25 #include "cdnsp-gadget.h" 26 #include "cdnsp-trace.h" 54 /* Save read-only status and port state. */ in cdnsp_port_state_to_neutral() 59 * cdnsp_find_next_ext_cap - Find the offset of the extended capabilities 61 * @base: PCI MMIO registers base address. 70 int cdnsp_find_next_ext_cap(void __iomem *base, u32 start, int id) in cdnsp_find_next_ext_cap() argument 77 val = readl(base + HCC_PARAMS_OFFSET); in cdnsp_find_next_ext_cap() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/media/ |
H A D | microchip,csi2dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Eugen Hristev <eugen.hristev@microchip.com> 13 CSI2DC - Camera Serial Interface 2 Demux Controller 30 32-bit IDI interface or a parallel interface. 34 This port has an 'endpoint' that can be connected to a sink port of another 44 const: microchip,sama7g5-csi2dc 53 clock-names: 63 - const: pclk [all …]
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H A D | renesas,vin.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car Video Input (VIN) 11 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 14 The R-Car Video Input (VIN) device provides video input capabilities for the 15 Renesas R-Car family of devices. 20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver. 25 - items: 26 - enum: [all …]
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H A D | rockchip-isp1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Helen Koike <helen.koike@collabora.com> 19 - rockchip,px30-cif-isp 20 - rockchip,rk3399-cif-isp 29 interrupt-names: 31 - const: isp 32 - const: mi [all …]
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H A D | qcom,sm8250-camss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Robert Foss <robert.foss@linaro.org> 18 const: qcom,sm8250-camss 24 clock-names: 26 - const: cam_ahb_clk 27 - const: cam_hf_axi 28 - const: cam_sf_axi [all …]
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H A D | ti,cal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Benoit Parrot <bparrot@ti.com> 12 description: |- 15 processing capability to connect CSI2 image-sensor modules to the 24 - ti,dra72-cal 26 - ti,dra72-pre-es2-cal 28 - ti,dra76-cal 30 - ti,am654-cal [all …]
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/openbmc/u-boot/drivers/usb/musb/ |
H A D | musb_core.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments 27 writew(0, &musbr->intrtxe); in musb_start() 28 writew(0, &musbr->intrrxe); in musb_start() 29 writeb(0, &musbr->intrusbe); in musb_start() 30 writeb(0, &musbr->testmode); in musb_start() 33 writeb(MUSB_POWER_HSENAB, &musbr->power); in musb_start() 41 devctl = readb(&musbr->devctl); in musb_start() 42 writeb(devctl | MUSB_DEVCTL_SESSION, &musbr->devctl); in musb_start() 51 writeb(idx, &musbr->dir##fifosz); \ [all …]
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/openbmc/linux/drivers/pci/controller/cadence/ |
H A D | pcie-cadence.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com> 11 #include <linux/pci-epf.h> 42 /* Endpoint Bus and Device Number Register */ 49 /* Endpoint Function f BAR b Configuration Registers */ 71 /* Endpoint Function Configuration Register */ 96 /* BAR control values applicable to both Endpoint Function and Root Complex */ 117 (((aperture) - 2) << ((bar) * 8)) 124 * Endpoint Function Registers (PCI configuration space for endpoint functions) 149 (((nbits) - 1) & CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_NBITS_MASK) [all …]
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