Lines Matching +full:endpoint +full:- +full:base

1 /* SPDX-License-Identifier: GPL-2.0 */
5  *	m5272sim.h -- ColdFire 5272 System Integration Module support.
46 #define	MCFSIM_CSBR0		(MCF_MBAR + 0x40)	/* CS0 Base Address */
48 #define	MCFSIM_CSBR1		(MCF_MBAR + 0x48)	/* CS1 Base Address */
50 #define	MCFSIM_CSBR2		(MCF_MBAR + 0x50)	/* CS2 Base Address */
52 #define	MCFSIM_CSBR3		(MCF_MBAR + 0x58)	/* CS3 Base Address */
54 #define	MCFSIM_CSBR4		(MCF_MBAR + 0x60)	/* CS4 Base Address */
56 #define	MCFSIM_CSBR5		(MCF_MBAR + 0x68)	/* CS5 Base Address */
58 #define	MCFSIM_CSBR6		(MCF_MBAR + 0x70)	/* CS6 Base Address */
60 #define	MCFSIM_CSBR7		(MCF_MBAR + 0x78)	/* CS7 Base Address */
72 #define	MCFUART_BASE0		(MCF_MBAR + 0x100) /* Base address UART0 */
73 #define	MCFUART_BASE1		(MCF_MBAR + 0x140) /* Base address UART1 */
85 #define	MCFDMA_BASE0		(MCF_MBAR + 0xe0) /* Base address DMA 0 */
87 #define	MCFTIMER_BASE1		(MCF_MBAR + 0x200) /* Base address TIMER1 */
88 #define	MCFTIMER_BASE2		(MCF_MBAR + 0x220) /* Base address TIMER2 */
89 #define	MCFTIMER_BASE3		(MCF_MBAR + 0x240) /* Base address TIMER4 */
90 #define	MCFTIMER_BASE4		(MCF_MBAR + 0x260) /* Base address TIMER3 */
92 #define	MCFFEC_BASE0		(MCF_MBAR + 0x840) /* Base FEC ethernet */
98 #define	MCFINT_VECBASE		64		/* Base of interrupts */
112 #define	MCF_IRQ_USB0		77		/* USB Endpoint 0 */
113 #define	MCF_IRQ_USB1		78		/* USB Endpoint 1 */
114 #define	MCF_IRQ_USB2		79		/* USB Endpoint 2 */
115 #define	MCF_IRQ_USB3		80		/* USB Endpoint 3 */
116 #define	MCF_IRQ_USB4		81		/* USB Endpoint 4 */
117 #define	MCF_IRQ_USB5		82		/* USB Endpoint 5 */
118 #define	MCF_IRQ_USB6		83		/* USB Endpoint 6 */
119 #define	MCF_IRQ_USB7		84		/* USB Endpoint 7 */
123 #define	MCF_IRQ_FECENTC0	88		/* Ethernet Non-Time Critical */
137 #define MCFGPIO_IRQ_MAX		-1
138 #define MCFGPIO_IRQ_VECBASE	-1