media/i2c/ti%2Cds90ub960.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs
10   - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
13   The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO
17   - $ref: /schemas/i2c/i2c-atr.yaml#
22       - ti,ds90ub960-q1
23       - ti,ds90ub9702-q1
33   clock-names:
35       - const: refclk
37   powerdown-gpios:
42   i2c-alias-pool:
51       '#address-cells':
54       '#size-cells':
57       ti,manual-strobe:
63       '^link@[0-3]$':
71           i2c-alias:
77           ti,rx-mode:
80               - 0 # RAW10
81               - 1 # RAW12 HF
82               - 2 # RAW12 LF
83               - 3 # CSI2 SYNC
84               - 4 # CSI2 NON-SYNC
86               FPD-Link Input Mode. This should reflect the hardware and the
89           ti,cdr-mode:
92               - 0 # FPD-Link III
93               - 1 # FPD-Link IV
95               FPD-Link CDR Mode. This should reflect the hardware and the
98           ti,strobe-pos:
100             minimum: -13
104           ti,eq-level:
111             description: FPD-Link Serializer node
114           - reg
115           - i2c-alias
116           - ti,rx-mode
117           - serializer
124         $ref: /schemas/graph.yaml#/$defs/port-base
126         description: FPD-Link input 0
129           endpoint:
130             $ref: /schemas/media/video-interfaces.yaml#
133               Endpoint for FPD-Link port. If the RX mode for this port is RAW,
134               hsync-active and vsync-active must be defined.
137         $ref: /schemas/graph.yaml#/$defs/port-base
139         description: FPD-Link input 1
142           endpoint:
143             $ref: /schemas/media/video-interfaces.yaml#
146               Endpoint for FPD-Link port. If the RX mode for this port is RAW,
147               hsync-active and vsync-active must be defined.
150         $ref: /schemas/graph.yaml#/$defs/port-base
152         description: FPD-Link input 2
155           endpoint:
156             $ref: /schemas/media/video-interfaces.yaml#
159               Endpoint for FPD-Link port. If the RX mode for this port is RAW,
160               hsync-active and vsync-active must be defined.
163         $ref: /schemas/graph.yaml#/$defs/port-base
165         description: FPD-Link input 3
168           endpoint:
169             $ref: /schemas/media/video-interfaces.yaml#
172               Endpoint for FPD-Link port. If the RX mode for this port is RAW,
173               hsync-active and vsync-active must be defined.
176         $ref: /schemas/graph.yaml#/$defs/port-base
178         description: CSI-2 Output 0
181           endpoint:
182             $ref: /schemas/media/video-interfaces.yaml#
186               data-lanes:
189               link-frequencies:
193               - data-lanes
194               - link-frequencies
197         $ref: /schemas/graph.yaml#/$defs/port-base
199         description: CSI-2 Output 1
202           endpoint:
203             $ref: /schemas/media/video-interfaces.yaml#
207               data-lanes:
210               link-frequencies:
214               - data-lanes
215               - link-frequencies
218       - port@0
219       - port@1
220       - port@2
221       - port@3
222       - port@4
223       - port@5
226   - compatible
227   - reg
228   - clocks
229   - clock-names
230   - ports
235   - |
236     #include <dt-bindings/gpio/gpio.h>
239       clock-frequency = <400000>;
240       #address-cells = <1>;
241       #size-cells = <0>;
244         compatible = "ti,ds90ub960-q1";
247         clock-names = "refclk";
250         powerdown-gpios = <&pca9555 7 GPIO_ACTIVE_LOW>;
252         i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
255           #address-cells = <1>;
256           #size-cells = <0>;
262             ub960_fpd3_1_in: endpoint {
263               remote-endpoint = <&ub953_1_out>;
271             ub960_fpd3_2_in: endpoint {
272               remote-endpoint = <&ub913_2_out>;
273               hsync-active = <0>;
274               vsync-active = <1>;
288           /* Port 4, CSI-2 TX */
291             ds90ub960_0_csi_out: endpoint {
292               data-lanes = <1 2 3 4>;
293               link-frequencies = /bits/ 64 <800000000>;
294               remote-endpoint = <&csi2_phy0>;
305           #address-cells = <1>;
306           #size-cells = <0>;
312             i2c-alias = <0x44>;
314             ti,rx-mode = <3>;
317               compatible = "ti,ds90ub953-q1";
319               gpio-controller;
320               #gpio-cells = <2>;
322               #clock-cells = <0>;
325                 #address-cells = <1>;
326                 #size-cells = <0>;
330                   ub953_1_in: endpoint {
331                     data-lanes = <1 2 3 4>;
332                     remote-endpoint = <&sensor_1_out>;
339                   ub953_1_out: endpoint {
340                     remote-endpoint = <&ub960_fpd3_1_in>;
346                 #address-cells = <1>;
347                 #size-cells = <0>;
353                   reset-gpios = <&serializer1 0 GPIO_ACTIVE_LOW>;
356                     sensor_1_out: endpoint {
357                       remote-endpoint = <&ub953_1_in>;
369             i2c-alias = <0x45>;
371             ti,rx-mode = <0>;
374               compatible = "ti,ds90ub913a-q1";
376               gpio-controller;
377               #gpio-cells = <2>;
380               clock-names = "clkin";
382               #clock-cells = <0>;
385                 #address-cells = <1>;
386                 #size-cells = <0>;
390                   ub913_2_in: endpoint {
391                     remote-endpoint = <&sensor_2_out>;
392                     pclk-sample = <1>;
399                   ub913_2_out: endpoint {
400                     remote-endpoint = <&ub960_fpd3_2_in>;
406                 #address-cells = <1>;
407                 #size-cells = <0>;
416                     sensor_2_out: endpoint {
417                       remote-endpoint = <&ub913_2_in>;