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12

/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a-kontron-sl28-var4.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
12 /dts-v1/;
13 #include "fsl-ls1028a-kontron-sl28.dts"
14 #include <dt-bindings/net/qca-ar803x.h>
17 model = "Kontron SMARC-sAL28 (Dual PHY)";
18 compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";
22 phy1: ethernet-phy@4 {
24 eee-broken-1000t;
25 eee-broken-100tx;
[all …]
H A Dfsl-ls1028a-kontron-sl28-var1.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
15 /dts-v1/;
16 #include "fsl-ls1028a-kontron-sl28.dts"
17 #include <dt-bindings/net/qca-ar803x.h>
20 model = "Kontron SMARC-sAL28 (4 Lanes)";
21 compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";
26 /delete-node/ ethernet-phy@5;
28 phy0: ethernet-phy@4 {
30 eee-broken-1000t;
[all …]
H A Dfsl-ls1028a-kontron-sl28-var2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
12 /dts-v1/;
13 #include "fsl-ls1028a-kontron-sl28.dts"
16 model = "Kontron SMARC-sAL28 (TSN-on-module)";
17 compatible = "kontron,sl28-var2", "kontron,sl28", "fsl,ls1028a";
21 phy1: ethernet-phy@4 {
23 eee-broken-1000t;
24 eee-broken-100tx;
33 * port instead. Therefore, delete the phy-handle property here.
[all …]
H A Dfsl-lx2160a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2018-2020 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx93-11x11-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
12 compatible = "fsl,imx93-11x11-evk", "fsl,imx93";
15 stdout-path = &lpuart1;
18 reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
24 compatible = "shared-dma-pool";
26 alloc-ranges = <0 0x80000000 0 0x40000000>;
28 linux,cma-default;
[all …]
H A Dfsl-lx2162a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2162a-qds", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "LTM4619-3.3VSB";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
[all …]
H A Dfsl-ls1028a-kontron-sl28.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
9 /dts-v1/;
10 #include "fsl-ls1028a.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
16 model = "Kontron SMARC-sAL28";
33 compatible = "gpio-keys";
35 power-button {
[all …]
H A Dimx8mp-debix-som-a-bmb-08.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx8mp-debix-som-a.dtsi"
12 model = "Polyhex i.MX8MPlus Debix SOM A on BMB-08";
13 compatible = "polyhex,imx8mp-debix-som-a-bmb-08", "polyhex,imx8mp-debix-som-a",
22 stdout-path = &uart2;
25 reg_baseboard_vdd3v3: regulator-baseboard-vdd3v3 {
26 compatible = "regulator-fixed";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
[all …]
H A Dimx8mp-msc-sm2s.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/net/ti-dp83867.h>
18 stdout-path = &uart2;
21 reg_usb0_host_vbus: regulator-usb0-vbus {
22 compatible = "regulator-fixed";
23 regulator-name = "usb0_host_vbus";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_usb0_vbus>;
26 regulator-min-microvolt = <5000000>;
[all …]
H A Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 hdmi-connector {
20 compatible = "hdmi-connector";
26 remote-endpoint = <&adv7535_out>;
31 gpio-leds {
32 compatible = "gpio-leds";
[all …]
H A Dimx8dxl-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl";
22 stdout-path = &lpuart0;
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
37 * This will be automatically added to dtb if OP-TEE is installed.
40 * no-map;
46 compatible = "shared-dma-pool";
[all …]
/openbmc/linux/drivers/net/phy/
H A Dphy-core.c1 // SPDX-License-Identifier: GPL-2.0+
10 * phy_speed_to_str - Return a string representing the PHY link speed
57 return "Unsupported (update phy-core.c)"; in phy_speed_to_str()
63 * phy_duplex_to_str - Return string describing the duplex
75 return "Unsupported (update phy-core.c)"; in phy_duplex_to_str()
80 * phy_rate_matching_to_str - Return a string describing the rate matching
94 return "open-loop"; in phy_rate_matching_to_str()
96 return "Unsupported (update phy-core.c)"; in phy_rate_matching_to_str()
101 * phy_interface_num_ports - Return the number of links that can be carried by
102 * a given MAC-PHY physical link. Returns 0 if this is
[all …]
H A Dphy_device.c1 // SPDX-License-Identifier: GPL-2.0+
32 #include <linux/pse-pd/pse.h>
171 /* 10/100 half/full + 1000 half/full */ in features_init()
182 /* 10/100 half/full + 1000 half/full + fibre*/ in features_init()
196 /* 10/100 half/full + 1000 half/full + TP/MII/FIBRE/AUI/BNC/Backplane*/ in features_init()
207 /* 10/100 half/full + 1000 half/full + 10G full*/ in features_init()
221 /* 10/100/1000/10G full */ in features_init()
240 put_device(&phydev->mdio.dev); in phy_device_free()
254 fwnode_handle_put(dev->fwnode); in phy_device_release()
273 struct device_driver *drv = phydev->mdio.dev.driver; in mdio_bus_phy_may_suspend()
[all …]
H A Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
44 * struct phylink - internal data type for phylink
60 u8 link_port; /* The current non-phy ethtool port */
93 if ((pl)->config->type == PHYLINK_NETDEV) \
94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
95 else if ((pl)->config->type == PHYLINK_DEV) \
96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
108 if ((pl)->config->type == PHYLINK_NETDEV) \
109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905d-p230.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
11 #include "meson-gxl-s905d.dtsi"
12 #include "meson-gx-p23x-q20x.dtsi"
15 compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl";
18 adc-keys {
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
[all …]
H A Dmeson-g12a-x96-max.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
14 compatible = "amediatech,x96-max", "amlogic,g12a";
22 spdif_dit: audio-codec-1 {
23 #sound-dai-cells = <0>;
24 compatible = "linux,spdif-dit";
[all …]
H A Dmeson-axg-s400.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-axg.dtsi"
9 #include <dt-bindings/input/input.h>
12 compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
16 compatible = "adc-keys";
17 io-channels = <&saradc 0>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
21 button-next {
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-baltos.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
12 #include <dt-bindings/pwm/pwm.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
20 cpu0-supply = <&vdd1_reg>;
30 compatible = "regulator-fixed";
31 regulator-name = "vbat";
32 regulator-min-microvolt = <5000000>;
33 regulator-max-microvolt = <5000000>;
34 regulator-boot-on;
[all …]
H A Dam5729-beagleboneai.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
6 /dts-v1/;
9 #include "am57xx-commercial-grade.dtsi"
10 #include "dra74x-mmc-iodelay.dtsi"
11 #include "dra74-ipu-dsp-common.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/dra.h>
18 compatible = "beagle,am5729-beagleboneai", "ti,am5728",
[all …]
H A Dam335x-myirtech-myd.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */
4 /* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */
6 /dts-v1/;
8 #include "am335x-myirtech-myc.dtsi"
10 #include <dt-bindings/display/tda998x.h>
11 #include <dt-bindings/input/input.h>
14 model = "MYIR MYD-AM335X";
15 compatible = "myir,myd-am335x", "myir,myc-am335x", "ti,am33xx";
18 stdout-path = &uart0;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
15 model = "Hardkernel ODROID-C2";
23 stdout-path = "serial0:115200n8";
31 usb_otg_pwr: regulator-usb-pwrs {
32 compatible = "regulator-fixed";
34 regulator-name = "USB_OTG_PWR";
[all …]
H A Dmeson-axg-s400.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-axg.dtsi"
9 #include <dt-bindings/input/input.h>
12 compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
16 compatible = "adc-keys";
17 io-channels = <&saradc 0>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
21 button-next {
[all …]
/openbmc/linux/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_main.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/dma-mapping.h>
51 /* The default timer value as per the sxgbe specification 1 sec(1000 ms) */
52 #define SXGBE_DEFAULT_LPI_TIMER 1000
54 static int debug = -1;
73 * sxgbe_verify_args - verify the driver parameters.
86 if (!priv->tx_path_in_lpi_mode) in sxgbe_enable_eee_mode()
87 priv->hw->mac->set_eee_mode(priv->ioaddr); in sxgbe_enable_eee_mode()
92 /* Exit and disable EEE in case of we are in LPI state. */ in sxgbe_disable_eee_mode()
93 priv->hw->mac->reset_eee_mode(priv->ioaddr); in sxgbe_disable_eee_mode()
[all …]
/openbmc/linux/drivers/net/ethernet/marvell/
H A Dmvneta.c7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
143 * 0 and a write won't do anything
156 #define MVNETA_TX_INTR_MASK(nr_txqs) (((1 << nr_txqs) - 1) << 0)
158 #define MVNETA_RX_INTR_MASK(nr_rxqs) (((1 << nr_rxqs) - 1) << 8)
270 * to cover all rate-limit values from 10Kbps up to 5Gbps
277 #define MVNETA_TXQ_BUCKET_REFILL_PERIOD 1000
296 (((index) < (q)->last_desc) ? ((index) + 1) : 0)
325 #define MVNETA_TX_DISABLE_TIMEOUT_MSEC 1000
326 #define MVNETA_RX_DISABLE_TIMEOUT_MSEC 1000
374 #define MVNETA_MAX_RX_BUF_SIZE (PAGE_SIZE - MVNETA_SKB_PAD)
[all …]

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