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/openbmc/u-boot/doc/device-tree-bindings/mtd/
H A Dmtd-physmap.txt1 CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
6 - compatible : should contain the specific model of mtd chip(s)
7 used, if known, followed by either "cfi-flash", "jedec-flash",
8 "mtd-ram" or "mtd-rom".
9 - reg : Address range(s) of the mtd chip(s)
11 non-identical chips can be described in one node.
12 - bank-width : Width (in bytes) of the bank. Equal to the
13 device width times the number of interleaved chips.
14 - device-width : (optional) Width of a single mtd chip. If
15 omitted, assumed to be equal to 'bank-width'.
[all …]
/openbmc/qemu/hw/block/
H A Dpflash_cfi01.c22 * For now, this code can emulate flashes of 1, 2 or 4 bytes width.
24 * - flash read
25 * - flash write
26 * - flash ID read
27 * - sector erase
28 * - CFI queries
42 #include "hw/qdev-properties.h"
43 #include "hw/qdev-properties-system.h"
44 #include "system/block-backend.h"
46 #include "qemu/error-report.h"
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H A Dpflash_cfi02.c21 * For now, this code can emulate flashes of 1, 2 or 4 bytes width.
23 * - flash read
24 * - flash write
25 * - flash ID read
26 * - sector erase
27 * - chip erase
28 * - unlock bypass command
29 * - CFI queries
38 #include "hw/qdev-properties.h"
39 #include "hw/qdev-properties-system.h"
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/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dspi-bus.txt3 SPI busses can be described with a node for the SPI master device
10 - #address-cells - number of cells required to define a chip select
12 - #size-cells - should be zero.
13 - compatible - name of SPI bus controller following generic names
15 - cs-gpios - (optional) gpios chip select.
17 that a driver for an SPI bus device will understand that it is an SPI bus.
20 flexible and non-standardized, it is left out of this binding with the
26 - num-cs : total number of chipselects
28 If cs-gpios is used the number of chip select will automatically increased
29 with max(cs-gpios > hw cs)
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H A Dspi-stm32-qspi.txt1 STM32 QSPI controller device tree bindings
2 --------------------------------------------
5 - compatible : should be "st,stm32-qspi".
6 - reg : 1. Physical base address and size of SPI registers map.
8 - spi-max-frequency : Max supported spi frequency.
9 - status : enable in requried dts.
12 --------------------------
13 - spi-max-frequency : Max supported spi frequency.
14 - spi-tx-bus-width : Bus width (number of lines) for writing (1-4)
15 - spi-rx-bus-width : Bus width (number of lines) for reading (1-4)
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/openbmc/u-boot/doc/device-tree-bindings/exynos/
H A Ddwmmc.txt4 . Embedded Multimedia Cards (EMMC-version 4.5)
5 . Secure Digital memory (SD mem-version 2.0)
6 . Secure Digital I/O (SDIO-version 3.0)
7 . Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
14 - compatible: should be
15 - samsung,exynos-dwmmc: for exynos platforms
17 - reg: physical base address of the controller and length of memory mapped
20 - interrupts: The interrupt number to the cpu.
24 - #address-cells: should be 1.
25 - #size-cells: should be 0.
[all …]
/openbmc/obmc-ikvm/
H A Dikvm_video.cpp16 #include <phosphor-logging/elog-errors.hpp>
17 #include <phosphor-logging/elog.hpp>
18 #include <phosphor-logging/log.hpp>
19 #include <xyz/openbmc_project/Common/Device/error.hpp>
31 using namespace sdbusplus::xyz::openbmc_project::Common::Device::Error;
34 resizeAfterOpen(false), timingsError(false), fd(-1), frameRate(fr), in Video()
35 lastFrameIndex(-1), height(600), width(800), subSampling(sub), input(input), in Video()
77 // Switch to non-blocking in order to safely dequeue all buffers; if the in getFrame()
79 // wait forever if signal is not re-acquired in getFrame()
171 if (timings.bt.width != width || timings.bt.height != height) in needsResize()
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H A Dikvm_video.hpp14 * @brief Sets up the V4L2 video device and performs read operations
22 * @param[in] p - Path to the V4L2 video device
23 * @param[in] input - Reference to the Input object
24 * @param[in] fr - desired frame rate of the video
47 /* @brief Performs the resize and re-allocates framebuffer */
49 /* @brief Starts streaming from the video device */
51 /* @brief Stops streaming from the video device */
53 /* @brief Restarts streaming from the video device */
96 * @brief Gets the width of the video frame
98 * @return Value of the width of video frame in pixels
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/openbmc/u-boot/doc/device-tree-bindings/nand/
H A Dnvidia,tegra20-nand.txt2 ----------
5 U-Boot. There should not be Linux-specific or U-Boot specific binding, just
9 The device node for a NAND flash device is as follows:
12 - compatible : Should be "manufacturer,device", "nand-flash"
18 ----------------------
20 The device node for a NAND flash controller is as follows:
24 nvidia,wp-gpios : GPIO of write-protect line, three cells in the format:
26 nvidia,nand-width : bus width of the NAND device in bits
28 - nvidia,nand-timing : Timing parameters for the NAND. Each is in ns.
33 non-EDO mode: Max(tRP, tREA) + 6ns
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/openbmc/u-boot/doc/device-tree-bindings/gpio/
H A Daltera_pio.txt4 - compatible:
5 - "altr,pio-1.0"
6 - reg: Physical base address and length of the controller's registers.
9 - altr,gpio-bank-width: Width of the GPIO bank. This defines how many pins the
10 GPIO device has. Ranges between 1-32. Optional and defaults to 32 if not
12 - gpio-bank-name: bank name attached to this device.
17 compatible = "altr,pio-1.0";
20 altr,gpio-bank-width = <8>;
21 #gpio-cells = <2>;
22 gpio-controller;
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/openbmc/u-boot/lib/efi_loader/
H A Defi_gop.c1 // SPDX-License-Identifier: GPL-2.0+
20 * struct efi_gop_obj - graphical output protocol object
48 *size_of_info = sizeof(gopobj->info); in gop_query_mode()
49 *info = &gopobj->info; in gop_query_mode()
80 return (u16)(blt->red >> 3) << 11 | in efi_blt_col_to_vid16()
81 (u16)(blt->green >> 2) << 5 | in efi_blt_col_to_vid16()
82 (u16)(blt->blue >> 3); in efi_blt_col_to_vid16()
90 efi_uintn_t width, in gop_blt_int() argument
97 u32 *fb32 = gopobj->fb; in gop_blt_int()
98 u16 *fb16 = gopobj->fb; in gop_blt_int()
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/openbmc/u-boot/arch/arm/dts/
H A Dfsl-ls1088a-qds.dts1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * NXP ls1088a QDS board device tree source
8 /dts-v1/;
10 #include "fsl-ls1088a.dtsi"
14 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
22 #address-cells = <2>;
23 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <1>;
33 compatible = "cfi-flash";
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H A Dfsl-ls1043a-qds.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
10 /include/ "fsl-ls1043a.dtsi"
21 bus-num = <0>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "spi-flash";
28 spi-max-frequency = <1000000>; /* input clock */
29 spi-cpol;
30 spi-cpha;
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/openbmc/u-boot/arch/sandbox/include/asm/
H A Daxi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
10 #define axi_emul_get_ops(dev) ((struct axi_emul_ops *)(dev)->driver->ops)
13 * axi_sandbox_get_emul() - Retrieve a pointer to a AXI emulation device
14 * @bus: The AXI bus from which to retrieve a emulation device
16 * device
17 * @length: The data width of a transfer that should be handled by a emulation
18 * device
19 * @emulp: Pointer to a buffer receiving the emulation device that handles
22 * To test the AXI uclass, we implement a simple AXI emulation device, which is
23 * a virtual device on a AXI bus that exposes a simple storage interface: When
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/openbmc/qemu/ui/
H A Dconsole.c27 #include "hw/qdev-core.h"
29 #include "qapi/qapi-commands-ui.h"
32 #include "qemu/error-report.h"
33 #include "qemu/main-loop.h"
42 #include "console-priv.h"
49 Object *device; member
89 ds->refreshing = true; in gui_update()
91 ds->refreshing = false; in gui_update()
93 QLIST_FOREACH(dcl, &ds->listeners, next) { in gui_update()
94 dcl_interval = dcl->update_interval ? in gui_update()
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/openbmc/u-boot/include/
H A Dspd.h1 /* SPDX-License-Identifier: GPL-2.0+ */
16 unsigned char chip_size; /* 1 Total # bytes of SPD memory device */
21 unsigned char dataw_lsb; /* 6 Data Width of this assembly */
22 unsigned char dataw_msb; /* 7 ... Data Width continuation */
28 unsigned char primw; /* 13 Primary SDRAM Width */
29 unsigned char ecw; /* 14 Error Checking SDRAM width */
32 unsigned char nbanks; /* 17 # of Banks on Each SDRAM Device */
37 unsigned char dev_attr; /* 22 SDRAM Device Attributes */
38 unsigned char clk_cycle2; /* 23 Min SDRAM Cycle time at CL=X-1 */
39 unsigned char clk_access2; /* 24 SDRAM Access from Clock at CL=X-1 */
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H A Dvideo_console.h1 /* SPDX-License-Identifier: GPL-2.0+ */
41 * struct vidconsole_priv - uclass-private data about a console device
46 * @sdev: stdio device, acting as an output sink
51 * @x_charsize: Character width in pixels
53 * @tab_width_frac: Tab width in fractional units
54 * @xsize_frac: Width of the display in fractional units
88 * struct vidconsole_ops - Video console operations
92 * of an entire line of text - typically 16 pixels).
96 * putc_xy() - write a single character to a position
98 * @dev: Device to write to
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H A Dvideo.h9 * AIRVENT SAM s.p.a - RIMINI(ITALY)
32 * Bits per pixel selector. Each value n is such that the bits-per-pixel is
53 * struct video_priv - Device information used by the video uclass
71 * @cmap: Colour map for 8-bit-per-pixel displays
72 * @fg_col_idx: Foreground color code (bit 3 = bold, bit 0-2 = color)
97 /* Placeholder - there are no video operations at present */
101 #define video_get_ops(dev) ((struct video_ops *)(dev)->driver->ops)
104 * video_reserve() - Reserve frame-buffer memory for video devices
109 * a size and position for each frame buffer as part of the pre-relocation
110 * process of determining the post-relocation memory layout.
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/openbmc/u-boot/drivers/pinctrl/
H A Dpinctrl-single.c1 // SPDX-License-Identifier: GPL-2.0+
17 u32 mask; /* configuration-value mask bits */
18 int width; /* configuration register bit width */ member
27 * single_configure_pins() - Configure pins based on FDT data
29 * @dev: Pointer to single pin configuration device which is the parent of
34 * This pointer points to a 'pinctrl-single,pins' property in the
35 * device-tree.
44 struct single_pdata *pdata = dev->platdata; in single_configure_pins()
50 reg = fdt32_to_cpu(pins->reg); in single_configure_pins()
51 if ((reg < 0) || (reg > pdata->offset)) { in single_configure_pins()
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/openbmc/qemu/docs/specs/
H A Drocker.rst23 --------
26 device. The intended audience is authors of OS drivers and device emulation
30 -------------------------
38 * Field width is in bytes, unless otherwise noted.
39 * Register are (R) read-only, (R/W) read/write, (W) write-only, or (COR) clear
41 * TLV values in network-byte-order are designated with (N).
48 -----------------------
50 Each switch instance registers as a PCI device with PCI configuration space::
52 offset width description value
53 ---------------------------------------------
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/openbmc/u-boot/doc/device-tree-bindings/serial/
H A Dsnps-dw-apb-uart.txt4 - compatible : "snps,dw-apb-uart"
5 - reg : offset and length of the register set for the device.
6 - interrupts : should contain uart interrupt.
10 - clock-frequency : the input clock frequency for the UART.
11 - clocks : phandle to the input clock
14 - clock-names: tuple listing input clock names.
18 - snps,uart-16550-compatible : reflects the value of UART_16550_COMPATIBLE
21 - resets : phandle to the parent reset controller.
22 - reg-shift : quantity to shift the register offsets by. If this property is
24 - reg-io-width : the size (in bytes) of the IO accesses that should be
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/openbmc/qemu/hw/display/
H A Dapple-gfx.m2 * QEMU Apple ParavirtualizedGraphics.framework device
6 * SPDX-License-Identifier: GPL-2.0-or-later
10 * proprietary guest communication channel to drive it. This device model
20 #include "block/aio-wait.h"
21 #include "system/address-spaces.h"
25 #include "apple-gfx.h"
48 /* ------ PGTask and task operations: new/destroy/map/unmap ------ */
56 * A "task" in PVG terminology represents a host-virtual contiguous address
60 * This type of operation isn't well-supported by QEMU's memory subsystem,
94 task->s = s;
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H A Dbochs-display.c5 * See the COPYING file in the top-level directory.
12 #include "hw/qdev-properties.h"
14 #include "hw/display/bochs-vbe.h"
20 #include "ui/qemu-pixman.h"
26 uint32_t width; member
37 /* device elements */
45 /* device config */
51 /* device registers */
55 /* device state */
59 #define TYPE_BOCHS_DISPLAY "bochs-display"
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H A Dramfb.c11 * See the COPYING file in the top-level directory.
18 #include "hw/display/bochs-vbe.h" /* for limits */
26 uint32_t width; member
35 uint32_t width, height; member
47 static DisplaySurface *ramfb_create_display_surface(int width, int height, in ramfb_create_display_surface() argument
55 if (width < 16 || width > VBE_DISPI_MAX_XRES || in ramfb_create_display_surface()
60 linesize = width * PIXMAN_FORMAT_BPP(format) / 8; in ramfb_create_display_surface()
65 mapsize = size = stride * (height - 1) + linesize; in ramfb_create_display_surface()
72 surface = qemu_create_displaysurface_from(width, height, in ramfb_create_display_surface()
74 pixman_image_set_destroy_function(surface->image, in ramfb_create_display_surface()
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/openbmc/u-boot/drivers/i2c/muxes/
H A Dpca954x.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 - 2016 Xilinx, Inc.
13 #include <asm-generic/gpio.h>
30 u32 width; member
35 u32 width; /* I2C mux width - number of busses */ member
43 .width = 4,
48 .width = 8,
53 .width = 8,
58 .width = 4,
68 return dm_i2c_write(mux, priv->addr, &byte, 1); in pca954x_deselect()
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