1*75219d57SThomas Chou* Synopsys DesignWare ABP UART
2*75219d57SThomas Chou
3*75219d57SThomas ChouRequired properties:
4*75219d57SThomas Chou- compatible : "snps,dw-apb-uart"
5*75219d57SThomas Chou- reg : offset and length of the register set for the device.
6*75219d57SThomas Chou- interrupts : should contain uart interrupt.
7*75219d57SThomas Chou
8*75219d57SThomas ChouClock handling:
9*75219d57SThomas ChouThe clock rate of the input clock needs to be supplied by one of
10*75219d57SThomas Chou- clock-frequency : the input clock frequency for the UART.
11*75219d57SThomas Chou- clocks : phandle to the input clock
12*75219d57SThomas Chou
13*75219d57SThomas ChouThe supplying peripheral clock can also be handled, needing a second property
14*75219d57SThomas Chou- clock-names: tuple listing input clock names.
15*75219d57SThomas Chou	Required elements: "baudclk", "apb_pclk"
16*75219d57SThomas Chou
17*75219d57SThomas ChouOptional properties:
18*75219d57SThomas Chou- snps,uart-16550-compatible : reflects the value of UART_16550_COMPATIBLE
19*75219d57SThomas Chou  configuration parameter. Define this if your UART does not implement the busy
20*75219d57SThomas Chou  functionality.
21*75219d57SThomas Chou- resets : phandle to the parent reset controller.
22*75219d57SThomas Chou- reg-shift : quantity to shift the register offsets by.  If this property is
23*75219d57SThomas Chou  not present then the register offsets are not shifted.
24*75219d57SThomas Chou- reg-io-width : the size (in bytes) of the IO accesses that should be
25*75219d57SThomas Chou  performed on the device.  If this property is not present then single byte
26*75219d57SThomas Chou  accesses are used.
27*75219d57SThomas Chou- dcd-override : Override the DCD modem status signal. This signal will always
28*75219d57SThomas Chou  be reported as active instead of being obtained from the modem status
29*75219d57SThomas Chou  register. Define this if your serial port does not use this pin.
30*75219d57SThomas Chou- dsr-override : Override the DTS modem status signal. This signal will always
31*75219d57SThomas Chou  be reported as active instead of being obtained from the modem status
32*75219d57SThomas Chou  register. Define this if your serial port does not use this pin.
33*75219d57SThomas Chou- cts-override : Override the CTS modem status signal. This signal will always
34*75219d57SThomas Chou  be reported as active instead of being obtained from the modem status
35*75219d57SThomas Chou  register. Define this if your serial port does not use this pin.
36*75219d57SThomas Chou- ri-override : Override the RI modem status signal. This signal will always be
37*75219d57SThomas Chou  reported as inactive instead of being obtained from the modem status register.
38*75219d57SThomas Chou  Define this if your serial port does not use this pin.
39*75219d57SThomas Chou
40*75219d57SThomas ChouExample:
41*75219d57SThomas Chou
42*75219d57SThomas Chou	uart@80230000 {
43*75219d57SThomas Chou		compatible = "snps,dw-apb-uart";
44*75219d57SThomas Chou		reg = <0x80230000 0x100>;
45*75219d57SThomas Chou		clock-frequency = <3686400>;
46*75219d57SThomas Chou		interrupts = <10>;
47*75219d57SThomas Chou		reg-shift = <2>;
48*75219d57SThomas Chou		reg-io-width = <4>;
49*75219d57SThomas Chou		dcd-override;
50*75219d57SThomas Chou		dsr-override;
51*75219d57SThomas Chou		cts-override;
52*75219d57SThomas Chou		ri-override;
53*75219d57SThomas Chou	};
54*75219d57SThomas Chou
55*75219d57SThomas ChouExample with one clock:
56*75219d57SThomas Chou
57*75219d57SThomas Chou	uart@80230000 {
58*75219d57SThomas Chou		compatible = "snps,dw-apb-uart";
59*75219d57SThomas Chou		reg = <0x80230000 0x100>;
60*75219d57SThomas Chou		clocks = <&baudclk>;
61*75219d57SThomas Chou		interrupts = <10>;
62*75219d57SThomas Chou		reg-shift = <2>;
63*75219d57SThomas Chou		reg-io-width = <4>;
64*75219d57SThomas Chou	};
65*75219d57SThomas Chou
66*75219d57SThomas ChouExample with two clocks:
67*75219d57SThomas Chou
68*75219d57SThomas Chou	uart@80230000 {
69*75219d57SThomas Chou		compatible = "snps,dw-apb-uart";
70*75219d57SThomas Chou		reg = <0x80230000 0x100>;
71*75219d57SThomas Chou		clocks = <&baudclk>, <&apb_pclk>;
72*75219d57SThomas Chou		clock-names = "baudclk", "apb_pclk";
73*75219d57SThomas Chou		interrupts = <10>;
74*75219d57SThomas Chou		reg-shift = <2>;
75*75219d57SThomas Chou		reg-io-width = <4>;
76*75219d57SThomas Chou	};
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