Lines Matching +full:device +full:- +full:width

1 /* SPDX-License-Identifier: GPL-2.0+ */
16 	unsigned char chip_size;   /*  1 Total # bytes of SPD memory device */
21 	unsigned char dataw_lsb;   /*  6 Data Width of this assembly */
22 	unsigned char dataw_msb;   /*  7 ... Data Width continuation */
28 	unsigned char primw;       /* 13 Primary SDRAM Width */
29 	unsigned char ecw;         /* 14 Error Checking SDRAM width */
32 	unsigned char nbanks;      /* 17 # of Banks on Each SDRAM Device */
37 	unsigned char dev_attr;    /* 22 SDRAM Device Attributes */
38 	unsigned char clk_cycle2;  /* 23 Min SDRAM Cycle time at CL=X-1 */
39 	unsigned char clk_access2; /* 24 SDRAM Access from Clock at CL=X-1 */
40 	unsigned char clk_cycle3;  /* 25 Min SDRAM Cycle time at CL=X-2 */
41 	unsigned char clk_access3; /* 26 Max Access from Clock at CL=X-2 */
45 	unsigned char tras;        /* 30 Minimum RAS Pulse Width (tRAS) */
58 	unsigned char tckmax;      /* 43 Max device cycle time tCKmax */
62 	unsigned char res[15];     /* 47-xx IDD in SPD and Reserved space */
64 	unsigned char cksum;       /* 63 Checksum for bytes 0-62 */
65 	unsigned char mid[8];      /* 64 Mfr's JEDEC ID code per JEP-108E */