| /openbmc/linux/include/linux/ |
| H A D | rio_drv.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
46 * rio_local_read_config_32 - Read 32 bits from local configuration space
48 * @offset: Offset into local configuration space
52 * device's configuration space.
61 * rio_local_write_config_32 - Write 32 bits to local configuration space
63 * @offset: Offset into local configuration space
67 * device's configuration space.
76 * rio_local_read_config_16 - Read 16 bits from local configuration space
78 * @offset: Offset into local configuration space
82 * device's configuration space.
[all …]
|
| /openbmc/linux/drivers/rapidio/ |
| H A D | rio-access.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * RapidIO configuration space access support
15 * Wrappers for all RIO configuration access functions. They just check
16 * alignment and call the low-level functions pointed to by rio_mport->ops.
24 * RIO_LOP_READ - Generate rio_local_read_config_* functions
25 * @size: Size of configuration space read (8, 16, 32 bits)
27 * @len: Length of configuration space read (1, 2, 4 bytes)
30 * configuration space registers on the local device.
39 res = mport->ops->lcread(mport, mport->id, offset, len, &data); \
45 * RIO_LOP_WRITE - Generate rio_local_write_config_* functions
[all …]
|
| /openbmc/linux/arch/arm/mach-pxa/ |
| H A D | smemc.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */
20 #define MECR (SMEMC_VIRT + 0x14) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
21 #define SXLCR (SMEMC_VIRT + 0x18) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
24 #define MCMEM0 (SMEMC_VIRT + 0x28) /* Card interface Common Memory Space Socket 0 Timing */
25 #define MCMEM1 (SMEMC_VIRT + 0x2C) /* Card interface Common Memory Space Socket 1 Timing */
26 …ine MCATT0 (SMEMC_VIRT + 0x30) /* Card interface Attribute Space Socket 0 Timing Configuration */
27 …ine MCATT1 (SMEMC_VIRT + 0x34) /* Card interface Attribute Space Socket 1 Timing Configuration */
28 #define MCIO0 (SMEMC_VIRT + 0x38) /* Card interface I/O Space Socket 0 Timing Configuration */
29 #define MCIO1 (SMEMC_VIRT + 0x3C) /* Card interface I/O Space Socket 1 Timing Configuration */
[all …]
|
| /openbmc/openbmc/poky/bitbake/lib/bb/ |
| H A D | monitordisk.py | 4 # SPDX-License-Identifier: GPL-2.0-only
12 logger.error("%s\n Disk space monitor will NOT be enabled" % info)
16 """ Convert the space unit G, M, K, the unit is case-insensitive """
18 unitG = re.match(r'([1-9][0-9]*)[gG]\s?$', unit)
21 unitM = re.match(r'([1-9][0-9]*)[mM]\s?$', unit)
24 unitK = re.match(r'([1-9][0-9]*)[kK]\s?$', unit)
27 unitN = re.match(r'([1-9][0-9]*)\s?$', unit)
64 """Prepare disk data for disk space monitor"""
71 # The input format is: "dir,space,inode", dir is a must, space
81 …warnonce("The BB_DISKMON_DIRS \"ABORT\" action has been renamed to \"HALT\", update configuration")
[all …]
|
| /openbmc/linux/drivers/pci/ |
| H A D | pci-bridge-emul.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
7 /* PCI configuration space of a PCI-to-PCI bridge. */
42 /* PCI configuration space of the PCIe capabilities */
78 * configuration space. Return PCI_BRIDGE_EMUL_HANDLED when the
82 * in-memory copy of the configuration space.
88 * Same as ->read_base(), except it is for reading from the
89 * PCIe capability configuration space.
95 * Same as ->read_base(), except it is for reading from the
96 * PCIe extended capability configuration space.
102 * Called when writing to the regular PCI bridge configuration
[all …]
|
| /openbmc/u-boot/doc/mvebu/ |
| H A D | armada-8k-memory.txt | 1 Memory Layout on Armada-8k SoC's
4 The below desribes the physical memory layout for Marvell's Armada-8k SoC's.
6 This assumes that the SoC includes Dual CP configuration, in case the flavor is using
7 a single CP configuration, then all secondary-CP mappings are invalid.
12 --------------------------------------------------------------------------
15 0xF0000000 0xF0FFFFFF AP Internal registers space
19 0xF2000000 0xF3FFFFFF CP-0 Internal (configuration) registers
20 space.
22 0xF4000000 0xF5FFFFFF CP-1 Internal (configuration) registers
23 space.
[all …]
|
| /openbmc/u-boot/drivers/pci/ |
| H A D | pcie_ecam_generic.c | 1 // SPDX-License-Identifier: GPL-2.0
17 * struct generic_ecam_pcie - generic_ecam PCIe controller state
18 * @cfg_base: The base address of memory mapped configuration space
25 * pci_generic_ecam_conf_address() - Calculate the address of a config access
28 * @offset: The offset into the device's configuration space
32 * configuration space access for a given device identified by the PCIe
44 addr = pcie->cfg_base; in pci_generic_ecam_conf_address()
55 * pci_generic_ecam_read_config() - Read from configuration space
58 * @offset: The offset into the device's configuration space
62 * Read a value of size @size from offset @offset within the configuration
[all …]
|
| H A D | pcie_xilinx.c | 1 // SPDX-License-Identifier: GPL-2.0
15 * struct xilinx_pcie - Xilinx PCIe controller state
16 * @cfg_base: The base address of memory mapped configuration space
27 * pcie_xilinx_link_up() - Check whether the PCIe link is up
36 uint32_t pscr = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_PSCR); in pcie_xilinx_link_up()
42 * pcie_xilinx_config_address() - Calculate the address of a config access
45 * @offset: The offset into the device's configuration space
49 * configuration space access for a given device identified by the PCIe
55 * Return: 0 on success, else -ENODEV
67 return -ENODEV; in pcie_xilinx_config_address()
[all …]
|
| H A D | pcie_dw_mvebu.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 * - drivers/pci/pcie_imx.c
9 * - drivers/pci/pci_mvebu.c
10 * - drivers/pci/pcie_xilinx.c
17 #include <asm-generic/gpio.h>
21 /* PCI Config space registers */
97 * struct pcie_dw_mvebu - MVEBU DW PCIe controller state
99 * @ctrl_base: The base address of the register space
100 * @cfg_base: The base address of the configuration space
101 * @cfg_size: The size of the configuration space which is needed
[all …]
|
| /openbmc/linux/Documentation/PCI/ |
| H A D | acpi-info.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 method for accessing PCI config space below it, the address space windows
33 reserving address space. The static tables are for things the OS needs to
39 If the OS is expected to manage a non-discoverable device described via
45 describe all the address space they consume. This includes all the windows
50 These are all device-specific, non-architected things, so the only way a
52 the device-specific details. The host bridge registers also include ECAM
53 space, since it is consumed by the host bridge.
58 spec defines Consumer/Producer only for the Extended Address Space
60 Address Space descriptors. Consequently, OSes have to assume all
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | dcsr.txt | 17 debug blocks defined within this memory space.
21 - compatible
24 Definition: Must include "fsl,dcsr" and "simple-bus".
25 The DCSR space exists in the memory-mapped bus.
27 - #address-cells
33 - #size-cells
40 - ranges
42 Value type: <prop-encoded-array>
44 range of the DCSR space.
48 #address-cells = <1>;
[all …]
|
| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | mpspec.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
22 u32 mpf_physptr; /* Configuration table address */
26 u8 mpf_feature1; /* Predefined or Unique configuration? */
51 /* Base MP configuration table entry types */
147 /* Extended MP configuration table entry types */
190 * X100 - X3FF
191 * X500 - X7FF
192 * X900 - XBFF
193 * XD00 - XFFF
197 * X3B0 - X3BB
[all …]
|
| /openbmc/linux/include/uapi/linux/ |
| H A D | vduse.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
23 * struct vduse_dev_config - basic configuration of a VDUSE device
31 * @config_size: the size of the configuration space
32 * @config: the buffer of the configuration space
61 * struct vduse_iotlb_entry - entry of IOTLB to describe one IOVA region [start, last]
81 * and return the corresponding file descriptor. Return -EINVAL means the
94 * struct vduse_config_data - data used to update configuration space
95 * @offset: the offset from the beginning of configuration space
96 * @length: the length to write to configuration space
100 * configuration space.
[all …]
|
| /openbmc/qemu/linux-headers/linux/ |
| H A D | vduse.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
23 * struct vduse_dev_config - basic configuration of a VDUSE device
31 * @config_size: the size of the configuration space
32 * @config: the buffer of the configuration space
61 * struct vduse_iotlb_entry - entry of IOTLB to describe one IOVA region [start, last]
81 * and return the corresponding file descriptor. Return -EINVAL means the
94 * struct vduse_config_data - data used to update configuration space
95 * @offset: the offset from the beginning of configuration space
96 * @length: the length to write to configuration space
100 * configuration space.
[all …]
|
| /openbmc/openbmc/poky/documentation/kernel-dev/ |
| H A D | advanced.rst | 1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK
4 Working with Advanced Metadata (``yocto-kernel-cache``)
10 In addition to supporting configuration fragments and patches, the Yocto
15 complexity of the configuration and sources used to support multiple
19 :ref:`overview-manual/development-environment:yocto project source repositories`
20 is the ``yocto-kernel-cache`` Git repository. You can find this repository
24 Kernel development tools ("kern-tools") are also available in the Yocto Project
26 ``yocto-kernel-tools`` Git repository. The recipe that builds these
27 tools is ``meta/recipes-kernel/kern-tools/kern-tools-native_git.bb`` in
35 Metadata, which is located in the ``yocto-kernel-cache`` Git repository.
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/pci/ |
| H A D | snps,dw-pcie.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Root Port controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie
23 - compatible
[all …]
|
| H A D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
22 DWC PCIe CSR space is normally accessed over the dedicated Data Bus
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
[all …]
|
| H A D | host-generic-pci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
14 virtio-pci implementations found in kvmtool and other para-virtualised
17 configuration of a control interface by the operating system, instead
19 Configuration Spaces.
21 Configuration Space is assumed to be memory-mapped (as opposed to being
[all …]
|
| H A D | nvidia,tegra20-pcie.txt | 4 - compatible: Must be:
5 - "nvidia,tegra20-pcie": for Tegra20
6 - "nvidia,tegra30-pcie": for Tegra30
7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132
8 - "nvidia,tegra210-pcie": for Tegra210
9 - "nvidia,tegra186-pcie": for Tegra186
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
13 - device_type: Must be "pci"
14 - reg: A list of physical base address and length for each set of controller
15 registers. Must contain an entry for each entry in the reg-names property.
[all …]
|
| H A D | snps,dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie-ep
23 - compatible
[all …]
|
| /openbmc/linux/Documentation/usb/ |
| H A D | functionfs.rst | 6 unique behaviour. It may be added to an USB configuration only after
7 the user space driver has registered by writing descriptors and
8 strings (the user space program has to provide the same information
10 the configuration).
15 From user space point of view it is a file system which when
16 mounted provides an "ep0" file. User space driver need to
28 numbers and changing of the configuration (which means that
30 configuration changes to (say) endpoint 2)). "ep0" is used
42 where the last two are implemented via FunctionFS. On user space
46 $ mkdir /dev/ffs-mtp && mount -t functionfs mtp /dev/ffs-mtp
[all …]
|
| /openbmc/dbus-sensors/include/linux/ |
| H A D | peci-ioctl.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018-2019 Intel Corporation */
4 // clang-format off
48 * enum peci_cmd - PECI client commands
53 * @PECI_CMD_RD_PKG_CFG: read access to the PCS (Package Configuration Space)
54 * @PECI_CMD_WR_PKG_CFG: write access to the PCS (Package Configuration Space)
58 * @PECI_CMD_RD_PCI_CFG: sideband read access to the PCI configuration space
60 * @PECI_CMD_WR_PCI_CFG: sideband write access to the PCI configuration space
62 * @PECI_CMD_RD_PCI_CFG_LOCAL: sideband read access to the PCI configuration
63 * space that resides within the processor
[all …]
|
| /openbmc/linux/Documentation/userspace-api/media/mediactl/ |
| H A D | request-api.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
4 .. _media-request-api:
12 the same pipeline to reconfigure and collaborate closely on a per-frame basis.
14 to specific frames (aka 'per-frame controls') in order to be used efficiently.
16 While the initial use-case was V4L2, it can be extended to other subsystems
20 it is, it is terribly inefficient: user-space would have to flush all activity
22 be processed with that configuration, and wait until they are all available for
26 The Request API allows a specific configuration of the pipeline (media
27 controller topology + configuration for each media entity) to be associated with
28 specific buffers. This allows user-space to schedule several tasks ("requests")
[all …]
|
| /openbmc/linux/include/misc/ |
| H A D | ocxl.h | 1 // SPDX-License-Identifier: GPL-2.0+
10 * device configuration space, adding a Process Element to the Shared
14 * reuse common code. A bit like a in-kernel library.
32 u8 pp_mmio_bar; /* per-process MMIO area */
52 OCXL_BIG_ENDIAN = 0, /**< AFU data is big-endian */
53 OCXL_LITTLE_ENDIAN = 1, /**< AFU data is little-endian */
65 * ocxl_function_open() - Open an OpenCAPI function on an OpenCAPI device
73 * ocxl_function_afu_list() - Get the list of AFUs associated with a PCI function device
81 * ocxl_function_fetch_afu() - Fetch an AFU instance from an OpenCAPI function
92 * ocxl_afu_get() - Take a reference to an AFU
[all …]
|
| /openbmc/linux/Documentation/driver-api/rapidio/ |
| H A D | rapidio.rst | 5 The RapidIO standard is a packet-based fabric interconnect standard designed for
8 is publicly available for download from the RTA web-site [1].
17 into the kernel similarly to other buses by defining RapidIO-specific device and
21 architecture-specific interfaces that provide support for common RapidIO
33 ---------------
50 ----------
54 structure. Devices form one global device list and per-network device lists
58 ----------
68 specific switch drivers that are designed to provide hardware-specific
72 -----------
[all …]
|