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/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,bam-dma.yaml4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#
7 title: Qualcomm Technologies Inc BAM DMA controller
21 - qcom,bam-v1.3.0
23 - qcom,bam-v1.4.0
25 - qcom,bam-v1.7.0
29 - qcom,bam-v1.7.4
30 - const: qcom,bam-v1.7.0
52 Indicates supported number of DMA channels in a remotely controlled bam.
57 Indicates that the bam is controlled by remote processor i.e. execution
72 controlled bam.
[all …]
/openbmc/linux/include/linux/dma/
H A Dqcom_bam_dma.h13 * supported by BAM DMA Engine.
38 * prep_bam_ce_le32 - Wrapper function to prepare a single BAM command
41 * @bam_ce: bam command element
43 * @cmd: BAM command
57 * bam_prep_ce - Wrapper function to prepare a single BAM command element
60 * @bam_ce: BAM command element
62 * @cmd: BAM command
H A Dipu-dma.h99 /* Note the enum values correspond to BAM value */
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dqcom,bam-dmux.yaml4 $id: http://devicetree.org/schemas/net/qcom,bam-dmux.yaml#
7 title: Qualcomm BAM Data Multiplexer
13 The BAM Data Multiplexer provides access to the network data channels
16 (Qualcomm BAM DMA) and bidirectional interrupts to coordinate power control.
25 const: qcom,bam-dmux
79 bam-dmux {
80 compatible = "qcom,bam-dmux";
/openbmc/linux/drivers/dma/qcom/
H A Dbam_dma.c6 * QCOM BAM DMA engine driver
8 * QCOM BAM DMA blocks are distributed amongst a number of the on-chip
201 /* BAM CTRL */
212 /* BAM REVISION */
234 /* BAM NUM PIPES */
242 /* BAM CNFG BITS */
404 * bam_addr - returns BAM register address
405 * @bdev: bam device
421 * bam_reset() - reset and initialize BAM registers
422 * @bdev: bam device
[all …]
H A DKconfig14 tristate "QCOM BAM DMA support"
19 Enable support for the QCOM BAM DMA controller. This controller
/openbmc/linux/drivers/mmc/host/
H A Dmmci_qcom_dml.c66 /* Set the Producer BAM block size */ in qcom_dma_start()
69 /* Set Producer BAM Transaction size */ in qcom_dma_start()
147 * want the BAM interface to connect with SDCC-DML. in qcom_dma_setup()
152 * BAM connected with DML should MASTER the AHB bus. in qcom_dma_setup()
164 * Initialize the logical BAM pipe size for producer in qcom_dma_setup()
/openbmc/linux/drivers/mtd/nand/raw/
H A Dqcom_nandc.c227 /* Don't set the EOT in current tx BAM sgl */
229 /* Set the NWD flag in current BAM sgl */
231 /* Finish writing in the current BAM sgl and start writing in another BAM sgl */
242 * This data type corresponds to the BAM transaction which will be used for all
244 * @bam_ce - the array of BAM command elements
245 * @cmd_sgl - sgl for NAND BAM command pipe
246 * @data_sgl - sgl for NAND BAM consumer/producer pipe
288 * @bam_sgl - sgl which will be used for dma descriptor. Only used by BAM
289 * @sgl_cnt - number of SGL in bam_sgl. Only used by BAM
409 /* will be used only by QPIC for BAM DMA */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,msm8916-mss-pil.yaml132 bam-dmux:
133 $ref: /schemas/net/qcom,bam-dmux.yaml#
135 Qualcomm BAM Data Multiplexer (provides network interface to the modem)
/openbmc/linux/drivers/net/wwan/
H A DKconfig65 tristate "Qualcomm BAM-DMUX WWAN network driver"
68 The BAM Data Multiplexer provides access to the network data channels
H A Dqcom_bam_dmux.c3 * Qualcomm BAM-DMUX WWAN network driver
894 { .compatible = "qcom,bam-dmux" },
903 .name = "bam-dmux",
911 MODULE_DESCRIPTION("Qualcomm BAM-DMUX WWAN Network Driver");
/openbmc/linux/drivers/crypto/qce/
H A Dcore.c172 * Pipe pair number depends on the actual BAM dma pipe in qce_check_version()
173 * that is used for transfers. The BAM dma pipes are passed in qce_check_version()
176 * BAM dma pipes(rx, tx) CE pipe pair id in qce_check_version()
H A Ddma.h11 /* maximum data transfer block size between BAM and CE */
/openbmc/linux/drivers/mtd/
H A Dftl.c396 /* Write the BAM stub */ in prepare_xfer()
447 /* Read current BAM */ in copy_erase_unit()
460 printk( KERN_WARNING "ftl: Failed to read BAM cache in copy_erase_unit()!\n"); in copy_erase_unit()
474 printk( KERN_WARNING "ftl: Failed to write back to BAM cache in copy_erase_unit()!\n"); in copy_erase_unit()
516 /* Write the BAM to the transfer unit */ in copy_erase_unit()
523 printk( KERN_WARNING "ftl: Error writing BAM in copy_erase_unit\n"); in copy_erase_unit()
667 the BAM cache for the erase unit containing the free block. It
706 /* Is this unit's BAM cached? */ in find_free()
718 printk(KERN_WARNING"ftl: Error reading BAM in find_free\n"); in find_free()
902 /* Tag the BAM entry, and write the new block */ in ftl_write()
/openbmc/linux/drivers/i2c/busses/
H A Di2c-qup.c182 * is_tx_blk_mode: whether tx uses block or FIFO mode in case of non BAM xfer.
183 * is_rx_blk_mode: whether rx uses block or FIFO mode in case of non BAM xfer.
310 * Check for BAM mode and returns if already error has come for current in qup_i2c_interrupt()
320 * Don’t reset the QUP state in case of BAM mode. The BAM in qup_i2c_interrupt()
322 * which will clear the remaining schedule descriptors in BAM in qup_i2c_interrupt()
323 * HW FIFO and generates the BAM interrupt. in qup_i2c_interrupt()
736 /* scratch buf to read the BAM EOT FLUSH tags */ in qup_i2c_bam_schedule_desc()
852 /* set BAM mode */ in qup_i2c_bam_xfer()
875 * Make DMA descriptor and schedule the BAM transfer if its in qup_i2c_bam_xfer()
1490 * DMA using BAM : Appropriate for any transaction size but the address should
/openbmc/linux/Documentation/devicetree/bindings/slimbus/
H A Dqcom,slim.yaml40 - description: Interrupt for controller core's BAM
/openbmc/linux/tools/testing/selftests/bpf/prog_tests/
H A Dlinked_list.c750 id = btf__add_decl_tag(btf, "contains:bam:a", 9, 0); in test_btf()
751 if (!ASSERT_EQ(id, 10, "btf__add_decl_tag contains:bam:a")) in test_btf()
753 id = btf__add_struct(btf, "bam", 24); in test_btf()
754 if (!ASSERT_EQ(id, 11, "btf__add_struct bam")) in test_btf()
757 if (!ASSERT_OK(err, "btf__add_field bam::a")) in test_btf()
/openbmc/u-boot/board/freescale/m5249evb/
H A Dm5249evb.c70 /* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */ in dram_init()
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsda660-inforce-ifc6560.dts155 * BAM DMA interconnects support is in place.
167 * BAM DMA interconnects support is in place.
H A Dipq6018.dtsi335 compatible = "qcom,bam-v1.7.0";
441 compatible = "qcom,bam-v1.7.0";
519 compatible = "qcom,bam-v1.7.0";
H A Dipq9574.dtsi229 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
321 compatible = "qcom,bam-v1.7.0";
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019.dtsi243 compatible = "qcom,bam-v1.7.0";
310 compatible = "qcom,bam-v1.7.0";
481 compatible = "qcom,bam-v1.7.0";
H A Dqcom-mdm9615.dtsi313 compatible = "qcom,bam-v1.3.0";
323 compatible = "qcom,bam-v1.3.0";
/openbmc/linux/drivers/char/hw_random/
H A Dintel-rng.c109 /* BAM, CAM, DBM, FBM, GxM
111 { PCI_DEVICE(0x8086, 0x244c) }, /* BAM */
/openbmc/u-boot/drivers/video/
H A Dmx3fb.c273 u32 bam:3; member
321 u32 bam:3; member
546 params.pp.bam = 0; in ipu_init_channel_buffer()

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