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/openbmc/linux/drivers/i2c/busses/
H A Di2c-qup.c25 /* QUP Registers */
45 /* QUP States and reset values */
58 /* QUP OPERATIONAL FLAGS */
97 /* QUP tags */
105 /* QUP v2 tags */
144 * Max tags length (start, stop and maximum 2 bytes address) for each QUP
164 * total_tx_len: total tx length including tag bytes for current QUP transfer
165 * total_rx_len: total rx length including tag bytes for current QUP transfer
167 * tx_fifo_free: number of free bytes in current QUP block write.
170 * QUP block read
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p.dtsi502 compatible = "qcom,geni-se-qup";
527 interconnect-names = "qup-core",
528 "qup-config",
529 "qup-memory";
548 interconnect-names = "qup-core",
549 "qup-config",
550 "qup-memory";
569 interconnect-names = "qup-core",
570 "qup-config",
571 "qup-memory";
[all …]
H A Dsc7280.dtsi829 qup_opp_table: opp-table-qup {
983 compatible = "qcom,geni-se-qup";
1007 interconnect-names = "qup-core", "qup-config",
1008 "qup-memory";
1031 interconnect-names = "qup-core", "qup-config";
1050 interconnect-names = "qup-core", "qup-config";
1067 interconnect-names = "qup-core", "qup-config",
1068 "qup-memory";
1091 interconnect-names = "qup-core", "qup-config";
1110 interconnect-names = "qup-core", "qup-config";
[all …]
H A Dsdm670.dtsi680 compatible = "qcom,geni-se-qup";
690 interconnect-names = "qup-core";
707 interconnect-names = "qup-core", "qup-config", "qup-memory";
728 interconnect-names = "qup-core", "qup-config", "qup-memory";
749 interconnect-names = "qup-core", "qup-config", "qup-memory";
770 interconnect-names = "qup-core", "qup-config", "qup-memory";
791 interconnect-names = "qup-core", "qup-config", "qup-memory";
812 interconnect-names = "qup-core", "qup-config", "qup-memory";
833 interconnect-names = "qup-core", "qup-config", "qup-memory";
854 interconnect-names = "qup-core", "qup-config", "qup-memory";
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H A Dsm8450.dtsi377 qup_opp_table_100mhz: opp-table-qup {
794 compatible = "qcom,geni-se-qup";
818 interconnect-names = "qup-core", "qup-config", "qup-memory";
835 interconnect-names = "qup-core", "qup-config";
857 interconnect-names = "qup-core", "qup-config", "qup-memory";
874 interconnect-names = "qup-core", "qup-config";
896 interconnect-names = "qup-core", "qup-config", "qup-memory";
913 interconnect-names = "qup-core", "qup-config";
935 interconnect-names = "qup-core", "qup-config", "qup-memory";
952 interconnect-names = "qup-core", "qup-config";
[all …]
H A Dsc8180x.dtsi521 qup_virt: interconnect-qup-virt {
522 compatible = "qcom,sc8180x-qup-virt";
796 compatible = "qcom,geni-se-qup";
816 interconnect-names = "qup-core", "qup-config", "qup-memory";
830 interconnect-names = "qup-core", "qup-config";
844 interconnect-names = "qup-core", "qup-config";
857 interconnect-names = "qup-core", "qup-config", "qup-memory";
871 interconnect-names = "qup-core", "qup-config";
885 interconnect-names = "qup-core", "qup-config";
898 interconnect-names = "qup-core", "qup-config", "qup-memory";
[all …]
H A Dqdu1000.dtsi406 compatible = "qcom,geni-se-qup";
414 interconnect-names = "qup-core";
622 compatible = "qcom,geni-se-qup";
941 qup_uart0_default: qup-uart0-default-state {
946 qup_i2c1_data_clk: qup-i2c1-data-clk-state {
951 qup_spi1_data_clk: qup-spi1-data-clk-state {
956 qup_spi1_cs: qup-spi1-cs-state {
961 qup_i2c2_data_clk: qup-i2c2-data-clk-state {
966 qup_spi2_data_clk: qup-spi2-data-clk-state {
971 qup_spi2_cs: qup-spi2-cs-state {
[all …]
H A Dsc7180.dtsi555 qup_opp_table: opp-table-qup {
875 compatible = "qcom,geni-se-qup";
899 interconnect-names = "qup-core", "qup-config",
900 "qup-memory";
920 interconnect-names = "qup-core", "qup-config";
936 interconnect-names = "qup-core", "qup-config";
953 interconnect-names = "qup-core", "qup-config",
954 "qup-memory";
974 interconnect-names = "qup-core", "qup-config";
990 interconnect-names = "qup-core", "qup-config";
[all …]
H A Dsdm845.dtsi686 qup_opp_table: opp-table-qup {
1262 compatible = "qcom,geni-se-qup";
1272 interconnect-names = "qup-core";
1290 interconnect-names = "qup-core", "qup-config", "qup-memory";
1309 interconnect-names = "qup-core", "qup-config";
1328 interconnect-names = "qup-core", "qup-config";
1347 interconnect-names = "qup-core", "qup-config", "qup-memory";
1366 interconnect-names = "qup-core", "qup-config";
1385 interconnect-names = "qup-core", "qup-config";
1404 interconnect-names = "qup-core", "qup-config", "qup-memory";
[all …]
H A Dsm8550.dtsi816 compatible = "qcom,geni-se-qup";
840 interconnect-names = "qup-core", "qup-config", "qup-memory";
858 interconnect-names = "qup-core", "qup-config", "qup-memory";
880 interconnect-names = "qup-core", "qup-config", "qup-memory";
898 interconnect-names = "qup-core", "qup-config", "qup-memory";
920 interconnect-names = "qup-core", "qup-config", "qup-memory";
938 interconnect-names = "qup-core", "qup-config", "qup-memory";
960 interconnect-names = "qup-core", "qup-config", "qup-memory";
978 interconnect-names = "qup-core", "qup-config", "qup-memory";
1000 interconnect-names = "qup-core", "qup-config", "qup-memory";
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H A Dsc8280xp.dtsi865 compatible = "qcom,geni-se-qup";
890 interconnect-names = "qup-core", "qup-config", "qup-memory";
906 interconnect-names = "qup-core", "qup-config", "qup-memory";
922 interconnect-names = "qup-core", "qup-config", "qup-memory";
938 interconnect-names = "qup-core", "qup-config", "qup-memory";
952 interconnect-names = "qup-core", "qup-config";
968 interconnect-names = "qup-core", "qup-config", "qup-memory";
984 interconnect-names = "qup-core", "qup-config", "qup-memory";
1000 interconnect-names = "qup-core", "qup-config", "qup-memory";
1016 interconnect-names = "qup-core", "qup-config", "qup-memory";
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H A Dsm6125.dtsi438 qup_i2c0_default: qup-i2c0-default-state {
445 qup_i2c0_sleep: qup-i2c0-sleep-state {
452 qup_i2c1_default: qup-i2c1-default-state {
459 qup_i2c1_sleep: qup-i2c1-sleep-state {
466 qup_i2c2_default: qup-i2c2-default-state {
473 qup_i2c2_sleep: qup-i2c2-sleep-state {
480 qup_i2c3_default: qup-i2c3-default-state {
487 qup_i2c3_sleep: qup-i2c3-sleep-state {
494 qup_i2c4_default: qup-i2c4-default-state {
501 qup_i2c4_sleep: qup-i2c4-sleep-state {
[all …]
H A Dsm8250.dtsi740 qup_opp_table: opp-table-qup {
1004 compatible = "qcom,geni-se-qup";
1258 compatible = "qcom,geni-se-qup";
1573 compatible = "qcom,geni-se-qup";
4806 qup_i2c0_default: qup-i2c0-default-state {
4813 qup_i2c1_default: qup-i2c1-default-state {
4820 qup_i2c2_default: qup-i2c2-default-state {
4827 qup_i2c3_default: qup-i2c3-default-state {
4834 qup_i2c4_default: qup-i2c4-default-state {
4841 qup_i2c5_default: qup-i2c5-default-state {
[all …]
H A Dsa8775p-ride.dts564 qup_uart10_default: qup-uart10-state {
569 qup_spi16_default: qup-spi16-state {
576 qup_i2c11_default: qup-i2c11-state {
583 qup_i2c18_default: qup-i2c18-state {
590 qup_uart12_default: qup-uart12-state {
591 qup_uart12_cts: qup-uart12-cts-pins {
597 qup_uart12_rts: qup-uart12-rts-pins {
603 qup_uart12_tx: qup-uart12-tx-pins {
609 qup_uart12_rx: qup-uart12-rx-pins {
616 qup_uart17_default: qup-uart17-state {
[all …]
H A Dsm6350.dtsi478 qup_opp_table: opp-table-qup {
896 compatible = "qcom,geni-se-qup";
923 interconnect-names = "qup-core", "qup-config", "qup-memory";
939 interconnect-names = "qup-core", "qup-config";
959 interconnect-names = "qup-core", "qup-config", "qup-memory";
985 compatible = "qcom,geni-se-qup";
1012 interconnect-names = "qup-core", "qup-config", "qup-memory";
1032 interconnect-names = "qup-core", "qup-config", "qup-memory";
1052 interconnect-names = "qup-core", "qup-config", "qup-memory";
1066 interconnect-names = "qup-core", "qup-config";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dqcom,i2c-geni-qcom.yaml7 title: Qualcomm Geni based QUP I2C Controller
101 - const: qup-core
102 - const: qup-config
116 - const: qup-core
117 - const: qup-config
118 - const: qup-memory
142 interconnect-names = "qup-core", "qup-config", "qup-memory";
H A Dqcom,i2c-qup.yaml4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml#
7 title: Qualcomm Universal Peripheral (QUP) I2C controller
20 - qcom,i2c-qup-v1.1.1 # for 8660, 8960 and 8064
21 - qcom,i2c-qup-v2.1.1 # for 8974 v1
22 - qcom,i2c-qup-v2.2.1 # for 8974 v2 and later
73 compatible = "qcom,i2c-qup-v2.2.1";
/openbmc/linux/drivers/spi/
H A Dspi-qup.c342 struct spi_qup *qup = data; in spi_qup_dma_done() local
344 complete(&qup->done); in spi_qup_dma_done()
392 struct spi_qup *qup = spi_controller_get_devdata(host); in spi_qup_prep_sg() local
408 desc->callback_param = qup; in spi_qup_prep_sg()
449 struct spi_qup *qup = spi_controller_get_devdata(host); in spi_qup_do_dma() local
465 qup->n_words = spi_qup_sgl_get_nents_len(rx_sgl, in spi_qup_do_dma()
466 SPI_MAX_XFER, &rx_nents) / qup->w_size; in spi_qup_do_dma()
468 qup->n_words = spi_qup_sgl_get_nents_len(tx_sgl, in spi_qup_do_dma()
469 SPI_MAX_XFER, &tx_nents) / qup->w_size; in spi_qup_do_dma()
470 if (!qup->n_words) in spi_qup_do_dma()
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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dqcom,spi-qup.yaml4 $id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml#
7 title: Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
15 The QUP core is an AHB slave that provides a common data path (an output FIFO
27 - qcom,spi-qup-v1.1.1 # for 8660, 8960 and 8064
28 - qcom,spi-qup-v2.1.1 # for 8974 and later
29 - qcom,spi-qup-v2.2.1 # for 8974 v2 and later
68 compatible = "qcom,spi-qup-v2.2.1";
H A Dqcom,spi-geni-qcom.yaml7 title: GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
15 The QUP v3 core is a GENI based AHB slave that provides a common data path
23 Peripharal. Please refer GENI based QUP wrapper controller node bindings
54 - const: qup-core
55 - const: qup-config
56 - const: qup-memory
99 interconnect-names = "qup-core", "qup-config";
/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,geni-se.yaml7 title: GENI Serial Engine QUP Wrapper Controller
13 Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper
15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
16 Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP
23 - qcom,geni-se-qup
27 description: QUP wrapper common register address and length.
50 const: qup-core
128 compatible = "qcom,geni-se-qup";
H A Dqcom,gsbi.yaml45 CRCI MUX value for QUP CRCI ports. Please reference
70 $ref: /schemas/spi/qcom,spi-qup.yaml#
74 $ref: /schemas/i2c/qcom,i2c-qup.yaml#
119 compatible = "qcom,i2c-qup-v1.1.1";
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dqcom,serial-geni-qcom.yaml7 title: Qualcomm Geni based QUP UART interface
33 - const: qup-core
34 - const: qup-config
84 interconnect-names = "qup-core", "qup-config";
/openbmc/linux/drivers/soc/qcom/
H A Dqcom-geni-se.c23 * to manage GENI firmware based Qualcomm Universal Peripheral (QUP) Wrapper
24 * controller. QUP Wrapper is designed to support various serial bus protocols
31 * GENI based QUP is a highly-flexible and programmable module for supporting
33 * QUP module can provide upto 8 serial interfaces, using its internal
42 * |QUP Wrapper |
44 * --QUP & SE Clocks--> | Serial Engine N | +-IO------>
58 * Figure 1: GENI based QUP Wrapper
72 * geni_wrapper represents QUP Wrapper controller. This part of the driver
73 * manages QUP Wrapper information such as hardware version, clock
77 * engine information such as clocks, containing QUP Wrapper, etc. This part
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/openbmc/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,rpmh.yaml37 - qcom,sc7180-qup-virt
48 - qcom,sc8180x-qup-virt
91 - qcom,sm8250-qup-virt
116 - qcom,sm8250-qup-virt

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