160378f1aSVenkata Narendra Kumar Gutta// SPDX-License-Identifier: BSD-3-Clause 260378f1aSVenkata Narendra Kumar Gutta/* 360378f1aSVenkata Narendra Kumar Gutta * Copyright (c) 2020, The Linux Foundation. All rights reserved. 460378f1aSVenkata Narendra Kumar Gutta */ 560378f1aSVenkata Narendra Kumar Gutta 660378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/interrupt-controller/arm-gic.h> 77c1dffd4SDmitry Baryshkov#include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8b7e2fba0SBryan O'Donoghue#include <dt-bindings/clock/qcom,gcc-sm8250.h> 90e6aa9dbSJonathan Marek#include <dt-bindings/clock/qcom,gpucc-sm8250.h> 1060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/clock/qcom,rpmh.h> 117858ef3cSLuca Weiss#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h> 127858ef3cSLuca Weiss#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h> 1315049bb5SKonrad Dybcio#include <dt-bindings/dma/qcom-gpi.h> 1475948800SKonrad Dybcio#include <dt-bindings/gpio/gpio.h> 1579a595bbSSibi Sankar#include <dt-bindings/interconnect/qcom,osm-l3.h> 167c1dffd4SDmitry Baryshkov#include <dt-bindings/interconnect/qcom,sm8250.h> 17e5361e75SBjorn Andersson#include <dt-bindings/mailbox/qcom-ipcc.h> 18b6f78e27SBjorn Andersson#include <dt-bindings/power/qcom-rpmpd.h> 1934e2fd6aSRohit Agarwal#include <dt-bindings/power/qcom,rpmhpd.h> 2063e10791SSrinivas Kandagatla#include <dt-bindings/soc/qcom,apr.h> 2160378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/soc/qcom,rpmh-rsc.h> 2263e10791SSrinivas Kandagatla#include <dt-bindings/sound/qcom,q6afe.h> 23bac12f25SAmit Kucheria#include <dt-bindings/thermal/thermal.h> 24ca79a997SBryan O'Donoghue#include <dt-bindings/clock/qcom,camcc-sm8250.h> 255b9ec225Sjonathan@marek.ca#include <dt-bindings/clock/qcom,videocc-sm8250.h> 2660378f1aSVenkata Narendra Kumar Gutta 2760378f1aSVenkata Narendra Kumar Gutta/ { 2860378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 2960378f1aSVenkata Narendra Kumar Gutta 3060378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 3160378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 3260378f1aSVenkata Narendra Kumar Gutta 33e5813b15SDmitry Baryshkov aliases { 34e5813b15SDmitry Baryshkov i2c0 = &i2c0; 35e5813b15SDmitry Baryshkov i2c1 = &i2c1; 36e5813b15SDmitry Baryshkov i2c2 = &i2c2; 37e5813b15SDmitry Baryshkov i2c3 = &i2c3; 38e5813b15SDmitry Baryshkov i2c4 = &i2c4; 39e5813b15SDmitry Baryshkov i2c5 = &i2c5; 40e5813b15SDmitry Baryshkov i2c6 = &i2c6; 41e5813b15SDmitry Baryshkov i2c7 = &i2c7; 42e5813b15SDmitry Baryshkov i2c8 = &i2c8; 43e5813b15SDmitry Baryshkov i2c9 = &i2c9; 44e5813b15SDmitry Baryshkov i2c10 = &i2c10; 45e5813b15SDmitry Baryshkov i2c11 = &i2c11; 46e5813b15SDmitry Baryshkov i2c12 = &i2c12; 47e5813b15SDmitry Baryshkov i2c13 = &i2c13; 48e5813b15SDmitry Baryshkov i2c14 = &i2c14; 49e5813b15SDmitry Baryshkov i2c15 = &i2c15; 50e5813b15SDmitry Baryshkov i2c16 = &i2c16; 51e5813b15SDmitry Baryshkov i2c17 = &i2c17; 52e5813b15SDmitry Baryshkov i2c18 = &i2c18; 53e5813b15SDmitry Baryshkov i2c19 = &i2c19; 54e5813b15SDmitry Baryshkov spi0 = &spi0; 55e5813b15SDmitry Baryshkov spi1 = &spi1; 56e5813b15SDmitry Baryshkov spi2 = &spi2; 57e5813b15SDmitry Baryshkov spi3 = &spi3; 58e5813b15SDmitry Baryshkov spi4 = &spi4; 59e5813b15SDmitry Baryshkov spi5 = &spi5; 60e5813b15SDmitry Baryshkov spi6 = &spi6; 61e5813b15SDmitry Baryshkov spi7 = &spi7; 62e5813b15SDmitry Baryshkov spi8 = &spi8; 63e5813b15SDmitry Baryshkov spi9 = &spi9; 64e5813b15SDmitry Baryshkov spi10 = &spi10; 65e5813b15SDmitry Baryshkov spi11 = &spi11; 66e5813b15SDmitry Baryshkov spi12 = &spi12; 67e5813b15SDmitry Baryshkov spi13 = &spi13; 68e5813b15SDmitry Baryshkov spi14 = &spi14; 69e5813b15SDmitry Baryshkov spi15 = &spi15; 70e5813b15SDmitry Baryshkov spi16 = &spi16; 71e5813b15SDmitry Baryshkov spi17 = &spi17; 72e5813b15SDmitry Baryshkov spi18 = &spi18; 73e5813b15SDmitry Baryshkov spi19 = &spi19; 74e5813b15SDmitry Baryshkov }; 75e5813b15SDmitry Baryshkov 7660378f1aSVenkata Narendra Kumar Gutta chosen { }; 7760378f1aSVenkata Narendra Kumar Gutta 7860378f1aSVenkata Narendra Kumar Gutta clocks { 7960378f1aSVenkata Narendra Kumar Gutta xo_board: xo-board { 8060378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 8160378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8260378f1aSVenkata Narendra Kumar Gutta clock-frequency = <38400000>; 8360378f1aSVenkata Narendra Kumar Gutta clock-output-names = "xo_board"; 8460378f1aSVenkata Narendra Kumar Gutta }; 8560378f1aSVenkata Narendra Kumar Gutta 8660378f1aSVenkata Narendra Kumar Gutta sleep_clk: sleep-clk { 8760378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 889ff8b059SJonathan Marek clock-frequency = <32768>; 8960378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 9060378f1aSVenkata Narendra Kumar Gutta }; 9160378f1aSVenkata Narendra Kumar Gutta }; 9260378f1aSVenkata Narendra Kumar Gutta 9360378f1aSVenkata Narendra Kumar Gutta cpus { 9460378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 9560378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 9660378f1aSVenkata Narendra Kumar Gutta 9760378f1aSVenkata Narendra Kumar Gutta CPU0: cpu@0 { 9860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 9960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 10060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0>; 101d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 10260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1036aabed55SDanny Lin capacity-dmips-mhz = <448>; 104775a5283SVincent Guittot dynamic-power-coefficient = <105>; 10560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_0>; 10632bc936dSMaulik Shah power-domains = <&CPU_PD0>; 10732bc936dSMaulik Shah power-domain-names = "psci"; 10802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1098e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 110b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 1116d526ee4SKrzysztof Kozlowski <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 112bac12f25SAmit Kucheria #cooling-cells = <2>; 11360378f1aSVenkata Narendra Kumar Gutta L2_0: l2-cache { 11460378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1159435294cSPierre Gondois cache-level = <2>; 116ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 117ac1d8a8eSKrzysztof Kozlowski cache-unified; 11860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 11960378f1aSVenkata Narendra Kumar Gutta L3_0: l3-cache { 12060378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1219435294cSPierre Gondois cache-level = <3>; 122ac1d8a8eSKrzysztof Kozlowski cache-size = <0x400000>; 123ac1d8a8eSKrzysztof Kozlowski cache-unified; 12460378f1aSVenkata Narendra Kumar Gutta }; 12560378f1aSVenkata Narendra Kumar Gutta }; 12660378f1aSVenkata Narendra Kumar Gutta }; 12760378f1aSVenkata Narendra Kumar Gutta 12860378f1aSVenkata Narendra Kumar Gutta CPU1: cpu@100 { 12960378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 13060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 13160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x100>; 132d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 13360378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1346aabed55SDanny Lin capacity-dmips-mhz = <448>; 135775a5283SVincent Guittot dynamic-power-coefficient = <105>; 13660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_100>; 13732bc936dSMaulik Shah power-domains = <&CPU_PD1>; 13832bc936dSMaulik Shah power-domain-names = "psci"; 13902ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1408e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 141b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 1426d526ee4SKrzysztof Kozlowski <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 143bac12f25SAmit Kucheria #cooling-cells = <2>; 14460378f1aSVenkata Narendra Kumar Gutta L2_100: l2-cache { 14560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1469435294cSPierre Gondois cache-level = <2>; 147ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 148ac1d8a8eSKrzysztof Kozlowski cache-unified; 14960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 15060378f1aSVenkata Narendra Kumar Gutta }; 15160378f1aSVenkata Narendra Kumar Gutta }; 15260378f1aSVenkata Narendra Kumar Gutta 15360378f1aSVenkata Narendra Kumar Gutta CPU2: cpu@200 { 15460378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 15560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 15660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x200>; 157d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 15860378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1596aabed55SDanny Lin capacity-dmips-mhz = <448>; 160775a5283SVincent Guittot dynamic-power-coefficient = <105>; 16160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_200>; 16232bc936dSMaulik Shah power-domains = <&CPU_PD2>; 16332bc936dSMaulik Shah power-domain-names = "psci"; 16402ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1658e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 166b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 1676d526ee4SKrzysztof Kozlowski <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 168bac12f25SAmit Kucheria #cooling-cells = <2>; 16960378f1aSVenkata Narendra Kumar Gutta L2_200: l2-cache { 17060378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1719435294cSPierre Gondois cache-level = <2>; 172ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 173ac1d8a8eSKrzysztof Kozlowski cache-unified; 17460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 17560378f1aSVenkata Narendra Kumar Gutta }; 17660378f1aSVenkata Narendra Kumar Gutta }; 17760378f1aSVenkata Narendra Kumar Gutta 17860378f1aSVenkata Narendra Kumar Gutta CPU3: cpu@300 { 17960378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 18060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 18160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x300>; 182d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 18360378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1846aabed55SDanny Lin capacity-dmips-mhz = <448>; 185775a5283SVincent Guittot dynamic-power-coefficient = <105>; 18660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_300>; 18732bc936dSMaulik Shah power-domains = <&CPU_PD3>; 18832bc936dSMaulik Shah power-domain-names = "psci"; 18902ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1908e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 191b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 1926d526ee4SKrzysztof Kozlowski <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 193bac12f25SAmit Kucheria #cooling-cells = <2>; 19460378f1aSVenkata Narendra Kumar Gutta L2_300: l2-cache { 19560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1969435294cSPierre Gondois cache-level = <2>; 197ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 198ac1d8a8eSKrzysztof Kozlowski cache-unified; 19960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 20060378f1aSVenkata Narendra Kumar Gutta }; 20160378f1aSVenkata Narendra Kumar Gutta }; 20260378f1aSVenkata Narendra Kumar Gutta 20360378f1aSVenkata Narendra Kumar Gutta CPU4: cpu@400 { 20460378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 20560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 20660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x400>; 207d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 1>; 20860378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2096aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2106aabed55SDanny Lin dynamic-power-coefficient = <379>; 21160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_400>; 21232bc936dSMaulik Shah power-domains = <&CPU_PD4>; 21332bc936dSMaulik Shah power-domain-names = "psci"; 21402ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2158e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 216b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 2176d526ee4SKrzysztof Kozlowski <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 218bac12f25SAmit Kucheria #cooling-cells = <2>; 21960378f1aSVenkata Narendra Kumar Gutta L2_400: l2-cache { 22060378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2219435294cSPierre Gondois cache-level = <2>; 222ac1d8a8eSKrzysztof Kozlowski cache-size = <0x40000>; 223ac1d8a8eSKrzysztof Kozlowski cache-unified; 22460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 22560378f1aSVenkata Narendra Kumar Gutta }; 22660378f1aSVenkata Narendra Kumar Gutta }; 22760378f1aSVenkata Narendra Kumar Gutta 22860378f1aSVenkata Narendra Kumar Gutta CPU5: cpu@500 { 22960378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 23060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 23160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x500>; 232d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 1>; 23360378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2346aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2356aabed55SDanny Lin dynamic-power-coefficient = <379>; 23660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_500>; 23732bc936dSMaulik Shah power-domains = <&CPU_PD5>; 23832bc936dSMaulik Shah power-domain-names = "psci"; 23902ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2408e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 241b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 2426d526ee4SKrzysztof Kozlowski <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 243bac12f25SAmit Kucheria #cooling-cells = <2>; 24460378f1aSVenkata Narendra Kumar Gutta L2_500: l2-cache { 24560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2469435294cSPierre Gondois cache-level = <2>; 247ac1d8a8eSKrzysztof Kozlowski cache-size = <0x40000>; 248ac1d8a8eSKrzysztof Kozlowski cache-unified; 24960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 25060378f1aSVenkata Narendra Kumar Gutta }; 25160378f1aSVenkata Narendra Kumar Gutta }; 25260378f1aSVenkata Narendra Kumar Gutta 25360378f1aSVenkata Narendra Kumar Gutta CPU6: cpu@600 { 25460378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 25560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 25660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x600>; 257d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 1>; 25860378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2596aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2606aabed55SDanny Lin dynamic-power-coefficient = <379>; 26160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_600>; 26232bc936dSMaulik Shah power-domains = <&CPU_PD6>; 26332bc936dSMaulik Shah power-domain-names = "psci"; 26402ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2658e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 266b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 2676d526ee4SKrzysztof Kozlowski <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 268bac12f25SAmit Kucheria #cooling-cells = <2>; 26960378f1aSVenkata Narendra Kumar Gutta L2_600: l2-cache { 27060378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2719435294cSPierre Gondois cache-level = <2>; 272ac1d8a8eSKrzysztof Kozlowski cache-size = <0x40000>; 273ac1d8a8eSKrzysztof Kozlowski cache-unified; 27460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 27560378f1aSVenkata Narendra Kumar Gutta }; 27660378f1aSVenkata Narendra Kumar Gutta }; 27760378f1aSVenkata Narendra Kumar Gutta 27860378f1aSVenkata Narendra Kumar Gutta CPU7: cpu@700 { 27960378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 28060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 28160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x700>; 282d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 2>; 28360378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2846aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2856aabed55SDanny Lin dynamic-power-coefficient = <444>; 28660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_700>; 28732bc936dSMaulik Shah power-domains = <&CPU_PD7>; 28832bc936dSMaulik Shah power-domain-names = "psci"; 28902ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 2>; 2908e0e8016SThara Gopinath operating-points-v2 = <&cpu7_opp_table>; 291b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 2926d526ee4SKrzysztof Kozlowski <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 293bac12f25SAmit Kucheria #cooling-cells = <2>; 29460378f1aSVenkata Narendra Kumar Gutta L2_700: l2-cache { 29560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2969435294cSPierre Gondois cache-level = <2>; 297ac1d8a8eSKrzysztof Kozlowski cache-size = <0x80000>; 298ac1d8a8eSKrzysztof Kozlowski cache-unified; 29960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 30060378f1aSVenkata Narendra Kumar Gutta }; 30160378f1aSVenkata Narendra Kumar Gutta }; 302b4791e69SDanny Lin 303b4791e69SDanny Lin cpu-map { 304b4791e69SDanny Lin cluster0 { 305b4791e69SDanny Lin core0 { 306b4791e69SDanny Lin cpu = <&CPU0>; 307b4791e69SDanny Lin }; 308b4791e69SDanny Lin 309b4791e69SDanny Lin core1 { 310b4791e69SDanny Lin cpu = <&CPU1>; 311b4791e69SDanny Lin }; 312b4791e69SDanny Lin 313b4791e69SDanny Lin core2 { 314b4791e69SDanny Lin cpu = <&CPU2>; 315b4791e69SDanny Lin }; 316b4791e69SDanny Lin 317b4791e69SDanny Lin core3 { 318b4791e69SDanny Lin cpu = <&CPU3>; 319b4791e69SDanny Lin }; 320b4791e69SDanny Lin 321b4791e69SDanny Lin core4 { 322b4791e69SDanny Lin cpu = <&CPU4>; 323b4791e69SDanny Lin }; 324b4791e69SDanny Lin 325b4791e69SDanny Lin core5 { 326b4791e69SDanny Lin cpu = <&CPU5>; 327b4791e69SDanny Lin }; 328b4791e69SDanny Lin 329b4791e69SDanny Lin core6 { 330b4791e69SDanny Lin cpu = <&CPU6>; 331b4791e69SDanny Lin }; 332b4791e69SDanny Lin 333b4791e69SDanny Lin core7 { 334b4791e69SDanny Lin cpu = <&CPU7>; 335b4791e69SDanny Lin }; 336b4791e69SDanny Lin }; 337b4791e69SDanny Lin }; 33832bc936dSMaulik Shah 33932bc936dSMaulik Shah idle-states { 34032bc936dSMaulik Shah entry-method = "psci"; 34132bc936dSMaulik Shah 34232bc936dSMaulik Shah LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { 34332bc936dSMaulik Shah compatible = "arm,idle-state"; 34432bc936dSMaulik Shah idle-state-name = "silver-rail-power-collapse"; 34532bc936dSMaulik Shah arm,psci-suspend-param = <0x40000004>; 34632bc936dSMaulik Shah entry-latency-us = <360>; 34732bc936dSMaulik Shah exit-latency-us = <531>; 34832bc936dSMaulik Shah min-residency-us = <3934>; 34932bc936dSMaulik Shah local-timer-stop; 35032bc936dSMaulik Shah }; 35132bc936dSMaulik Shah 35232bc936dSMaulik Shah BIG_CPU_SLEEP_0: cpu-sleep-1-0 { 35332bc936dSMaulik Shah compatible = "arm,idle-state"; 35432bc936dSMaulik Shah idle-state-name = "gold-rail-power-collapse"; 35532bc936dSMaulik Shah arm,psci-suspend-param = <0x40000004>; 35632bc936dSMaulik Shah entry-latency-us = <702>; 35732bc936dSMaulik Shah exit-latency-us = <1061>; 35832bc936dSMaulik Shah min-residency-us = <4488>; 35932bc936dSMaulik Shah local-timer-stop; 36032bc936dSMaulik Shah }; 36132bc936dSMaulik Shah }; 36232bc936dSMaulik Shah 36332bc936dSMaulik Shah domain-idle-states { 36432bc936dSMaulik Shah CLUSTER_SLEEP_0: cluster-sleep-0 { 36532bc936dSMaulik Shah compatible = "domain-idle-state"; 36632bc936dSMaulik Shah arm,psci-suspend-param = <0x4100c244>; 36732bc936dSMaulik Shah entry-latency-us = <3264>; 36832bc936dSMaulik Shah exit-latency-us = <6562>; 36932bc936dSMaulik Shah min-residency-us = <9987>; 37032bc936dSMaulik Shah }; 37132bc936dSMaulik Shah }; 37260378f1aSVenkata Narendra Kumar Gutta }; 37360378f1aSVenkata Narendra Kumar Gutta 3740e3e6546SKrzysztof Kozlowski cpu0_opp_table: opp-table-cpu0 { 3758e0e8016SThara Gopinath compatible = "operating-points-v2"; 3768e0e8016SThara Gopinath opp-shared; 3778e0e8016SThara Gopinath 3788e0e8016SThara Gopinath cpu0_opp1: opp-300000000 { 3798e0e8016SThara Gopinath opp-hz = /bits/ 64 <300000000>; 3808e0e8016SThara Gopinath opp-peak-kBps = <800000 9600000>; 3818e0e8016SThara Gopinath }; 3828e0e8016SThara Gopinath 3838e0e8016SThara Gopinath cpu0_opp2: opp-403200000 { 3848e0e8016SThara Gopinath opp-hz = /bits/ 64 <403200000>; 3858e0e8016SThara Gopinath opp-peak-kBps = <800000 9600000>; 3868e0e8016SThara Gopinath }; 3878e0e8016SThara Gopinath 3888e0e8016SThara Gopinath cpu0_opp3: opp-518400000 { 3898e0e8016SThara Gopinath opp-hz = /bits/ 64 <518400000>; 3908e0e8016SThara Gopinath opp-peak-kBps = <800000 16588800>; 3918e0e8016SThara Gopinath }; 3928e0e8016SThara Gopinath 3938e0e8016SThara Gopinath cpu0_opp4: opp-614400000 { 3948e0e8016SThara Gopinath opp-hz = /bits/ 64 <614400000>; 3958e0e8016SThara Gopinath opp-peak-kBps = <800000 16588800>; 3968e0e8016SThara Gopinath }; 3978e0e8016SThara Gopinath 3988e0e8016SThara Gopinath cpu0_opp5: opp-691200000 { 3998e0e8016SThara Gopinath opp-hz = /bits/ 64 <691200000>; 4008e0e8016SThara Gopinath opp-peak-kBps = <800000 19660800>; 4018e0e8016SThara Gopinath }; 4028e0e8016SThara Gopinath 4038e0e8016SThara Gopinath cpu0_opp6: opp-787200000 { 4048e0e8016SThara Gopinath opp-hz = /bits/ 64 <787200000>; 4058e0e8016SThara Gopinath opp-peak-kBps = <1804000 19660800>; 4068e0e8016SThara Gopinath }; 4078e0e8016SThara Gopinath 4088e0e8016SThara Gopinath cpu0_opp7: opp-883200000 { 4098e0e8016SThara Gopinath opp-hz = /bits/ 64 <883200000>; 4108e0e8016SThara Gopinath opp-peak-kBps = <1804000 23347200>; 4118e0e8016SThara Gopinath }; 4128e0e8016SThara Gopinath 4138e0e8016SThara Gopinath cpu0_opp8: opp-979200000 { 4148e0e8016SThara Gopinath opp-hz = /bits/ 64 <979200000>; 4158e0e8016SThara Gopinath opp-peak-kBps = <1804000 26419200>; 4168e0e8016SThara Gopinath }; 4178e0e8016SThara Gopinath 4188e0e8016SThara Gopinath cpu0_opp9: opp-1075200000 { 4198e0e8016SThara Gopinath opp-hz = /bits/ 64 <1075200000>; 4208e0e8016SThara Gopinath opp-peak-kBps = <1804000 29491200>; 4218e0e8016SThara Gopinath }; 4228e0e8016SThara Gopinath 4238e0e8016SThara Gopinath cpu0_opp10: opp-1171200000 { 4248e0e8016SThara Gopinath opp-hz = /bits/ 64 <1171200000>; 4258e0e8016SThara Gopinath opp-peak-kBps = <1804000 32563200>; 4268e0e8016SThara Gopinath }; 4278e0e8016SThara Gopinath 4288e0e8016SThara Gopinath cpu0_opp11: opp-1248000000 { 4298e0e8016SThara Gopinath opp-hz = /bits/ 64 <1248000000>; 4308e0e8016SThara Gopinath opp-peak-kBps = <1804000 36249600>; 4318e0e8016SThara Gopinath }; 4328e0e8016SThara Gopinath 4338e0e8016SThara Gopinath cpu0_opp12: opp-1344000000 { 4348e0e8016SThara Gopinath opp-hz = /bits/ 64 <1344000000>; 4358e0e8016SThara Gopinath opp-peak-kBps = <2188000 36249600>; 4368e0e8016SThara Gopinath }; 4378e0e8016SThara Gopinath 4388e0e8016SThara Gopinath cpu0_opp13: opp-1420800000 { 4398e0e8016SThara Gopinath opp-hz = /bits/ 64 <1420800000>; 4408e0e8016SThara Gopinath opp-peak-kBps = <2188000 39321600>; 4418e0e8016SThara Gopinath }; 4428e0e8016SThara Gopinath 4438e0e8016SThara Gopinath cpu0_opp14: opp-1516800000 { 4448e0e8016SThara Gopinath opp-hz = /bits/ 64 <1516800000>; 4458e0e8016SThara Gopinath opp-peak-kBps = <3072000 42393600>; 4468e0e8016SThara Gopinath }; 4478e0e8016SThara Gopinath 4488e0e8016SThara Gopinath cpu0_opp15: opp-1612800000 { 4498e0e8016SThara Gopinath opp-hz = /bits/ 64 <1612800000>; 4508e0e8016SThara Gopinath opp-peak-kBps = <3072000 42393600>; 4518e0e8016SThara Gopinath }; 4528e0e8016SThara Gopinath 4538e0e8016SThara Gopinath cpu0_opp16: opp-1708800000 { 4548e0e8016SThara Gopinath opp-hz = /bits/ 64 <1708800000>; 4558e0e8016SThara Gopinath opp-peak-kBps = <4068000 42393600>; 4568e0e8016SThara Gopinath }; 4578e0e8016SThara Gopinath 4588e0e8016SThara Gopinath cpu0_opp17: opp-1804800000 { 4598e0e8016SThara Gopinath opp-hz = /bits/ 64 <1804800000>; 4608e0e8016SThara Gopinath opp-peak-kBps = <4068000 42393600>; 4618e0e8016SThara Gopinath }; 4628e0e8016SThara Gopinath }; 4638e0e8016SThara Gopinath 4640e3e6546SKrzysztof Kozlowski cpu4_opp_table: opp-table-cpu4 { 4658e0e8016SThara Gopinath compatible = "operating-points-v2"; 4668e0e8016SThara Gopinath opp-shared; 4678e0e8016SThara Gopinath 4688e0e8016SThara Gopinath cpu4_opp1: opp-710400000 { 4698e0e8016SThara Gopinath opp-hz = /bits/ 64 <710400000>; 4708e0e8016SThara Gopinath opp-peak-kBps = <1804000 19660800>; 4718e0e8016SThara Gopinath }; 4728e0e8016SThara Gopinath 4738e0e8016SThara Gopinath cpu4_opp2: opp-825600000 { 4748e0e8016SThara Gopinath opp-hz = /bits/ 64 <825600000>; 4758e0e8016SThara Gopinath opp-peak-kBps = <2188000 23347200>; 4768e0e8016SThara Gopinath }; 4778e0e8016SThara Gopinath 4788e0e8016SThara Gopinath cpu4_opp3: opp-940800000 { 4798e0e8016SThara Gopinath opp-hz = /bits/ 64 <940800000>; 4808e0e8016SThara Gopinath opp-peak-kBps = <2188000 26419200>; 4818e0e8016SThara Gopinath }; 4828e0e8016SThara Gopinath 4838e0e8016SThara Gopinath cpu4_opp4: opp-1056000000 { 4848e0e8016SThara Gopinath opp-hz = /bits/ 64 <1056000000>; 4858e0e8016SThara Gopinath opp-peak-kBps = <3072000 26419200>; 4868e0e8016SThara Gopinath }; 4878e0e8016SThara Gopinath 4888e0e8016SThara Gopinath cpu4_opp5: opp-1171200000 { 4898e0e8016SThara Gopinath opp-hz = /bits/ 64 <1171200000>; 4908e0e8016SThara Gopinath opp-peak-kBps = <3072000 29491200>; 4918e0e8016SThara Gopinath }; 4928e0e8016SThara Gopinath 4938e0e8016SThara Gopinath cpu4_opp6: opp-1286400000 { 4948e0e8016SThara Gopinath opp-hz = /bits/ 64 <1286400000>; 4958e0e8016SThara Gopinath opp-peak-kBps = <4068000 29491200>; 4968e0e8016SThara Gopinath }; 4978e0e8016SThara Gopinath 4988e0e8016SThara Gopinath cpu4_opp7: opp-1382400000 { 4998e0e8016SThara Gopinath opp-hz = /bits/ 64 <1382400000>; 5008e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5018e0e8016SThara Gopinath }; 5028e0e8016SThara Gopinath 5038e0e8016SThara Gopinath cpu4_opp8: opp-1478400000 { 5048e0e8016SThara Gopinath opp-hz = /bits/ 64 <1478400000>; 5058e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5068e0e8016SThara Gopinath }; 5078e0e8016SThara Gopinath 5088e0e8016SThara Gopinath cpu4_opp9: opp-1574400000 { 5098e0e8016SThara Gopinath opp-hz = /bits/ 64 <1574400000>; 5108e0e8016SThara Gopinath opp-peak-kBps = <5412000 39321600>; 5118e0e8016SThara Gopinath }; 5128e0e8016SThara Gopinath 5138e0e8016SThara Gopinath cpu4_opp10: opp-1670400000 { 5148e0e8016SThara Gopinath opp-hz = /bits/ 64 <1670400000>; 5158e0e8016SThara Gopinath opp-peak-kBps = <5412000 42393600>; 5168e0e8016SThara Gopinath }; 5178e0e8016SThara Gopinath 5188e0e8016SThara Gopinath cpu4_opp11: opp-1766400000 { 5198e0e8016SThara Gopinath opp-hz = /bits/ 64 <1766400000>; 5208e0e8016SThara Gopinath opp-peak-kBps = <5412000 45465600>; 5218e0e8016SThara Gopinath }; 5228e0e8016SThara Gopinath 5238e0e8016SThara Gopinath cpu4_opp12: opp-1862400000 { 5248e0e8016SThara Gopinath opp-hz = /bits/ 64 <1862400000>; 5258e0e8016SThara Gopinath opp-peak-kBps = <6220000 45465600>; 5268e0e8016SThara Gopinath }; 5278e0e8016SThara Gopinath 5288e0e8016SThara Gopinath cpu4_opp13: opp-1958400000 { 5298e0e8016SThara Gopinath opp-hz = /bits/ 64 <1958400000>; 5308e0e8016SThara Gopinath opp-peak-kBps = <6220000 48537600>; 5318e0e8016SThara Gopinath }; 5328e0e8016SThara Gopinath 5338e0e8016SThara Gopinath cpu4_opp14: opp-2054400000 { 5348e0e8016SThara Gopinath opp-hz = /bits/ 64 <2054400000>; 5358e0e8016SThara Gopinath opp-peak-kBps = <7216000 48537600>; 5368e0e8016SThara Gopinath }; 5378e0e8016SThara Gopinath 5388e0e8016SThara Gopinath cpu4_opp15: opp-2150400000 { 5398e0e8016SThara Gopinath opp-hz = /bits/ 64 <2150400000>; 5408e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5418e0e8016SThara Gopinath }; 5428e0e8016SThara Gopinath 5438e0e8016SThara Gopinath cpu4_opp16: opp-2246400000 { 5448e0e8016SThara Gopinath opp-hz = /bits/ 64 <2246400000>; 5458e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5468e0e8016SThara Gopinath }; 5478e0e8016SThara Gopinath 5488e0e8016SThara Gopinath cpu4_opp17: opp-2342400000 { 5498e0e8016SThara Gopinath opp-hz = /bits/ 64 <2342400000>; 5508e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 5518e0e8016SThara Gopinath }; 5528e0e8016SThara Gopinath 5538e0e8016SThara Gopinath cpu4_opp18: opp-2419200000 { 5548e0e8016SThara Gopinath opp-hz = /bits/ 64 <2419200000>; 5558e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 5568e0e8016SThara Gopinath }; 5578e0e8016SThara Gopinath }; 5588e0e8016SThara Gopinath 5590e3e6546SKrzysztof Kozlowski cpu7_opp_table: opp-table-cpu7 { 5608e0e8016SThara Gopinath compatible = "operating-points-v2"; 5618e0e8016SThara Gopinath opp-shared; 5628e0e8016SThara Gopinath 5638e0e8016SThara Gopinath cpu7_opp1: opp-844800000 { 5648e0e8016SThara Gopinath opp-hz = /bits/ 64 <844800000>; 5658e0e8016SThara Gopinath opp-peak-kBps = <2188000 19660800>; 5668e0e8016SThara Gopinath }; 5678e0e8016SThara Gopinath 5688e0e8016SThara Gopinath cpu7_opp2: opp-960000000 { 5698e0e8016SThara Gopinath opp-hz = /bits/ 64 <960000000>; 5708e0e8016SThara Gopinath opp-peak-kBps = <2188000 26419200>; 5718e0e8016SThara Gopinath }; 5728e0e8016SThara Gopinath 5738e0e8016SThara Gopinath cpu7_opp3: opp-1075200000 { 5748e0e8016SThara Gopinath opp-hz = /bits/ 64 <1075200000>; 5758e0e8016SThara Gopinath opp-peak-kBps = <3072000 26419200>; 5768e0e8016SThara Gopinath }; 5778e0e8016SThara Gopinath 5788e0e8016SThara Gopinath cpu7_opp4: opp-1190400000 { 5798e0e8016SThara Gopinath opp-hz = /bits/ 64 <1190400000>; 5808e0e8016SThara Gopinath opp-peak-kBps = <3072000 29491200>; 5818e0e8016SThara Gopinath }; 5828e0e8016SThara Gopinath 5838e0e8016SThara Gopinath cpu7_opp5: opp-1305600000 { 5848e0e8016SThara Gopinath opp-hz = /bits/ 64 <1305600000>; 5858e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5868e0e8016SThara Gopinath }; 5878e0e8016SThara Gopinath 5888e0e8016SThara Gopinath cpu7_opp6: opp-1401600000 { 5898e0e8016SThara Gopinath opp-hz = /bits/ 64 <1401600000>; 5908e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5918e0e8016SThara Gopinath }; 5928e0e8016SThara Gopinath 5938e0e8016SThara Gopinath cpu7_opp7: opp-1516800000 { 5948e0e8016SThara Gopinath opp-hz = /bits/ 64 <1516800000>; 5958e0e8016SThara Gopinath opp-peak-kBps = <4068000 36249600>; 5968e0e8016SThara Gopinath }; 5978e0e8016SThara Gopinath 5988e0e8016SThara Gopinath cpu7_opp8: opp-1632000000 { 5998e0e8016SThara Gopinath opp-hz = /bits/ 64 <1632000000>; 6008e0e8016SThara Gopinath opp-peak-kBps = <5412000 39321600>; 6018e0e8016SThara Gopinath }; 6028e0e8016SThara Gopinath 6038e0e8016SThara Gopinath cpu7_opp9: opp-1747200000 { 6048e0e8016SThara Gopinath opp-hz = /bits/ 64 <1708800000>; 6058e0e8016SThara Gopinath opp-peak-kBps = <5412000 42393600>; 6068e0e8016SThara Gopinath }; 6078e0e8016SThara Gopinath 6088e0e8016SThara Gopinath cpu7_opp10: opp-1862400000 { 6098e0e8016SThara Gopinath opp-hz = /bits/ 64 <1862400000>; 6108e0e8016SThara Gopinath opp-peak-kBps = <6220000 45465600>; 6118e0e8016SThara Gopinath }; 6128e0e8016SThara Gopinath 6138e0e8016SThara Gopinath cpu7_opp11: opp-1977600000 { 6148e0e8016SThara Gopinath opp-hz = /bits/ 64 <1977600000>; 6158e0e8016SThara Gopinath opp-peak-kBps = <6220000 48537600>; 6168e0e8016SThara Gopinath }; 6178e0e8016SThara Gopinath 6188e0e8016SThara Gopinath cpu7_opp12: opp-2073600000 { 6198e0e8016SThara Gopinath opp-hz = /bits/ 64 <2073600000>; 6208e0e8016SThara Gopinath opp-peak-kBps = <7216000 48537600>; 6218e0e8016SThara Gopinath }; 6228e0e8016SThara Gopinath 6238e0e8016SThara Gopinath cpu7_opp13: opp-2169600000 { 6248e0e8016SThara Gopinath opp-hz = /bits/ 64 <2169600000>; 6258e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 6268e0e8016SThara Gopinath }; 6278e0e8016SThara Gopinath 6288e0e8016SThara Gopinath cpu7_opp14: opp-2265600000 { 6298e0e8016SThara Gopinath opp-hz = /bits/ 64 <2265600000>; 6308e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 6318e0e8016SThara Gopinath }; 6328e0e8016SThara Gopinath 6338e0e8016SThara Gopinath cpu7_opp15: opp-2361600000 { 6348e0e8016SThara Gopinath opp-hz = /bits/ 64 <2361600000>; 6358e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6368e0e8016SThara Gopinath }; 6378e0e8016SThara Gopinath 6388e0e8016SThara Gopinath cpu7_opp16: opp-2457600000 { 6398e0e8016SThara Gopinath opp-hz = /bits/ 64 <2457600000>; 6408e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6418e0e8016SThara Gopinath }; 6428e0e8016SThara Gopinath 6438e0e8016SThara Gopinath cpu7_opp17: opp-2553600000 { 6448e0e8016SThara Gopinath opp-hz = /bits/ 64 <2553600000>; 6458e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6468e0e8016SThara Gopinath }; 6478e0e8016SThara Gopinath 6488e0e8016SThara Gopinath cpu7_opp18: opp-2649600000 { 6498e0e8016SThara Gopinath opp-hz = /bits/ 64 <2649600000>; 6508e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6518e0e8016SThara Gopinath }; 6528e0e8016SThara Gopinath 6538e0e8016SThara Gopinath cpu7_opp19: opp-2745600000 { 6548e0e8016SThara Gopinath opp-hz = /bits/ 64 <2745600000>; 6558e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6568e0e8016SThara Gopinath }; 6578e0e8016SThara Gopinath 6588e0e8016SThara Gopinath cpu7_opp20: opp-2841600000 { 6598e0e8016SThara Gopinath opp-hz = /bits/ 64 <2841600000>; 6608e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6618e0e8016SThara Gopinath }; 6628e0e8016SThara Gopinath }; 6638e0e8016SThara Gopinath 66460378f1aSVenkata Narendra Kumar Gutta firmware { 66560378f1aSVenkata Narendra Kumar Gutta scm: scm { 666b9c0c0e5SDavid Heidelberg compatible = "qcom,scm-sm8250", "qcom,scm"; 66760378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 66860378f1aSVenkata Narendra Kumar Gutta }; 66960378f1aSVenkata Narendra Kumar Gutta }; 67060378f1aSVenkata Narendra Kumar Gutta 67160378f1aSVenkata Narendra Kumar Gutta memory@80000000 { 67260378f1aSVenkata Narendra Kumar Gutta device_type = "memory"; 67360378f1aSVenkata Narendra Kumar Gutta /* We expect the bootloader to fill in the size */ 67460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x0>; 67560378f1aSVenkata Narendra Kumar Gutta }; 67660378f1aSVenkata Narendra Kumar Gutta 67760378f1aSVenkata Narendra Kumar Gutta pmu { 67860378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-pmuv3"; 67993138ef5SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 68060378f1aSVenkata Narendra Kumar Gutta }; 68160378f1aSVenkata Narendra Kumar Gutta 68260378f1aSVenkata Narendra Kumar Gutta psci { 68360378f1aSVenkata Narendra Kumar Gutta compatible = "arm,psci-1.0"; 68460378f1aSVenkata Narendra Kumar Gutta method = "smc"; 68532bc936dSMaulik Shah 68656d59002SKrzysztof Kozlowski CPU_PD0: power-domain-cpu0 { 68732bc936dSMaulik Shah #power-domain-cells = <0>; 68832bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 68932bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 69032bc936dSMaulik Shah }; 69132bc936dSMaulik Shah 69256d59002SKrzysztof Kozlowski CPU_PD1: power-domain-cpu1 { 69332bc936dSMaulik Shah #power-domain-cells = <0>; 69432bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 69532bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 69632bc936dSMaulik Shah }; 69732bc936dSMaulik Shah 69856d59002SKrzysztof Kozlowski CPU_PD2: power-domain-cpu2 { 69932bc936dSMaulik Shah #power-domain-cells = <0>; 70032bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 70132bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 70232bc936dSMaulik Shah }; 70332bc936dSMaulik Shah 70456d59002SKrzysztof Kozlowski CPU_PD3: power-domain-cpu3 { 70532bc936dSMaulik Shah #power-domain-cells = <0>; 70632bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 70732bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 70832bc936dSMaulik Shah }; 70932bc936dSMaulik Shah 71056d59002SKrzysztof Kozlowski CPU_PD4: power-domain-cpu4 { 71132bc936dSMaulik Shah #power-domain-cells = <0>; 71232bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 71332bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 71432bc936dSMaulik Shah }; 71532bc936dSMaulik Shah 71656d59002SKrzysztof Kozlowski CPU_PD5: power-domain-cpu5 { 71732bc936dSMaulik Shah #power-domain-cells = <0>; 71832bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 71932bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 72032bc936dSMaulik Shah }; 72132bc936dSMaulik Shah 72256d59002SKrzysztof Kozlowski CPU_PD6: power-domain-cpu6 { 72332bc936dSMaulik Shah #power-domain-cells = <0>; 72432bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 72532bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 72632bc936dSMaulik Shah }; 72732bc936dSMaulik Shah 72856d59002SKrzysztof Kozlowski CPU_PD7: power-domain-cpu7 { 72932bc936dSMaulik Shah #power-domain-cells = <0>; 73032bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 73132bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 73232bc936dSMaulik Shah }; 73332bc936dSMaulik Shah 73456d59002SKrzysztof Kozlowski CLUSTER_PD: power-domain-cpu-cluster0 { 73532bc936dSMaulik Shah #power-domain-cells = <0>; 73632bc936dSMaulik Shah domain-idle-states = <&CLUSTER_SLEEP_0>; 73732bc936dSMaulik Shah }; 73860378f1aSVenkata Narendra Kumar Gutta }; 73960378f1aSVenkata Narendra Kumar Gutta 740191c85b8SVinod Koul qup_opp_table: opp-table-qup { 741191c85b8SVinod Koul compatible = "operating-points-v2"; 742191c85b8SVinod Koul 743191c85b8SVinod Koul opp-50000000 { 744191c85b8SVinod Koul opp-hz = /bits/ 64 <50000000>; 745191c85b8SVinod Koul required-opps = <&rpmhpd_opp_min_svs>; 746191c85b8SVinod Koul }; 747191c85b8SVinod Koul 748191c85b8SVinod Koul opp-75000000 { 749191c85b8SVinod Koul opp-hz = /bits/ 64 <75000000>; 750191c85b8SVinod Koul required-opps = <&rpmhpd_opp_low_svs>; 751191c85b8SVinod Koul }; 752191c85b8SVinod Koul 753191c85b8SVinod Koul opp-120000000 { 754191c85b8SVinod Koul opp-hz = /bits/ 64 <120000000>; 755191c85b8SVinod Koul required-opps = <&rpmhpd_opp_svs>; 756191c85b8SVinod Koul }; 757191c85b8SVinod Koul }; 758191c85b8SVinod Koul 75960378f1aSVenkata Narendra Kumar Gutta reserved-memory { 76060378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 76160378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 76260378f1aSVenkata Narendra Kumar Gutta ranges; 76360378f1aSVenkata Narendra Kumar Gutta 76460378f1aSVenkata Narendra Kumar Gutta hyp_mem: memory@80000000 { 76560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x600000>; 76660378f1aSVenkata Narendra Kumar Gutta no-map; 76760378f1aSVenkata Narendra Kumar Gutta }; 76860378f1aSVenkata Narendra Kumar Gutta 76960378f1aSVenkata Narendra Kumar Gutta xbl_aop_mem: memory@80700000 { 77060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80700000 0x0 0x160000>; 77160378f1aSVenkata Narendra Kumar Gutta no-map; 77260378f1aSVenkata Narendra Kumar Gutta }; 77360378f1aSVenkata Narendra Kumar Gutta 77460378f1aSVenkata Narendra Kumar Gutta cmd_db: memory@80860000 { 77560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,cmd-db"; 77660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80860000 0x0 0x20000>; 77760378f1aSVenkata Narendra Kumar Gutta no-map; 77860378f1aSVenkata Narendra Kumar Gutta }; 77960378f1aSVenkata Narendra Kumar Gutta 78060378f1aSVenkata Narendra Kumar Gutta smem_mem: memory@80900000 { 78160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80900000 0x0 0x200000>; 78260378f1aSVenkata Narendra Kumar Gutta no-map; 78360378f1aSVenkata Narendra Kumar Gutta }; 78460378f1aSVenkata Narendra Kumar Gutta 78560378f1aSVenkata Narendra Kumar Gutta removed_mem: memory@80b00000 { 78660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80b00000 0x0 0x5300000>; 78760378f1aSVenkata Narendra Kumar Gutta no-map; 78860378f1aSVenkata Narendra Kumar Gutta }; 78960378f1aSVenkata Narendra Kumar Gutta 79060378f1aSVenkata Narendra Kumar Gutta camera_mem: memory@86200000 { 79160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86200000 0x0 0x500000>; 79260378f1aSVenkata Narendra Kumar Gutta no-map; 79360378f1aSVenkata Narendra Kumar Gutta }; 79460378f1aSVenkata Narendra Kumar Gutta 79560378f1aSVenkata Narendra Kumar Gutta wlan_mem: memory@86700000 { 79660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86700000 0x0 0x100000>; 79760378f1aSVenkata Narendra Kumar Gutta no-map; 79860378f1aSVenkata Narendra Kumar Gutta }; 79960378f1aSVenkata Narendra Kumar Gutta 80060378f1aSVenkata Narendra Kumar Gutta ipa_fw_mem: memory@86800000 { 80160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86800000 0x0 0x10000>; 80260378f1aSVenkata Narendra Kumar Gutta no-map; 80360378f1aSVenkata Narendra Kumar Gutta }; 80460378f1aSVenkata Narendra Kumar Gutta 80560378f1aSVenkata Narendra Kumar Gutta ipa_gsi_mem: memory@86810000 { 80660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86810000 0x0 0xa000>; 80760378f1aSVenkata Narendra Kumar Gutta no-map; 80860378f1aSVenkata Narendra Kumar Gutta }; 80960378f1aSVenkata Narendra Kumar Gutta 81060378f1aSVenkata Narendra Kumar Gutta gpu_mem: memory@8681a000 { 81160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8681a000 0x0 0x2000>; 81260378f1aSVenkata Narendra Kumar Gutta no-map; 81360378f1aSVenkata Narendra Kumar Gutta }; 81460378f1aSVenkata Narendra Kumar Gutta 81560378f1aSVenkata Narendra Kumar Gutta npu_mem: memory@86900000 { 81660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86900000 0x0 0x500000>; 81760378f1aSVenkata Narendra Kumar Gutta no-map; 81860378f1aSVenkata Narendra Kumar Gutta }; 81960378f1aSVenkata Narendra Kumar Gutta 82060378f1aSVenkata Narendra Kumar Gutta video_mem: memory@86e00000 { 82160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86e00000 0x0 0x500000>; 82260378f1aSVenkata Narendra Kumar Gutta no-map; 82360378f1aSVenkata Narendra Kumar Gutta }; 82460378f1aSVenkata Narendra Kumar Gutta 82560378f1aSVenkata Narendra Kumar Gutta cvp_mem: memory@87300000 { 82660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87300000 0x0 0x500000>; 82760378f1aSVenkata Narendra Kumar Gutta no-map; 82860378f1aSVenkata Narendra Kumar Gutta }; 82960378f1aSVenkata Narendra Kumar Gutta 83060378f1aSVenkata Narendra Kumar Gutta cdsp_mem: memory@87800000 { 83160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87800000 0x0 0x1400000>; 83260378f1aSVenkata Narendra Kumar Gutta no-map; 83360378f1aSVenkata Narendra Kumar Gutta }; 83460378f1aSVenkata Narendra Kumar Gutta 83560378f1aSVenkata Narendra Kumar Gutta slpi_mem: memory@88c00000 { 83660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x88c00000 0x0 0x1500000>; 83760378f1aSVenkata Narendra Kumar Gutta no-map; 83860378f1aSVenkata Narendra Kumar Gutta }; 83960378f1aSVenkata Narendra Kumar Gutta 84060378f1aSVenkata Narendra Kumar Gutta adsp_mem: memory@8a100000 { 84160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8a100000 0x0 0x1d00000>; 84260378f1aSVenkata Narendra Kumar Gutta no-map; 84360378f1aSVenkata Narendra Kumar Gutta }; 84460378f1aSVenkata Narendra Kumar Gutta 84560378f1aSVenkata Narendra Kumar Gutta spss_mem: memory@8be00000 { 84660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8be00000 0x0 0x100000>; 84760378f1aSVenkata Narendra Kumar Gutta no-map; 84860378f1aSVenkata Narendra Kumar Gutta }; 84960378f1aSVenkata Narendra Kumar Gutta 85060378f1aSVenkata Narendra Kumar Gutta cdsp_secure_heap: memory@8bf00000 { 85160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8bf00000 0x0 0x4600000>; 85260378f1aSVenkata Narendra Kumar Gutta no-map; 85360378f1aSVenkata Narendra Kumar Gutta }; 85460378f1aSVenkata Narendra Kumar Gutta }; 85560378f1aSVenkata Narendra Kumar Gutta 85688b57bc3SDmitry Baryshkov smem { 85760378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,smem"; 85860378f1aSVenkata Narendra Kumar Gutta memory-region = <&smem_mem>; 85960378f1aSVenkata Narendra Kumar Gutta hwlocks = <&tcsr_mutex 3>; 86060378f1aSVenkata Narendra Kumar Gutta }; 86160378f1aSVenkata Narendra Kumar Gutta 8628770a2a8SBjorn Andersson smp2p-adsp { 8638770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 8648770a2a8SBjorn Andersson qcom,smem = <443>, <429>; 8658770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 8668770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 8678770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 8688770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 8698770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 8708770a2a8SBjorn Andersson 8718770a2a8SBjorn Andersson qcom,local-pid = <0>; 8728770a2a8SBjorn Andersson qcom,remote-pid = <2>; 8738770a2a8SBjorn Andersson 8748770a2a8SBjorn Andersson smp2p_adsp_out: master-kernel { 8758770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 8768770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 8778770a2a8SBjorn Andersson }; 8788770a2a8SBjorn Andersson 8798770a2a8SBjorn Andersson smp2p_adsp_in: slave-kernel { 8808770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 8818770a2a8SBjorn Andersson interrupt-controller; 8828770a2a8SBjorn Andersson #interrupt-cells = <2>; 8838770a2a8SBjorn Andersson }; 8848770a2a8SBjorn Andersson }; 8858770a2a8SBjorn Andersson 8868770a2a8SBjorn Andersson smp2p-cdsp { 8878770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 8888770a2a8SBjorn Andersson qcom,smem = <94>, <432>; 8898770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 8908770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 8918770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 8928770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 8938770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 8948770a2a8SBjorn Andersson 8958770a2a8SBjorn Andersson qcom,local-pid = <0>; 8968770a2a8SBjorn Andersson qcom,remote-pid = <5>; 8978770a2a8SBjorn Andersson 8988770a2a8SBjorn Andersson smp2p_cdsp_out: master-kernel { 8998770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 9008770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 9018770a2a8SBjorn Andersson }; 9028770a2a8SBjorn Andersson 9038770a2a8SBjorn Andersson smp2p_cdsp_in: slave-kernel { 9048770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 9058770a2a8SBjorn Andersson interrupt-controller; 9068770a2a8SBjorn Andersson #interrupt-cells = <2>; 9078770a2a8SBjorn Andersson }; 9088770a2a8SBjorn Andersson }; 9098770a2a8SBjorn Andersson 9108770a2a8SBjorn Andersson smp2p-slpi { 9118770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 9128770a2a8SBjorn Andersson qcom,smem = <481>, <430>; 9138770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 9148770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 9158770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 9168770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 9178770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 9188770a2a8SBjorn Andersson 9198770a2a8SBjorn Andersson qcom,local-pid = <0>; 9208770a2a8SBjorn Andersson qcom,remote-pid = <3>; 9218770a2a8SBjorn Andersson 9228770a2a8SBjorn Andersson smp2p_slpi_out: master-kernel { 9238770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 9248770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 9258770a2a8SBjorn Andersson }; 9268770a2a8SBjorn Andersson 9278770a2a8SBjorn Andersson smp2p_slpi_in: slave-kernel { 9288770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 9298770a2a8SBjorn Andersson interrupt-controller; 9308770a2a8SBjorn Andersson #interrupt-cells = <2>; 9318770a2a8SBjorn Andersson }; 9328770a2a8SBjorn Andersson }; 9338770a2a8SBjorn Andersson 93460378f1aSVenkata Narendra Kumar Gutta soc: soc@0 { 93560378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 93660378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 93760378f1aSVenkata Narendra Kumar Gutta ranges = <0 0 0 0 0x10 0>; 93860378f1aSVenkata Narendra Kumar Gutta dma-ranges = <0 0 0 0 0x10 0>; 93960378f1aSVenkata Narendra Kumar Gutta compatible = "simple-bus"; 94060378f1aSVenkata Narendra Kumar Gutta 94160378f1aSVenkata Narendra Kumar Gutta gcc: clock-controller@100000 { 94260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,gcc-sm8250"; 94360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00100000 0x0 0x1f0000>; 94460378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 94560378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 94660378f1aSVenkata Narendra Kumar Gutta #power-domain-cells = <1>; 94776bd127eSDmitry Baryshkov clock-names = "bi_tcxo", 94876bd127eSDmitry Baryshkov "bi_tcxo_ao", 94976bd127eSDmitry Baryshkov "sleep_clk"; 95076bd127eSDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 95176bd127eSDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK_A>, 95276bd127eSDmitry Baryshkov <&sleep_clk>; 95360378f1aSVenkata Narendra Kumar Gutta }; 95460378f1aSVenkata Narendra Kumar Gutta 955e5361e75SBjorn Andersson ipcc: mailbox@408000 { 956e5361e75SBjorn Andersson compatible = "qcom,sm8250-ipcc", "qcom,ipcc"; 957e5361e75SBjorn Andersson reg = <0 0x00408000 0 0x1000>; 958e5361e75SBjorn Andersson interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 959e5361e75SBjorn Andersson interrupt-controller; 960e5361e75SBjorn Andersson #interrupt-cells = <3>; 961e5361e75SBjorn Andersson #mbox-cells = <2>; 962e5361e75SBjorn Andersson }; 963e5361e75SBjorn Andersson 9642a50d1a0SKonrad Dybcio qfprom: efuse@784000 { 9652a50d1a0SKonrad Dybcio compatible = "qcom,sm8250-qfprom", "qcom,qfprom"; 9662a50d1a0SKonrad Dybcio reg = <0 0x00784000 0 0x8ff>; 9672a50d1a0SKonrad Dybcio #address-cells = <1>; 9682a50d1a0SKonrad Dybcio #size-cells = <1>; 9692a50d1a0SKonrad Dybcio 9702a50d1a0SKonrad Dybcio gpu_speed_bin: gpu_speed_bin@19b { 9712a50d1a0SKonrad Dybcio reg = <0x19b 0x1>; 9722a50d1a0SKonrad Dybcio bits = <5 3>; 9732a50d1a0SKonrad Dybcio }; 9742a50d1a0SKonrad Dybcio }; 9752a50d1a0SKonrad Dybcio 97665389ce6SManivannan Sadhasivam rng: rng@793000 { 97765389ce6SManivannan Sadhasivam compatible = "qcom,prng-ee"; 97865389ce6SManivannan Sadhasivam reg = <0 0x00793000 0 0x1000>; 97965389ce6SManivannan Sadhasivam clocks = <&gcc GCC_PRNG_AHB_CLK>; 98065389ce6SManivannan Sadhasivam clock-names = "core"; 98165389ce6SManivannan Sadhasivam }; 98265389ce6SManivannan Sadhasivam 98315049bb5SKonrad Dybcio gpi_dma2: dma-controller@800000 { 984e7e24786SRichard Acayan compatible = "qcom,sm8250-gpi-dma", "qcom,sdm845-gpi-dma"; 98515049bb5SKonrad Dybcio reg = <0 0x00800000 0 0x70000>; 98615049bb5SKonrad Dybcio interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>, 98715049bb5SKonrad Dybcio <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>, 98815049bb5SKonrad Dybcio <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>, 98915049bb5SKonrad Dybcio <GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>, 99015049bb5SKonrad Dybcio <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>, 99115049bb5SKonrad Dybcio <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>, 99215049bb5SKonrad Dybcio <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>, 99315049bb5SKonrad Dybcio <GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH>, 99415049bb5SKonrad Dybcio <GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH>, 99515049bb5SKonrad Dybcio <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>; 99615049bb5SKonrad Dybcio dma-channels = <10>; 99715049bb5SKonrad Dybcio dma-channel-mask = <0x3f>; 99815049bb5SKonrad Dybcio iommus = <&apps_smmu 0x76 0x0>; 99915049bb5SKonrad Dybcio #dma-cells = <3>; 100015049bb5SKonrad Dybcio status = "disabled"; 100115049bb5SKonrad Dybcio }; 100215049bb5SKonrad Dybcio 1003e5813b15SDmitry Baryshkov qupv3_id_2: geniqup@8c0000 { 1004e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 1005e5813b15SDmitry Baryshkov reg = <0x0 0x008c0000 0x0 0x6000>; 1006e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 1007e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 1008e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 1009e5813b15SDmitry Baryshkov #address-cells = <2>; 1010e5813b15SDmitry Baryshkov #size-cells = <2>; 101185309393SDmitry Baryshkov iommus = <&apps_smmu 0x63 0x0>; 1012e5813b15SDmitry Baryshkov ranges; 1013e5813b15SDmitry Baryshkov status = "disabled"; 1014e5813b15SDmitry Baryshkov 1015e5813b15SDmitry Baryshkov i2c14: i2c@880000 { 1016e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1017e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 1018e5813b15SDmitry Baryshkov clock-names = "se"; 1019e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 1020e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1021e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c14_default>; 1022e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 102359983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>, 102459983a5cSKonrad Dybcio <&gpi_dma2 1 0 QCOM_GPI_I2C>; 102559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1026e5813b15SDmitry Baryshkov #address-cells = <1>; 1027e5813b15SDmitry Baryshkov #size-cells = <0>; 1028e5813b15SDmitry Baryshkov status = "disabled"; 1029e5813b15SDmitry Baryshkov }; 1030e5813b15SDmitry Baryshkov 1031e5813b15SDmitry Baryshkov spi14: spi@880000 { 1032e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1033e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 1034e5813b15SDmitry Baryshkov clock-names = "se"; 1035e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 1036e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 103759983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>, 103859983a5cSKonrad Dybcio <&gpi_dma2 1 0 QCOM_GPI_SPI>; 103959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 104034e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 104101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 104259983a5cSKonrad Dybcio #address-cells = <1>; 104359983a5cSKonrad Dybcio #size-cells = <0>; 1044e5813b15SDmitry Baryshkov status = "disabled"; 1045e5813b15SDmitry Baryshkov }; 1046e5813b15SDmitry Baryshkov 1047e5813b15SDmitry Baryshkov i2c15: i2c@884000 { 1048e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1049e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 1050e5813b15SDmitry Baryshkov clock-names = "se"; 1051e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 1052e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1053e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c15_default>; 1054e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 105559983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>, 105659983a5cSKonrad Dybcio <&gpi_dma2 1 1 QCOM_GPI_I2C>; 105759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1058e5813b15SDmitry Baryshkov #address-cells = <1>; 1059e5813b15SDmitry Baryshkov #size-cells = <0>; 1060e5813b15SDmitry Baryshkov status = "disabled"; 1061e5813b15SDmitry Baryshkov }; 1062e5813b15SDmitry Baryshkov 1063e5813b15SDmitry Baryshkov spi15: spi@884000 { 1064e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1065e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 1066e5813b15SDmitry Baryshkov clock-names = "se"; 1067e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 1068e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 106959983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>, 107059983a5cSKonrad Dybcio <&gpi_dma2 1 1 QCOM_GPI_SPI>; 107159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 107234e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 107301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 107459983a5cSKonrad Dybcio #address-cells = <1>; 107559983a5cSKonrad Dybcio #size-cells = <0>; 1076e5813b15SDmitry Baryshkov status = "disabled"; 1077e5813b15SDmitry Baryshkov }; 1078e5813b15SDmitry Baryshkov 1079e5813b15SDmitry Baryshkov i2c16: i2c@888000 { 1080e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1081e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 1082e5813b15SDmitry Baryshkov clock-names = "se"; 1083e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 1084e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1085e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c16_default>; 1086e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 108759983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>, 108859983a5cSKonrad Dybcio <&gpi_dma2 1 2 QCOM_GPI_I2C>; 108959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1090e5813b15SDmitry Baryshkov #address-cells = <1>; 1091e5813b15SDmitry Baryshkov #size-cells = <0>; 1092e5813b15SDmitry Baryshkov status = "disabled"; 1093e5813b15SDmitry Baryshkov }; 1094e5813b15SDmitry Baryshkov 1095e5813b15SDmitry Baryshkov spi16: spi@888000 { 1096e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1097e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 1098e5813b15SDmitry Baryshkov clock-names = "se"; 1099e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 1100e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 110159983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>, 110259983a5cSKonrad Dybcio <&gpi_dma2 1 2 QCOM_GPI_SPI>; 110359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 110434e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 110501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 110659983a5cSKonrad Dybcio #address-cells = <1>; 110759983a5cSKonrad Dybcio #size-cells = <0>; 1108e5813b15SDmitry Baryshkov status = "disabled"; 1109e5813b15SDmitry Baryshkov }; 1110e5813b15SDmitry Baryshkov 1111e5813b15SDmitry Baryshkov i2c17: i2c@88c000 { 1112e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1113e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 1114e5813b15SDmitry Baryshkov clock-names = "se"; 1115e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 1116e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1117e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c17_default>; 1118e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 111959983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>, 112059983a5cSKonrad Dybcio <&gpi_dma2 1 3 QCOM_GPI_I2C>; 112159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1122e5813b15SDmitry Baryshkov #address-cells = <1>; 1123e5813b15SDmitry Baryshkov #size-cells = <0>; 1124e5813b15SDmitry Baryshkov status = "disabled"; 1125e5813b15SDmitry Baryshkov }; 1126e5813b15SDmitry Baryshkov 1127e5813b15SDmitry Baryshkov spi17: spi@88c000 { 1128e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1129e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 1130e5813b15SDmitry Baryshkov clock-names = "se"; 1131e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 1132e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 113359983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>, 113459983a5cSKonrad Dybcio <&gpi_dma2 1 3 QCOM_GPI_SPI>; 113559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 113634e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 113701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 113859983a5cSKonrad Dybcio #address-cells = <1>; 113959983a5cSKonrad Dybcio #size-cells = <0>; 1140e5813b15SDmitry Baryshkov status = "disabled"; 1141e5813b15SDmitry Baryshkov }; 1142e5813b15SDmitry Baryshkov 114308a9ae2dSDmitry Baryshkov uart17: serial@88c000 { 114408a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 114508a9ae2dSDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 114608a9ae2dSDmitry Baryshkov clock-names = "se"; 114708a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 114808a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 114908a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart17_default>; 115008a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 115134e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 115201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 115308a9ae2dSDmitry Baryshkov status = "disabled"; 115408a9ae2dSDmitry Baryshkov }; 115508a9ae2dSDmitry Baryshkov 1156e5813b15SDmitry Baryshkov i2c18: i2c@890000 { 1157e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1158e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 1159e5813b15SDmitry Baryshkov clock-names = "se"; 1160e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 1161e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1162e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c18_default>; 1163e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 116459983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>, 116559983a5cSKonrad Dybcio <&gpi_dma2 1 4 QCOM_GPI_I2C>; 116659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1167e5813b15SDmitry Baryshkov #address-cells = <1>; 1168e5813b15SDmitry Baryshkov #size-cells = <0>; 1169e5813b15SDmitry Baryshkov status = "disabled"; 1170e5813b15SDmitry Baryshkov }; 1171e5813b15SDmitry Baryshkov 1172e5813b15SDmitry Baryshkov spi18: spi@890000 { 1173e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1174e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 1175e5813b15SDmitry Baryshkov clock-names = "se"; 1176e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 1177e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 117859983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>, 117959983a5cSKonrad Dybcio <&gpi_dma2 1 4 QCOM_GPI_SPI>; 118059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 118134e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 118201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 118359983a5cSKonrad Dybcio #address-cells = <1>; 118459983a5cSKonrad Dybcio #size-cells = <0>; 1185e5813b15SDmitry Baryshkov status = "disabled"; 1186e5813b15SDmitry Baryshkov }; 1187e5813b15SDmitry Baryshkov 118808a9ae2dSDmitry Baryshkov uart18: serial@890000 { 118908a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 119008a9ae2dSDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 119108a9ae2dSDmitry Baryshkov clock-names = "se"; 119208a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 119308a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 119408a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart18_default>; 119508a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 119634e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 119701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 119808a9ae2dSDmitry Baryshkov status = "disabled"; 119908a9ae2dSDmitry Baryshkov }; 120008a9ae2dSDmitry Baryshkov 1201e5813b15SDmitry Baryshkov i2c19: i2c@894000 { 1202e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1203e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 1204e5813b15SDmitry Baryshkov clock-names = "se"; 1205e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 1206e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1207e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c19_default>; 1208e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 120959983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>, 121059983a5cSKonrad Dybcio <&gpi_dma2 1 5 QCOM_GPI_I2C>; 121159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1212e5813b15SDmitry Baryshkov #address-cells = <1>; 1213e5813b15SDmitry Baryshkov #size-cells = <0>; 1214e5813b15SDmitry Baryshkov status = "disabled"; 1215e5813b15SDmitry Baryshkov }; 1216e5813b15SDmitry Baryshkov 1217e5813b15SDmitry Baryshkov spi19: spi@894000 { 1218e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1219e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 1220e5813b15SDmitry Baryshkov clock-names = "se"; 1221e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 1222e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 122359983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>, 122459983a5cSKonrad Dybcio <&gpi_dma2 1 5 QCOM_GPI_SPI>; 122559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 122634e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 122701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 122859983a5cSKonrad Dybcio #address-cells = <1>; 122959983a5cSKonrad Dybcio #size-cells = <0>; 1230e5813b15SDmitry Baryshkov status = "disabled"; 1231e5813b15SDmitry Baryshkov }; 1232e5813b15SDmitry Baryshkov }; 1233e5813b15SDmitry Baryshkov 123415049bb5SKonrad Dybcio gpi_dma0: dma-controller@900000 { 1235e7e24786SRichard Acayan compatible = "qcom,sm8250-gpi-dma", "qcom,sdm845-gpi-dma"; 123615049bb5SKonrad Dybcio reg = <0 0x00900000 0 0x70000>; 123715049bb5SKonrad Dybcio interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, 123815049bb5SKonrad Dybcio <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, 123915049bb5SKonrad Dybcio <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, 124015049bb5SKonrad Dybcio <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, 124115049bb5SKonrad Dybcio <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>, 124215049bb5SKonrad Dybcio <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>, 124315049bb5SKonrad Dybcio <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>, 124415049bb5SKonrad Dybcio <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>, 124515049bb5SKonrad Dybcio <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>, 124615049bb5SKonrad Dybcio <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>, 124715049bb5SKonrad Dybcio <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, 124815049bb5SKonrad Dybcio <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, 124915049bb5SKonrad Dybcio <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; 125015049bb5SKonrad Dybcio dma-channels = <15>; 125115049bb5SKonrad Dybcio dma-channel-mask = <0x7ff>; 125215049bb5SKonrad Dybcio iommus = <&apps_smmu 0x5b6 0x0>; 125315049bb5SKonrad Dybcio #dma-cells = <3>; 125415049bb5SKonrad Dybcio status = "disabled"; 125515049bb5SKonrad Dybcio }; 125615049bb5SKonrad Dybcio 1257e5813b15SDmitry Baryshkov qupv3_id_0: geniqup@9c0000 { 1258e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 1259e5813b15SDmitry Baryshkov reg = <0x0 0x009c0000 0x0 0x6000>; 1260e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 1261e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 1262e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 1263e5813b15SDmitry Baryshkov #address-cells = <2>; 1264e5813b15SDmitry Baryshkov #size-cells = <2>; 126585309393SDmitry Baryshkov iommus = <&apps_smmu 0x5a3 0x0>; 1266e5813b15SDmitry Baryshkov ranges; 1267e5813b15SDmitry Baryshkov status = "disabled"; 1268e5813b15SDmitry Baryshkov 1269e5813b15SDmitry Baryshkov i2c0: i2c@980000 { 1270e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1271e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 1272e5813b15SDmitry Baryshkov clock-names = "se"; 1273e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 1274e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1275e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c0_default>; 1276e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 127759983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, 127859983a5cSKonrad Dybcio <&gpi_dma0 1 0 QCOM_GPI_I2C>; 127959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1280e5813b15SDmitry Baryshkov #address-cells = <1>; 1281e5813b15SDmitry Baryshkov #size-cells = <0>; 1282e5813b15SDmitry Baryshkov status = "disabled"; 1283e5813b15SDmitry Baryshkov }; 1284e5813b15SDmitry Baryshkov 1285e5813b15SDmitry Baryshkov spi0: spi@980000 { 1286e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1287e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 1288e5813b15SDmitry Baryshkov clock-names = "se"; 1289e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 1290e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 129159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, 129259983a5cSKonrad Dybcio <&gpi_dma0 1 0 QCOM_GPI_SPI>; 129359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 129434e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 129501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 129659983a5cSKonrad Dybcio #address-cells = <1>; 129759983a5cSKonrad Dybcio #size-cells = <0>; 1298e5813b15SDmitry Baryshkov status = "disabled"; 1299e5813b15SDmitry Baryshkov }; 1300e5813b15SDmitry Baryshkov 1301e5813b15SDmitry Baryshkov i2c1: i2c@984000 { 1302e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1303e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 1304e5813b15SDmitry Baryshkov clock-names = "se"; 1305e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 1306e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1307e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c1_default>; 1308e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 130959983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, 131059983a5cSKonrad Dybcio <&gpi_dma0 1 1 QCOM_GPI_I2C>; 131159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1312e5813b15SDmitry Baryshkov #address-cells = <1>; 1313e5813b15SDmitry Baryshkov #size-cells = <0>; 1314e5813b15SDmitry Baryshkov status = "disabled"; 1315e5813b15SDmitry Baryshkov }; 1316e5813b15SDmitry Baryshkov 1317e5813b15SDmitry Baryshkov spi1: spi@984000 { 1318e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1319e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 1320e5813b15SDmitry Baryshkov clock-names = "se"; 1321e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 1322e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 132359983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, 132459983a5cSKonrad Dybcio <&gpi_dma0 1 1 QCOM_GPI_SPI>; 132559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 132634e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 132701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 132859983a5cSKonrad Dybcio #address-cells = <1>; 132959983a5cSKonrad Dybcio #size-cells = <0>; 1330e5813b15SDmitry Baryshkov status = "disabled"; 1331e5813b15SDmitry Baryshkov }; 1332e5813b15SDmitry Baryshkov 1333e5813b15SDmitry Baryshkov i2c2: i2c@988000 { 1334e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1335e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 1336e5813b15SDmitry Baryshkov clock-names = "se"; 1337e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1338e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1339e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c2_default>; 1340e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 134159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, 134259983a5cSKonrad Dybcio <&gpi_dma0 1 2 QCOM_GPI_I2C>; 134359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1344e5813b15SDmitry Baryshkov #address-cells = <1>; 1345e5813b15SDmitry Baryshkov #size-cells = <0>; 1346e5813b15SDmitry Baryshkov status = "disabled"; 1347e5813b15SDmitry Baryshkov }; 1348e5813b15SDmitry Baryshkov 1349e5813b15SDmitry Baryshkov spi2: spi@988000 { 1350e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1351e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 1352e5813b15SDmitry Baryshkov clock-names = "se"; 1353e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1354e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 135559983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, 135659983a5cSKonrad Dybcio <&gpi_dma0 1 2 QCOM_GPI_SPI>; 135759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 135834e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 135901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 136059983a5cSKonrad Dybcio #address-cells = <1>; 136159983a5cSKonrad Dybcio #size-cells = <0>; 1362e5813b15SDmitry Baryshkov status = "disabled"; 1363e5813b15SDmitry Baryshkov }; 1364e5813b15SDmitry Baryshkov 136508a9ae2dSDmitry Baryshkov uart2: serial@988000 { 136608a9ae2dSDmitry Baryshkov compatible = "qcom,geni-debug-uart"; 136708a9ae2dSDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 136808a9ae2dSDmitry Baryshkov clock-names = "se"; 136908a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 137008a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 137108a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart2_default>; 137208a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 137334e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 137401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 137508a9ae2dSDmitry Baryshkov status = "disabled"; 137608a9ae2dSDmitry Baryshkov }; 137708a9ae2dSDmitry Baryshkov 1378e5813b15SDmitry Baryshkov i2c3: i2c@98c000 { 1379e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1380e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 1381e5813b15SDmitry Baryshkov clock-names = "se"; 1382e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1383e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1384e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c3_default>; 1385e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 138659983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, 138759983a5cSKonrad Dybcio <&gpi_dma0 1 3 QCOM_GPI_I2C>; 138859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1389e5813b15SDmitry Baryshkov #address-cells = <1>; 1390e5813b15SDmitry Baryshkov #size-cells = <0>; 1391e5813b15SDmitry Baryshkov status = "disabled"; 1392e5813b15SDmitry Baryshkov }; 1393e5813b15SDmitry Baryshkov 1394e5813b15SDmitry Baryshkov spi3: spi@98c000 { 1395e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1396e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 1397e5813b15SDmitry Baryshkov clock-names = "se"; 1398e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1399e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 140059983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, 140159983a5cSKonrad Dybcio <&gpi_dma0 1 3 QCOM_GPI_SPI>; 140259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 140334e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 140401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 140559983a5cSKonrad Dybcio #address-cells = <1>; 140659983a5cSKonrad Dybcio #size-cells = <0>; 1407e5813b15SDmitry Baryshkov status = "disabled"; 1408e5813b15SDmitry Baryshkov }; 1409e5813b15SDmitry Baryshkov 1410e5813b15SDmitry Baryshkov i2c4: i2c@990000 { 1411e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1412e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 1413e5813b15SDmitry Baryshkov clock-names = "se"; 1414e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1415e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1416e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c4_default>; 1417e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 141859983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, 141959983a5cSKonrad Dybcio <&gpi_dma0 1 4 QCOM_GPI_I2C>; 142059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1421e5813b15SDmitry Baryshkov #address-cells = <1>; 1422e5813b15SDmitry Baryshkov #size-cells = <0>; 1423e5813b15SDmitry Baryshkov status = "disabled"; 1424e5813b15SDmitry Baryshkov }; 1425e5813b15SDmitry Baryshkov 1426e5813b15SDmitry Baryshkov spi4: spi@990000 { 1427e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1428e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 1429e5813b15SDmitry Baryshkov clock-names = "se"; 1430e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1431e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 143259983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, 143359983a5cSKonrad Dybcio <&gpi_dma0 1 4 QCOM_GPI_SPI>; 143459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 143534e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 143601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 143759983a5cSKonrad Dybcio #address-cells = <1>; 143859983a5cSKonrad Dybcio #size-cells = <0>; 1439e5813b15SDmitry Baryshkov status = "disabled"; 1440e5813b15SDmitry Baryshkov }; 1441e5813b15SDmitry Baryshkov 1442e5813b15SDmitry Baryshkov i2c5: i2c@994000 { 1443e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1444e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 1445e5813b15SDmitry Baryshkov clock-names = "se"; 1446e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1447e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1448e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c5_default>; 1449e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 145059983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, 145159983a5cSKonrad Dybcio <&gpi_dma0 1 5 QCOM_GPI_I2C>; 145259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1453e5813b15SDmitry Baryshkov #address-cells = <1>; 1454e5813b15SDmitry Baryshkov #size-cells = <0>; 1455e5813b15SDmitry Baryshkov status = "disabled"; 1456e5813b15SDmitry Baryshkov }; 1457e5813b15SDmitry Baryshkov 1458e5813b15SDmitry Baryshkov spi5: spi@994000 { 1459e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1460e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 1461e5813b15SDmitry Baryshkov clock-names = "se"; 1462e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1463e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 146459983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, 146559983a5cSKonrad Dybcio <&gpi_dma0 1 5 QCOM_GPI_SPI>; 146659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 146734e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 146801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 146959983a5cSKonrad Dybcio #address-cells = <1>; 147059983a5cSKonrad Dybcio #size-cells = <0>; 1471e5813b15SDmitry Baryshkov status = "disabled"; 1472e5813b15SDmitry Baryshkov }; 1473e5813b15SDmitry Baryshkov 1474e5813b15SDmitry Baryshkov i2c6: i2c@998000 { 1475e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1476e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 1477e5813b15SDmitry Baryshkov clock-names = "se"; 1478e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1479e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1480e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c6_default>; 1481e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 148259983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, 148359983a5cSKonrad Dybcio <&gpi_dma0 1 6 QCOM_GPI_I2C>; 148459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1485e5813b15SDmitry Baryshkov #address-cells = <1>; 1486e5813b15SDmitry Baryshkov #size-cells = <0>; 1487e5813b15SDmitry Baryshkov status = "disabled"; 1488e5813b15SDmitry Baryshkov }; 1489e5813b15SDmitry Baryshkov 1490e5813b15SDmitry Baryshkov spi6: spi@998000 { 1491e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1492e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 1493e5813b15SDmitry Baryshkov clock-names = "se"; 1494e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1495e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 149659983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>, 149759983a5cSKonrad Dybcio <&gpi_dma0 1 6 QCOM_GPI_SPI>; 149859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 149934e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 150001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 150159983a5cSKonrad Dybcio #address-cells = <1>; 150259983a5cSKonrad Dybcio #size-cells = <0>; 1503e5813b15SDmitry Baryshkov status = "disabled"; 1504e5813b15SDmitry Baryshkov }; 1505e5813b15SDmitry Baryshkov 150608a9ae2dSDmitry Baryshkov uart6: serial@998000 { 150708a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 150808a9ae2dSDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 150908a9ae2dSDmitry Baryshkov clock-names = "se"; 151008a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 151108a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 151208a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart6_default>; 151308a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 151434e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 151501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 151608a9ae2dSDmitry Baryshkov status = "disabled"; 151708a9ae2dSDmitry Baryshkov }; 151808a9ae2dSDmitry Baryshkov 1519e5813b15SDmitry Baryshkov i2c7: i2c@99c000 { 1520e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1521e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 1522e5813b15SDmitry Baryshkov clock-names = "se"; 1523e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1524e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1525e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c7_default>; 1526e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 152759983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>, 152859983a5cSKonrad Dybcio <&gpi_dma0 1 7 QCOM_GPI_I2C>; 152959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1530e5813b15SDmitry Baryshkov #address-cells = <1>; 1531e5813b15SDmitry Baryshkov #size-cells = <0>; 1532e5813b15SDmitry Baryshkov status = "disabled"; 1533e5813b15SDmitry Baryshkov }; 1534e5813b15SDmitry Baryshkov 1535e5813b15SDmitry Baryshkov spi7: spi@99c000 { 1536e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1537e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 1538e5813b15SDmitry Baryshkov clock-names = "se"; 1539e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1540e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 154159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>, 154259983a5cSKonrad Dybcio <&gpi_dma0 1 7 QCOM_GPI_SPI>; 154359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 154434e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 154501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 154659983a5cSKonrad Dybcio #address-cells = <1>; 154759983a5cSKonrad Dybcio #size-cells = <0>; 1548e5813b15SDmitry Baryshkov status = "disabled"; 1549e5813b15SDmitry Baryshkov }; 1550e5813b15SDmitry Baryshkov }; 1551e5813b15SDmitry Baryshkov 155215049bb5SKonrad Dybcio gpi_dma1: dma-controller@a00000 { 1553e7e24786SRichard Acayan compatible = "qcom,sm8250-gpi-dma", "qcom,sdm845-gpi-dma"; 155415049bb5SKonrad Dybcio reg = <0 0x00a00000 0 0x70000>; 155515049bb5SKonrad Dybcio interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 155615049bb5SKonrad Dybcio <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 155715049bb5SKonrad Dybcio <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 155815049bb5SKonrad Dybcio <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 155915049bb5SKonrad Dybcio <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 156015049bb5SKonrad Dybcio <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 156115049bb5SKonrad Dybcio <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 156215049bb5SKonrad Dybcio <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 156315049bb5SKonrad Dybcio <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, 156415049bb5SKonrad Dybcio <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>; 156515049bb5SKonrad Dybcio dma-channels = <10>; 156615049bb5SKonrad Dybcio dma-channel-mask = <0x3f>; 156715049bb5SKonrad Dybcio iommus = <&apps_smmu 0x56 0x0>; 156815049bb5SKonrad Dybcio #dma-cells = <3>; 156915049bb5SKonrad Dybcio status = "disabled"; 157015049bb5SKonrad Dybcio }; 157115049bb5SKonrad Dybcio 157260378f1aSVenkata Narendra Kumar Gutta qupv3_id_1: geniqup@ac0000 { 157360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-se-qup"; 157460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00ac0000 0x0 0x6000>; 157560378f1aSVenkata Narendra Kumar Gutta clock-names = "m-ahb", "s-ahb"; 1576fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 1577fe3dfc25SJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 157860378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 157960378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 158085309393SDmitry Baryshkov iommus = <&apps_smmu 0x43 0x0>; 158160378f1aSVenkata Narendra Kumar Gutta ranges; 158260378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 158360378f1aSVenkata Narendra Kumar Gutta 1584e5813b15SDmitry Baryshkov i2c8: i2c@a80000 { 1585e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1586e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1587e5813b15SDmitry Baryshkov clock-names = "se"; 1588e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1589e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1590e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c8_default>; 1591e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 159259983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, 159359983a5cSKonrad Dybcio <&gpi_dma1 1 0 QCOM_GPI_I2C>; 159459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1595e5813b15SDmitry Baryshkov #address-cells = <1>; 1596e5813b15SDmitry Baryshkov #size-cells = <0>; 1597e5813b15SDmitry Baryshkov status = "disabled"; 1598e5813b15SDmitry Baryshkov }; 1599e5813b15SDmitry Baryshkov 1600e5813b15SDmitry Baryshkov spi8: spi@a80000 { 1601e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1602e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1603e5813b15SDmitry Baryshkov clock-names = "se"; 1604e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1605e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 160659983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>, 160759983a5cSKonrad Dybcio <&gpi_dma1 1 0 QCOM_GPI_SPI>; 160859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 160934e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 161001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 161159983a5cSKonrad Dybcio #address-cells = <1>; 161259983a5cSKonrad Dybcio #size-cells = <0>; 1613e5813b15SDmitry Baryshkov status = "disabled"; 1614e5813b15SDmitry Baryshkov }; 1615e5813b15SDmitry Baryshkov 1616e5813b15SDmitry Baryshkov i2c9: i2c@a84000 { 1617e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1618e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1619e5813b15SDmitry Baryshkov clock-names = "se"; 1620e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1621e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1622e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c9_default>; 1623e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 162459983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, 162559983a5cSKonrad Dybcio <&gpi_dma1 1 1 QCOM_GPI_I2C>; 162659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1627e5813b15SDmitry Baryshkov #address-cells = <1>; 1628e5813b15SDmitry Baryshkov #size-cells = <0>; 1629e5813b15SDmitry Baryshkov status = "disabled"; 1630e5813b15SDmitry Baryshkov }; 1631e5813b15SDmitry Baryshkov 1632e5813b15SDmitry Baryshkov spi9: spi@a84000 { 1633e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1634e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1635e5813b15SDmitry Baryshkov clock-names = "se"; 1636e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1637e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 163859983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>, 163959983a5cSKonrad Dybcio <&gpi_dma1 1 1 QCOM_GPI_SPI>; 164059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 164134e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 164201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 164359983a5cSKonrad Dybcio #address-cells = <1>; 164459983a5cSKonrad Dybcio #size-cells = <0>; 1645e5813b15SDmitry Baryshkov status = "disabled"; 1646e5813b15SDmitry Baryshkov }; 1647e5813b15SDmitry Baryshkov 1648e5813b15SDmitry Baryshkov i2c10: i2c@a88000 { 1649e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1650e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1651e5813b15SDmitry Baryshkov clock-names = "se"; 1652e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1653e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1654e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c10_default>; 1655e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 165659983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, 165759983a5cSKonrad Dybcio <&gpi_dma1 1 2 QCOM_GPI_I2C>; 165859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1659e5813b15SDmitry Baryshkov #address-cells = <1>; 1660e5813b15SDmitry Baryshkov #size-cells = <0>; 1661e5813b15SDmitry Baryshkov status = "disabled"; 1662e5813b15SDmitry Baryshkov }; 1663e5813b15SDmitry Baryshkov 1664e5813b15SDmitry Baryshkov spi10: spi@a88000 { 1665e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1666e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1667e5813b15SDmitry Baryshkov clock-names = "se"; 1668e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1669e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 167059983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>, 167159983a5cSKonrad Dybcio <&gpi_dma1 1 2 QCOM_GPI_SPI>; 167259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 167334e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 167401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 167559983a5cSKonrad Dybcio #address-cells = <1>; 167659983a5cSKonrad Dybcio #size-cells = <0>; 1677e5813b15SDmitry Baryshkov status = "disabled"; 1678e5813b15SDmitry Baryshkov }; 1679e5813b15SDmitry Baryshkov 1680e5813b15SDmitry Baryshkov i2c11: i2c@a8c000 { 1681e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1682e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1683e5813b15SDmitry Baryshkov clock-names = "se"; 1684e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1685e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1686e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c11_default>; 1687e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 168859983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, 168959983a5cSKonrad Dybcio <&gpi_dma1 1 3 QCOM_GPI_I2C>; 169059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1691e5813b15SDmitry Baryshkov #address-cells = <1>; 1692e5813b15SDmitry Baryshkov #size-cells = <0>; 1693e5813b15SDmitry Baryshkov status = "disabled"; 1694e5813b15SDmitry Baryshkov }; 1695e5813b15SDmitry Baryshkov 1696e5813b15SDmitry Baryshkov spi11: spi@a8c000 { 1697e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1698e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1699e5813b15SDmitry Baryshkov clock-names = "se"; 1700e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1701e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 170259983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>, 170359983a5cSKonrad Dybcio <&gpi_dma1 1 3 QCOM_GPI_SPI>; 170459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 170534e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 170601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 170759983a5cSKonrad Dybcio #address-cells = <1>; 170859983a5cSKonrad Dybcio #size-cells = <0>; 1709e5813b15SDmitry Baryshkov status = "disabled"; 1710e5813b15SDmitry Baryshkov }; 1711e5813b15SDmitry Baryshkov 1712e5813b15SDmitry Baryshkov i2c12: i2c@a90000 { 1713e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1714e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1715e5813b15SDmitry Baryshkov clock-names = "se"; 1716e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1717e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1718e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c12_default>; 1719e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 172059983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, 172159983a5cSKonrad Dybcio <&gpi_dma1 1 4 QCOM_GPI_I2C>; 172259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1723e5813b15SDmitry Baryshkov #address-cells = <1>; 1724e5813b15SDmitry Baryshkov #size-cells = <0>; 1725e5813b15SDmitry Baryshkov status = "disabled"; 1726e5813b15SDmitry Baryshkov }; 1727e5813b15SDmitry Baryshkov 1728e5813b15SDmitry Baryshkov spi12: spi@a90000 { 1729e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1730e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1731e5813b15SDmitry Baryshkov clock-names = "se"; 1732e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1733e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 173459983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>, 173559983a5cSKonrad Dybcio <&gpi_dma1 1 4 QCOM_GPI_SPI>; 173659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 173734e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 173801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 173959983a5cSKonrad Dybcio #address-cells = <1>; 174059983a5cSKonrad Dybcio #size-cells = <0>; 1741e5813b15SDmitry Baryshkov status = "disabled"; 1742e5813b15SDmitry Baryshkov }; 1743e5813b15SDmitry Baryshkov 1744bb1dfb4dSManivannan Sadhasivam uart12: serial@a90000 { 174560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-debug-uart"; 174660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00a90000 0x0 0x4000>; 174760378f1aSVenkata Narendra Kumar Gutta clock-names = "se"; 1748fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1749bb1dfb4dSManivannan Sadhasivam pinctrl-names = "default"; 1750bb1dfb4dSManivannan Sadhasivam pinctrl-0 = <&qup_uart12_default>; 175160378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 175234e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 175301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 175460378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 175560378f1aSVenkata Narendra Kumar Gutta }; 1756e5813b15SDmitry Baryshkov 1757e5813b15SDmitry Baryshkov i2c13: i2c@a94000 { 1758e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1759e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1760e5813b15SDmitry Baryshkov clock-names = "se"; 1761e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1762e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1763e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c13_default>; 1764e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 176559983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, 176659983a5cSKonrad Dybcio <&gpi_dma1 1 5 QCOM_GPI_I2C>; 176759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1768e5813b15SDmitry Baryshkov #address-cells = <1>; 1769e5813b15SDmitry Baryshkov #size-cells = <0>; 1770e5813b15SDmitry Baryshkov status = "disabled"; 1771e5813b15SDmitry Baryshkov }; 1772e5813b15SDmitry Baryshkov 1773e5813b15SDmitry Baryshkov spi13: spi@a94000 { 1774e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1775e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1776e5813b15SDmitry Baryshkov clock-names = "se"; 1777e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1778e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 177959983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>, 178059983a5cSKonrad Dybcio <&gpi_dma1 1 5 QCOM_GPI_SPI>; 178159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 178234e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 178301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 178459983a5cSKonrad Dybcio #address-cells = <1>; 178559983a5cSKonrad Dybcio #size-cells = <0>; 1786e5813b15SDmitry Baryshkov status = "disabled"; 1787e5813b15SDmitry Baryshkov }; 178860378f1aSVenkata Narendra Kumar Gutta }; 178960378f1aSVenkata Narendra Kumar Gutta 1790e7e41a20SJonathan Marek config_noc: interconnect@1500000 { 1791e7e41a20SJonathan Marek compatible = "qcom,sm8250-config-noc"; 1792e7e41a20SJonathan Marek reg = <0 0x01500000 0 0xa580>; 1793b5a12438SAbel Vesa #interconnect-cells = <2>; 1794e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1795e7e41a20SJonathan Marek }; 1796e7e41a20SJonathan Marek 1797e7e41a20SJonathan Marek system_noc: interconnect@1620000 { 1798e7e41a20SJonathan Marek compatible = "qcom,sm8250-system-noc"; 1799e7e41a20SJonathan Marek reg = <0 0x01620000 0 0x1c200>; 1800b5a12438SAbel Vesa #interconnect-cells = <2>; 1801e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1802e7e41a20SJonathan Marek }; 1803e7e41a20SJonathan Marek 1804e7e41a20SJonathan Marek mc_virt: interconnect@163d000 { 1805e7e41a20SJonathan Marek compatible = "qcom,sm8250-mc-virt"; 1806e7e41a20SJonathan Marek reg = <0 0x0163d000 0 0x1000>; 1807b5a12438SAbel Vesa #interconnect-cells = <2>; 1808e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1809e7e41a20SJonathan Marek }; 1810e7e41a20SJonathan Marek 1811e7e41a20SJonathan Marek aggre1_noc: interconnect@16e0000 { 1812e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre1-noc"; 1813e7e41a20SJonathan Marek reg = <0 0x016e0000 0 0x1f180>; 1814b5a12438SAbel Vesa #interconnect-cells = <2>; 1815e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1816e7e41a20SJonathan Marek }; 1817e7e41a20SJonathan Marek 1818e7e41a20SJonathan Marek aggre2_noc: interconnect@1700000 { 1819e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre2-noc"; 1820e7e41a20SJonathan Marek reg = <0 0x01700000 0 0x33000>; 1821b5a12438SAbel Vesa #interconnect-cells = <2>; 1822e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1823e7e41a20SJonathan Marek }; 1824e7e41a20SJonathan Marek 1825e7e41a20SJonathan Marek compute_noc: interconnect@1733000 { 1826e7e41a20SJonathan Marek compatible = "qcom,sm8250-compute-noc"; 1827e7e41a20SJonathan Marek reg = <0 0x01733000 0 0xa180>; 1828b5a12438SAbel Vesa #interconnect-cells = <2>; 1829e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1830e7e41a20SJonathan Marek }; 1831e7e41a20SJonathan Marek 1832e7e41a20SJonathan Marek mmss_noc: interconnect@1740000 { 1833e7e41a20SJonathan Marek compatible = "qcom,sm8250-mmss-noc"; 1834e7e41a20SJonathan Marek reg = <0 0x01740000 0 0x1f080>; 1835b5a12438SAbel Vesa #interconnect-cells = <2>; 1836e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1837e7e41a20SJonathan Marek }; 1838e7e41a20SJonathan Marek 1839e53bdfc0SManivannan Sadhasivam pcie0: pci@1c00000 { 18403e4fec3bSDmitry Baryshkov compatible = "qcom,pcie-sm8250"; 1841e53bdfc0SManivannan Sadhasivam reg = <0 0x01c00000 0 0x3000>, 1842e53bdfc0SManivannan Sadhasivam <0 0x60000000 0 0xf1d>, 1843e53bdfc0SManivannan Sadhasivam <0 0x60000f20 0 0xa8>, 1844e53bdfc0SManivannan Sadhasivam <0 0x60001000 0 0x1000>, 184589210342SManivannan Sadhasivam <0 0x60100000 0 0x100000>, 184689210342SManivannan Sadhasivam <0 0x01c03000 0 0x1000>; 184789210342SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi"; 1848e53bdfc0SManivannan Sadhasivam device_type = "pci"; 1849e53bdfc0SManivannan Sadhasivam linux,pci-domain = <0>; 1850e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 1851e53bdfc0SManivannan Sadhasivam num-lanes = <1>; 1852e53bdfc0SManivannan Sadhasivam 1853e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 1854e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1855e53bdfc0SManivannan Sadhasivam 1856e115a449SManivannan Sadhasivam ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, 1857e115a449SManivannan Sadhasivam <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; 1858e53bdfc0SManivannan Sadhasivam 1859f2819650SDmitry Baryshkov interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 1860f2819650SDmitry Baryshkov <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1861f2819650SDmitry Baryshkov <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 1862f2819650SDmitry Baryshkov <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, 1863f2819650SDmitry Baryshkov <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, 1864f2819650SDmitry Baryshkov <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, 1865f2819650SDmitry Baryshkov <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 1866f2819650SDmitry Baryshkov <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1867f2819650SDmitry Baryshkov interrupt-names = "msi0", "msi1", "msi2", "msi3", 1868f2819650SDmitry Baryshkov "msi4", "msi5", "msi6", "msi7"; 1869e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 1870e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 1871e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 1872e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 1873e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 1874e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 1875e53bdfc0SManivannan Sadhasivam 1876e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, 1877e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_AUX_CLK>, 1878e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_CFG_AHB_CLK>, 1879e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, 1880e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_SLV_AXI_CLK>, 1881e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, 1882e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 1883e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 1884e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 1885e53bdfc0SManivannan Sadhasivam "aux", 1886e53bdfc0SManivannan Sadhasivam "cfg", 1887e53bdfc0SManivannan Sadhasivam "bus_master", 1888e53bdfc0SManivannan Sadhasivam "bus_slave", 1889e53bdfc0SManivannan Sadhasivam "slave_q2a", 1890e53bdfc0SManivannan Sadhasivam "tbu", 1891e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 1892e53bdfc0SManivannan Sadhasivam 1893e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1c00 0x1>, 1894e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1c01 0x1>; 1895e53bdfc0SManivannan Sadhasivam 1896e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_0_BCR>; 1897e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 1898e53bdfc0SManivannan Sadhasivam 1899e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_0_GDSC>; 1900e53bdfc0SManivannan Sadhasivam 1901e53bdfc0SManivannan Sadhasivam phys = <&pcie0_lane>; 1902e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 1903e53bdfc0SManivannan Sadhasivam 1904d6050720SDmitry Baryshkov perst-gpios = <&tlmm 79 GPIO_ACTIVE_LOW>; 1905d6050720SDmitry Baryshkov wake-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; 190613e948a3SKonrad Dybcio 190713e948a3SKonrad Dybcio pinctrl-names = "default"; 190813e948a3SKonrad Dybcio pinctrl-0 = <&pcie0_default_state>; 1909339d38a4SKonrad Dybcio dma-coherent; 191013e948a3SKonrad Dybcio 1911e53bdfc0SManivannan Sadhasivam status = "disabled"; 1912e53bdfc0SManivannan Sadhasivam }; 1913e53bdfc0SManivannan Sadhasivam 1914e53bdfc0SManivannan Sadhasivam pcie0_phy: phy@1c06000 { 1915e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-gen3x1-pcie-phy"; 1916e53bdfc0SManivannan Sadhasivam reg = <0 0x01c06000 0 0x1c0>; 1917e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 1918e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1919e53bdfc0SManivannan Sadhasivam ranges; 1920e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 1921e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_CFG_AHB_CLK>, 1922e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIFI_CLKREF_EN>, 1923e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE0_PHY_REFGEN_CLK>; 1924e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 1925e53bdfc0SManivannan Sadhasivam 1926e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_0_PHY_BCR>; 1927e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 1928e53bdfc0SManivannan Sadhasivam 1929e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE0_PHY_REFGEN_CLK>; 1930e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 1931e53bdfc0SManivannan Sadhasivam 1932e53bdfc0SManivannan Sadhasivam status = "disabled"; 1933e53bdfc0SManivannan Sadhasivam 19341351512fSShawn Guo pcie0_lane: phy@1c06200 { 193581f43efcSKonrad Dybcio reg = <0 0x01c06200 0 0x170>, /* tx */ 193681f43efcSKonrad Dybcio <0 0x01c06400 0 0x200>, /* rx */ 193781f43efcSKonrad Dybcio <0 0x01c06800 0 0x1f0>, /* pcs */ 193881f43efcSKonrad Dybcio <0 0x01c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ 1939e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; 1940e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 1941e53bdfc0SManivannan Sadhasivam 1942e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 1943d9fd162cSJohan Hovold 1944d9fd162cSJohan Hovold #clock-cells = <0>; 1945e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_0_pipe_clk"; 1946e53bdfc0SManivannan Sadhasivam }; 1947e53bdfc0SManivannan Sadhasivam }; 1948e53bdfc0SManivannan Sadhasivam 1949e53bdfc0SManivannan Sadhasivam pcie1: pci@1c08000 { 19503e4fec3bSDmitry Baryshkov compatible = "qcom,pcie-sm8250"; 1951e53bdfc0SManivannan Sadhasivam reg = <0 0x01c08000 0 0x3000>, 1952e53bdfc0SManivannan Sadhasivam <0 0x40000000 0 0xf1d>, 1953e53bdfc0SManivannan Sadhasivam <0 0x40000f20 0 0xa8>, 1954e53bdfc0SManivannan Sadhasivam <0 0x40001000 0 0x1000>, 195589210342SManivannan Sadhasivam <0 0x40100000 0 0x100000>, 195689210342SManivannan Sadhasivam <0 0x01c0b000 0 0x1000>; 195789210342SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi"; 1958e53bdfc0SManivannan Sadhasivam device_type = "pci"; 1959e53bdfc0SManivannan Sadhasivam linux,pci-domain = <1>; 1960e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 1961e53bdfc0SManivannan Sadhasivam num-lanes = <2>; 1962e53bdfc0SManivannan Sadhasivam 1963e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 1964e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1965e53bdfc0SManivannan Sadhasivam 1966e115a449SManivannan Sadhasivam ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, 1967e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; 1968e53bdfc0SManivannan Sadhasivam 19691b7101e8SManivannan Sadhasivam interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 1970e53bdfc0SManivannan Sadhasivam interrupt-names = "msi"; 1971e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 1972e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 1973e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 1974e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 1975e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 1976e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 1977e53bdfc0SManivannan Sadhasivam 1978e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, 1979e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_AUX_CLK>, 1980e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_CFG_AHB_CLK>, 1981e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, 1982e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_SLV_AXI_CLK>, 1983e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>, 1984e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, 1985e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 1986e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 1987e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 1988e53bdfc0SManivannan Sadhasivam "aux", 1989e53bdfc0SManivannan Sadhasivam "cfg", 1990e53bdfc0SManivannan Sadhasivam "bus_master", 1991e53bdfc0SManivannan Sadhasivam "bus_slave", 1992e53bdfc0SManivannan Sadhasivam "slave_q2a", 1993e53bdfc0SManivannan Sadhasivam "ref", 1994e53bdfc0SManivannan Sadhasivam "tbu", 1995e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 1996e53bdfc0SManivannan Sadhasivam 1997e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>; 1998e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <19200000>; 1999e53bdfc0SManivannan Sadhasivam 2000e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1c80 0x1>, 2001e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1c81 0x1>; 2002e53bdfc0SManivannan Sadhasivam 2003e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_1_BCR>; 2004e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 2005e53bdfc0SManivannan Sadhasivam 2006e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_1_GDSC>; 2007e53bdfc0SManivannan Sadhasivam 2008e53bdfc0SManivannan Sadhasivam phys = <&pcie1_lane>; 2009e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 2010e53bdfc0SManivannan Sadhasivam 2011d6050720SDmitry Baryshkov perst-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>; 2012d6050720SDmitry Baryshkov wake-gpios = <&tlmm 84 GPIO_ACTIVE_HIGH>; 201313e948a3SKonrad Dybcio 201413e948a3SKonrad Dybcio pinctrl-names = "default"; 201513e948a3SKonrad Dybcio pinctrl-0 = <&pcie1_default_state>; 2016339d38a4SKonrad Dybcio dma-coherent; 201713e948a3SKonrad Dybcio 2018e53bdfc0SManivannan Sadhasivam status = "disabled"; 2019e53bdfc0SManivannan Sadhasivam }; 2020e53bdfc0SManivannan Sadhasivam 2021e53bdfc0SManivannan Sadhasivam pcie1_phy: phy@1c0e000 { 2022e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy"; 2023e53bdfc0SManivannan Sadhasivam reg = <0 0x01c0e000 0 0x1c0>; 2024e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 2025e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2026e53bdfc0SManivannan Sadhasivam ranges; 2027e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 2028e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_CFG_AHB_CLK>, 2029e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, 2030e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE1_PHY_REFGEN_CLK>; 2031e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 2032e53bdfc0SManivannan Sadhasivam 2033e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_1_PHY_BCR>; 2034e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 2035e53bdfc0SManivannan Sadhasivam 2036e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE1_PHY_REFGEN_CLK>; 2037e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 2038e53bdfc0SManivannan Sadhasivam 2039e53bdfc0SManivannan Sadhasivam status = "disabled"; 2040e53bdfc0SManivannan Sadhasivam 20411351512fSShawn Guo pcie1_lane: phy@1c0e200 { 204281f43efcSKonrad Dybcio reg = <0 0x01c0e200 0 0x170>, /* tx0 */ 204381f43efcSKonrad Dybcio <0 0x01c0e400 0 0x200>, /* rx0 */ 204481f43efcSKonrad Dybcio <0 0x01c0ea00 0 0x1f0>, /* pcs */ 204581f43efcSKonrad Dybcio <0 0x01c0e600 0 0x170>, /* tx1 */ 204681f43efcSKonrad Dybcio <0 0x01c0e800 0 0x200>, /* rx1 */ 204781f43efcSKonrad Dybcio <0 0x01c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ 2048e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; 2049e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 2050e53bdfc0SManivannan Sadhasivam 2051e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 2052d9fd162cSJohan Hovold 2053d9fd162cSJohan Hovold #clock-cells = <0>; 2054e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_1_pipe_clk"; 2055e53bdfc0SManivannan Sadhasivam }; 2056e53bdfc0SManivannan Sadhasivam }; 2057e53bdfc0SManivannan Sadhasivam 2058e53bdfc0SManivannan Sadhasivam pcie2: pci@1c10000 { 20593e4fec3bSDmitry Baryshkov compatible = "qcom,pcie-sm8250"; 2060e53bdfc0SManivannan Sadhasivam reg = <0 0x01c10000 0 0x3000>, 2061e53bdfc0SManivannan Sadhasivam <0 0x64000000 0 0xf1d>, 2062e53bdfc0SManivannan Sadhasivam <0 0x64000f20 0 0xa8>, 2063e53bdfc0SManivannan Sadhasivam <0 0x64001000 0 0x1000>, 206489210342SManivannan Sadhasivam <0 0x64100000 0 0x100000>, 206589210342SManivannan Sadhasivam <0 0x01c13000 0 0x1000>; 206689210342SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi"; 2067e53bdfc0SManivannan Sadhasivam device_type = "pci"; 2068e53bdfc0SManivannan Sadhasivam linux,pci-domain = <2>; 2069e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 2070e53bdfc0SManivannan Sadhasivam num-lanes = <2>; 2071e53bdfc0SManivannan Sadhasivam 2072e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 2073e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2074e53bdfc0SManivannan Sadhasivam 2075e115a449SManivannan Sadhasivam ranges = <0x01000000 0x0 0x00000000 0x0 0x64200000 0x0 0x100000>, 2076e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x64300000 0x0 0x64300000 0x0 0x3d00000>; 2077e53bdfc0SManivannan Sadhasivam 20781b7101e8SManivannan Sadhasivam interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 2079e53bdfc0SManivannan Sadhasivam interrupt-names = "msi"; 2080e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 2081e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 2082e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 290 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 2083e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 415 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 2084e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 416 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 2085e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 417 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 2086e53bdfc0SManivannan Sadhasivam 2087e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_2_PIPE_CLK>, 2088e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_AUX_CLK>, 2089e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_CFG_AHB_CLK>, 2090e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_MSTR_AXI_CLK>, 2091e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_SLV_AXI_CLK>, 2092e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>, 2093e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_MDM_CLKREF_EN>, 2094e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 2095e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 2096e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 2097e53bdfc0SManivannan Sadhasivam "aux", 2098e53bdfc0SManivannan Sadhasivam "cfg", 2099e53bdfc0SManivannan Sadhasivam "bus_master", 2100e53bdfc0SManivannan Sadhasivam "bus_slave", 2101e53bdfc0SManivannan Sadhasivam "slave_q2a", 2102e53bdfc0SManivannan Sadhasivam "ref", 2103e53bdfc0SManivannan Sadhasivam "tbu", 2104e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 2105e53bdfc0SManivannan Sadhasivam 2106e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE_2_AUX_CLK>; 2107e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <19200000>; 2108e53bdfc0SManivannan Sadhasivam 2109e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1d00 0x1>, 2110e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1d01 0x1>; 2111e53bdfc0SManivannan Sadhasivam 2112e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_2_BCR>; 2113e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 2114e53bdfc0SManivannan Sadhasivam 2115e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_2_GDSC>; 2116e53bdfc0SManivannan Sadhasivam 2117e53bdfc0SManivannan Sadhasivam phys = <&pcie2_lane>; 2118e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 2119e53bdfc0SManivannan Sadhasivam 2120d6050720SDmitry Baryshkov perst-gpios = <&tlmm 85 GPIO_ACTIVE_LOW>; 2121d6050720SDmitry Baryshkov wake-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>; 212213e948a3SKonrad Dybcio 212313e948a3SKonrad Dybcio pinctrl-names = "default"; 212413e948a3SKonrad Dybcio pinctrl-0 = <&pcie2_default_state>; 2125339d38a4SKonrad Dybcio dma-coherent; 212613e948a3SKonrad Dybcio 2127e53bdfc0SManivannan Sadhasivam status = "disabled"; 2128e53bdfc0SManivannan Sadhasivam }; 2129e53bdfc0SManivannan Sadhasivam 2130e53bdfc0SManivannan Sadhasivam pcie2_phy: phy@1c16000 { 2131e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-modem-pcie-phy"; 213281f43efcSKonrad Dybcio reg = <0 0x01c16000 0 0x1c0>; 2133e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 2134e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2135e53bdfc0SManivannan Sadhasivam ranges; 2136e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 2137e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_CFG_AHB_CLK>, 2138e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_MDM_CLKREF_EN>, 2139e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE2_PHY_REFGEN_CLK>; 2140e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 2141e53bdfc0SManivannan Sadhasivam 2142e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_2_PHY_BCR>; 2143e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 2144e53bdfc0SManivannan Sadhasivam 2145e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE2_PHY_REFGEN_CLK>; 2146e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 2147e53bdfc0SManivannan Sadhasivam 2148e53bdfc0SManivannan Sadhasivam status = "disabled"; 2149e53bdfc0SManivannan Sadhasivam 21501351512fSShawn Guo pcie2_lane: phy@1c16200 { 215181f43efcSKonrad Dybcio reg = <0 0x01c16200 0 0x170>, /* tx0 */ 215281f43efcSKonrad Dybcio <0 0x01c16400 0 0x200>, /* rx0 */ 215381f43efcSKonrad Dybcio <0 0x01c16a00 0 0x1f0>, /* pcs */ 215481f43efcSKonrad Dybcio <0 0x01c16600 0 0x170>, /* tx1 */ 215581f43efcSKonrad Dybcio <0 0x01c16800 0 0x200>, /* rx1 */ 215681f43efcSKonrad Dybcio <0 0x01c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ 2157e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; 2158e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 2159e53bdfc0SManivannan Sadhasivam 2160e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 2161d9fd162cSJohan Hovold 2162d9fd162cSJohan Hovold #clock-cells = <0>; 2163e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_2_pipe_clk"; 2164e53bdfc0SManivannan Sadhasivam }; 2165e53bdfc0SManivannan Sadhasivam }; 2166e53bdfc0SManivannan Sadhasivam 21676b9afd8fSJonathan Marek ufs_mem_hc: ufshc@1d84000 { 2168b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-ufshc", "qcom,ufshc", 2169b7e2fba0SBryan O'Donoghue "jedec,ufs-2.0"; 2170b7e2fba0SBryan O'Donoghue reg = <0 0x01d84000 0 0x3000>; 2171b7e2fba0SBryan O'Donoghue interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 2172b7e2fba0SBryan O'Donoghue phys = <&ufs_mem_phy_lanes>; 2173b7e2fba0SBryan O'Donoghue phy-names = "ufsphy"; 2174b7e2fba0SBryan O'Donoghue lanes-per-direction = <2>; 2175b7e2fba0SBryan O'Donoghue #reset-cells = <1>; 2176b7e2fba0SBryan O'Donoghue resets = <&gcc GCC_UFS_PHY_BCR>; 2177b7e2fba0SBryan O'Donoghue reset-names = "rst"; 2178b7e2fba0SBryan O'Donoghue 2179b7e2fba0SBryan O'Donoghue power-domains = <&gcc UFS_PHY_GDSC>; 2180b7e2fba0SBryan O'Donoghue 2181a89441fcSJonathan Marek iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>; 2182a89441fcSJonathan Marek 2183b7e2fba0SBryan O'Donoghue clock-names = 2184b7e2fba0SBryan O'Donoghue "core_clk", 2185b7e2fba0SBryan O'Donoghue "bus_aggr_clk", 2186b7e2fba0SBryan O'Donoghue "iface_clk", 2187b7e2fba0SBryan O'Donoghue "core_clk_unipro", 2188b7e2fba0SBryan O'Donoghue "ref_clk", 2189b7e2fba0SBryan O'Donoghue "tx_lane0_sync_clk", 2190b7e2fba0SBryan O'Donoghue "rx_lane0_sync_clk", 2191b7e2fba0SBryan O'Donoghue "rx_lane1_sync_clk"; 2192b7e2fba0SBryan O'Donoghue clocks = 2193b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AXI_CLK>, 2194b7e2fba0SBryan O'Donoghue <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 2195b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AHB_CLK>, 2196b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 2197b7e2fba0SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 2198b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 2199b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 2200b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 2201b7e2fba0SBryan O'Donoghue freq-table-hz = 2202b7e2fba0SBryan O'Donoghue <37500000 300000000>, 2203b7e2fba0SBryan O'Donoghue <0 0>, 2204b7e2fba0SBryan O'Donoghue <0 0>, 2205b7e2fba0SBryan O'Donoghue <37500000 300000000>, 2206b7e2fba0SBryan O'Donoghue <0 0>, 2207b7e2fba0SBryan O'Donoghue <0 0>, 2208b7e2fba0SBryan O'Donoghue <0 0>, 2209b7e2fba0SBryan O'Donoghue <0 0>; 2210b7e2fba0SBryan O'Donoghue 2211aeea5607SManivannan Sadhasivam interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI_CH0 0>, 2212aeea5607SManivannan Sadhasivam <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_UFS_MEM_CFG 0>; 2213aeea5607SManivannan Sadhasivam interconnect-names = "ufs-ddr", "cpu-ufs"; 2214aeea5607SManivannan Sadhasivam 2215b7e2fba0SBryan O'Donoghue status = "disabled"; 2216b7e2fba0SBryan O'Donoghue }; 2217b7e2fba0SBryan O'Donoghue 2218b7e2fba0SBryan O'Donoghue ufs_mem_phy: phy@1d87000 { 2219b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-qmp-ufs-phy"; 2220b7e2fba0SBryan O'Donoghue reg = <0 0x01d87000 0 0x1c0>; 2221b7e2fba0SBryan O'Donoghue #address-cells = <2>; 2222b7e2fba0SBryan O'Donoghue #size-cells = <2>; 2223b7e2fba0SBryan O'Donoghue ranges; 2224b7e2fba0SBryan O'Donoghue clock-names = "ref", 2225b7e2fba0SBryan O'Donoghue "ref_aux"; 2226b7e2fba0SBryan O'Donoghue clocks = <&rpmhcc RPMH_CXO_CLK>, 2227b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 2228b7e2fba0SBryan O'Donoghue 2229b7e2fba0SBryan O'Donoghue resets = <&ufs_mem_hc 0>; 2230b7e2fba0SBryan O'Donoghue reset-names = "ufsphy"; 2231b7e2fba0SBryan O'Donoghue status = "disabled"; 2232b7e2fba0SBryan O'Donoghue 22331351512fSShawn Guo ufs_mem_phy_lanes: phy@1d87400 { 22347f8b37ddSJohan Hovold reg = <0 0x01d87400 0 0x16c>, 22357f8b37ddSJohan Hovold <0 0x01d87600 0 0x200>, 22367f8b37ddSJohan Hovold <0 0x01d87c00 0 0x200>, 22377f8b37ddSJohan Hovold <0 0x01d87800 0 0x16c>, 22387f8b37ddSJohan Hovold <0 0x01d87a00 0 0x200>; 2239b7e2fba0SBryan O'Donoghue #phy-cells = <0>; 2240b7e2fba0SBryan O'Donoghue }; 2241b7e2fba0SBryan O'Donoghue }; 2242b7e2fba0SBryan O'Donoghue 2243c58be6c8SBhupesh Sharma cryptobam: dma-controller@1dc4000 { 2244c58be6c8SBhupesh Sharma compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; 2245c58be6c8SBhupesh Sharma reg = <0 0x01dc4000 0 0x24000>; 2246c58be6c8SBhupesh Sharma interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 2247c58be6c8SBhupesh Sharma #dma-cells = <1>; 2248c58be6c8SBhupesh Sharma qcom,ee = <0>; 2249c58be6c8SBhupesh Sharma qcom,controlled-remotely; 2250c58be6c8SBhupesh Sharma num-channels = <8>; 2251c58be6c8SBhupesh Sharma qcom,num-ees = <2>; 2252c58be6c8SBhupesh Sharma iommus = <&apps_smmu 0x592 0x0000>, 2253c58be6c8SBhupesh Sharma <&apps_smmu 0x598 0x0000>, 2254c58be6c8SBhupesh Sharma <&apps_smmu 0x599 0x0000>, 2255c58be6c8SBhupesh Sharma <&apps_smmu 0x59f 0x0000>, 2256c58be6c8SBhupesh Sharma <&apps_smmu 0x586 0x0011>, 2257c58be6c8SBhupesh Sharma <&apps_smmu 0x596 0x0011>; 2258c58be6c8SBhupesh Sharma }; 2259c58be6c8SBhupesh Sharma 2260c58be6c8SBhupesh Sharma crypto: crypto@1dfa000 { 2261c58be6c8SBhupesh Sharma compatible = "qcom,sm8250-qce", "qcom,sm8150-qce", "qcom,qce"; 2262c58be6c8SBhupesh Sharma reg = <0 0x01dfa000 0 0x6000>; 2263c58be6c8SBhupesh Sharma dmas = <&cryptobam 4>, <&cryptobam 5>; 2264c58be6c8SBhupesh Sharma dma-names = "rx", "tx"; 2265c58be6c8SBhupesh Sharma iommus = <&apps_smmu 0x592 0x0000>, 2266c58be6c8SBhupesh Sharma <&apps_smmu 0x598 0x0000>, 2267c58be6c8SBhupesh Sharma <&apps_smmu 0x599 0x0000>, 2268c58be6c8SBhupesh Sharma <&apps_smmu 0x59f 0x0000>, 2269c58be6c8SBhupesh Sharma <&apps_smmu 0x586 0x0011>, 2270c58be6c8SBhupesh Sharma <&apps_smmu 0x596 0x0011>; 2271b5a12438SAbel Vesa interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>; 2272c58be6c8SBhupesh Sharma interconnect-names = "memory"; 2273c58be6c8SBhupesh Sharma }; 2274c58be6c8SBhupesh Sharma 2275dff0f49cSBjorn Andersson tcsr_mutex: hwlock@1f40000 { 2276dff0f49cSBjorn Andersson compatible = "qcom,tcsr-mutex"; 2277b9ec8cbcSJonathan Marek reg = <0x0 0x01f40000 0x0 0x40000>; 2278dff0f49cSBjorn Andersson #hwlock-cells = <1>; 227960378f1aSVenkata Narendra Kumar Gutta }; 228060378f1aSVenkata Narendra Kumar Gutta 2281768270caSSrinivas Kandagatla wsamacro: codec@3240000 { 2282768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-wsa-macro"; 2283768270caSSrinivas Kandagatla reg = <0 0x03240000 0 0x1000>; 22847858ef3cSLuca Weiss clocks = <&audiocc LPASS_CDC_WSA_MCLK>, 22857858ef3cSLuca Weiss <&audiocc LPASS_CDC_WSA_NPL>, 2286768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2287768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 22887858ef3cSLuca Weiss <&aoncc LPASS_CDC_VA_MCLK>, 2289768270caSSrinivas Kandagatla <&vamacro>; 2290768270caSSrinivas Kandagatla 2291768270caSSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen"; 2292768270caSSrinivas Kandagatla 2293768270caSSrinivas Kandagatla #clock-cells = <0>; 2294768270caSSrinivas Kandagatla clock-output-names = "mclk"; 2295768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2296768270caSSrinivas Kandagatla 2297768270caSSrinivas Kandagatla pinctrl-names = "default"; 2298768270caSSrinivas Kandagatla pinctrl-0 = <&wsa_swr_active>; 2299ba23455eSKonrad Dybcio 2300ba23455eSKonrad Dybcio status = "disabled"; 2301768270caSSrinivas Kandagatla }; 2302768270caSSrinivas Kandagatla 2303768270caSSrinivas Kandagatla swr0: soundwire-controller@3250000 { 2304768270caSSrinivas Kandagatla reg = <0 0x03250000 0 0x2000>; 2305768270caSSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 2306768270caSSrinivas Kandagatla interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; 2307768270caSSrinivas Kandagatla clocks = <&wsamacro>; 2308768270caSSrinivas Kandagatla clock-names = "iface"; 2309768270caSSrinivas Kandagatla 2310768270caSSrinivas Kandagatla qcom,din-ports = <2>; 2311768270caSSrinivas Kandagatla qcom,dout-ports = <6>; 2312768270caSSrinivas Kandagatla 2313768270caSSrinivas Kandagatla qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>; 2314768270caSSrinivas Kandagatla qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>; 2315768270caSSrinivas Kandagatla qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>; 2316768270caSSrinivas Kandagatla qcom,ports-block-pack-mode = /bits/ 8 <0x0 0x0 0x1 0x0 0x0 0x1 0x0 0x0>; 2317768270caSSrinivas Kandagatla 2318768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2319768270caSSrinivas Kandagatla #address-cells = <2>; 2320768270caSSrinivas Kandagatla #size-cells = <0>; 2321ba23455eSKonrad Dybcio 2322ba23455eSKonrad Dybcio status = "disabled"; 2323768270caSSrinivas Kandagatla }; 2324768270caSSrinivas Kandagatla 2325793bbd2dSSrinivas Kandagatla audiocc: clock-controller@3300000 { 2326793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-audiocc"; 2327793bbd2dSSrinivas Kandagatla reg = <0 0x03300000 0 0x30000>; 2328793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 2329793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2330793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2331793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2332793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 2333793bbd2dSSrinivas Kandagatla }; 2334793bbd2dSSrinivas Kandagatla 2335768270caSSrinivas Kandagatla vamacro: codec@3370000 { 2336768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-va-macro"; 2337768270caSSrinivas Kandagatla reg = <0 0x03370000 0 0x1000>; 23387858ef3cSLuca Weiss clocks = <&aoncc LPASS_CDC_VA_MCLK>, 2339768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2340768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2341768270caSSrinivas Kandagatla 2342768270caSSrinivas Kandagatla clock-names = "mclk", "macro", "dcodec"; 2343768270caSSrinivas Kandagatla 2344768270caSSrinivas Kandagatla #clock-cells = <0>; 2345768270caSSrinivas Kandagatla clock-output-names = "fsgen"; 2346768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2347768270caSSrinivas Kandagatla }; 2348768270caSSrinivas Kandagatla 234924f52ef0SSrinivas Kandagatla rxmacro: rxmacro@3200000 { 235024f52ef0SSrinivas Kandagatla pinctrl-names = "default"; 235124f52ef0SSrinivas Kandagatla pinctrl-0 = <&rx_swr_active>; 235224f52ef0SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-rx-macro"; 2353d8b4ee93SKonrad Dybcio reg = <0 0x03200000 0 0x1000>; 235418019eb6SDmitry Baryshkov status = "disabled"; 235524f52ef0SSrinivas Kandagatla 235624f52ef0SSrinivas Kandagatla clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235724f52ef0SSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235824f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235924f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 236024f52ef0SSrinivas Kandagatla <&vamacro>; 236124f52ef0SSrinivas Kandagatla 236224f52ef0SSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; 236324f52ef0SSrinivas Kandagatla 236424f52ef0SSrinivas Kandagatla #clock-cells = <0>; 236524f52ef0SSrinivas Kandagatla clock-output-names = "mclk"; 236624f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 236724f52ef0SSrinivas Kandagatla }; 236824f52ef0SSrinivas Kandagatla 236924f52ef0SSrinivas Kandagatla swr1: soundwire-controller@3210000 { 2370d8b4ee93SKonrad Dybcio reg = <0 0x03210000 0 0x2000>; 237124f52ef0SSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 237218019eb6SDmitry Baryshkov status = "disabled"; 237324f52ef0SSrinivas Kandagatla interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 237424f52ef0SSrinivas Kandagatla clocks = <&rxmacro>; 237524f52ef0SSrinivas Kandagatla clock-names = "iface"; 237624f52ef0SSrinivas Kandagatla label = "RX"; 237724f52ef0SSrinivas Kandagatla qcom,din-ports = <0>; 237824f52ef0SSrinivas Kandagatla qcom,dout-ports = <5>; 237924f52ef0SSrinivas Kandagatla 238074f91659SKonrad Dybcio qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>; 238174f91659SKonrad Dybcio qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00>; 238274f91659SKonrad Dybcio qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; 238374f91659SKonrad Dybcio qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; 238474f91659SKonrad Dybcio qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; 238574f91659SKonrad Dybcio qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; 238674f91659SKonrad Dybcio qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; 238724f52ef0SSrinivas Kandagatla qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; 238874f91659SKonrad Dybcio qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; 238924f52ef0SSrinivas Kandagatla 239024f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 239124f52ef0SSrinivas Kandagatla #address-cells = <2>; 239224f52ef0SSrinivas Kandagatla #size-cells = <0>; 239324f52ef0SSrinivas Kandagatla }; 239424f52ef0SSrinivas Kandagatla 239524f52ef0SSrinivas Kandagatla txmacro: txmacro@3220000 { 239624f52ef0SSrinivas Kandagatla pinctrl-names = "default"; 239724f52ef0SSrinivas Kandagatla pinctrl-0 = <&tx_swr_active>; 239824f52ef0SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-tx-macro"; 2399d8b4ee93SKonrad Dybcio reg = <0 0x03220000 0 0x1000>; 240018019eb6SDmitry Baryshkov status = "disabled"; 240124f52ef0SSrinivas Kandagatla 240224f52ef0SSrinivas Kandagatla clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 240324f52ef0SSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 240424f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 240524f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 240624f52ef0SSrinivas Kandagatla <&vamacro>; 240724f52ef0SSrinivas Kandagatla 240824f52ef0SSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; 240924f52ef0SSrinivas Kandagatla 241024f52ef0SSrinivas Kandagatla #clock-cells = <0>; 241124f52ef0SSrinivas Kandagatla clock-output-names = "mclk"; 241224f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 241324f52ef0SSrinivas Kandagatla }; 241424f52ef0SSrinivas Kandagatla 241524f52ef0SSrinivas Kandagatla /* tx macro */ 241624f52ef0SSrinivas Kandagatla swr2: soundwire-controller@3230000 { 2417d8b4ee93SKonrad Dybcio reg = <0 0x03230000 0 0x2000>; 241824f52ef0SSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 241956306502SKrzysztof Kozlowski interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>; 242024f52ef0SSrinivas Kandagatla interrupt-names = "core"; 242118019eb6SDmitry Baryshkov status = "disabled"; 242224f52ef0SSrinivas Kandagatla 242324f52ef0SSrinivas Kandagatla clocks = <&txmacro>; 242424f52ef0SSrinivas Kandagatla clock-names = "iface"; 242524f52ef0SSrinivas Kandagatla label = "TX"; 242624f52ef0SSrinivas Kandagatla 242724f52ef0SSrinivas Kandagatla qcom,din-ports = <5>; 242824f52ef0SSrinivas Kandagatla qcom,dout-ports = <0>; 242974f91659SKonrad Dybcio qcom,ports-sinterval-low = /bits/ 8 <0xff 0x01 0x01 0x03 0x03>; 243074f91659SKonrad Dybcio qcom,ports-offset1 = /bits/ 8 <0xff 0x01 0x00 0x02 0x00>; 243174f91659SKonrad Dybcio qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x00 0x00 0x00>; 243274f91659SKonrad Dybcio qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 243374f91659SKonrad Dybcio qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 243474f91659SKonrad Dybcio qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 243574f91659SKonrad Dybcio qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 243674f91659SKonrad Dybcio qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 243774f91659SKonrad Dybcio qcom,ports-lane-control = /bits/ 8 <0xff 0x00 0x01 0x00 0x01>; 243824f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 243924f52ef0SSrinivas Kandagatla #address-cells = <2>; 244024f52ef0SSrinivas Kandagatla #size-cells = <0>; 244124f52ef0SSrinivas Kandagatla }; 244224f52ef0SSrinivas Kandagatla 2443793bbd2dSSrinivas Kandagatla aoncc: clock-controller@3380000 { 2444793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-aoncc"; 2445793bbd2dSSrinivas Kandagatla reg = <0 0x03380000 0 0x40000>; 2446793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 2447793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2448793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2449793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2450793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 2451793bbd2dSSrinivas Kandagatla }; 2452793bbd2dSSrinivas Kandagatla 24533160c1b8SSrinivas Kandagatla lpass_tlmm: pinctrl@33c0000 { 24543160c1b8SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-lpi-pinctrl"; 24553160c1b8SSrinivas Kandagatla reg = <0 0x033c0000 0x0 0x20000>, 24563160c1b8SSrinivas Kandagatla <0 0x03550000 0x0 0x10000>; 24573160c1b8SSrinivas Kandagatla gpio-controller; 24583160c1b8SSrinivas Kandagatla #gpio-cells = <2>; 24593160c1b8SSrinivas Kandagatla gpio-ranges = <&lpass_tlmm 0 0 14>; 24603160c1b8SSrinivas Kandagatla 24613160c1b8SSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 24623160c1b8SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 24633160c1b8SSrinivas Kandagatla clock-names = "core", "audio"; 24643160c1b8SSrinivas Kandagatla 2465031f5436SKrzysztof Kozlowski wsa_swr_active: wsa-swr-active-state { 2466031f5436SKrzysztof Kozlowski clk-pins { 24673160c1b8SSrinivas Kandagatla pins = "gpio10"; 24683160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 24693160c1b8SSrinivas Kandagatla drive-strength = <2>; 24703160c1b8SSrinivas Kandagatla slew-rate = <1>; 24713160c1b8SSrinivas Kandagatla bias-disable; 24723160c1b8SSrinivas Kandagatla }; 24733160c1b8SSrinivas Kandagatla 2474031f5436SKrzysztof Kozlowski data-pins { 24753160c1b8SSrinivas Kandagatla pins = "gpio11"; 24763160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 24773160c1b8SSrinivas Kandagatla drive-strength = <2>; 24783160c1b8SSrinivas Kandagatla slew-rate = <1>; 24793160c1b8SSrinivas Kandagatla bias-bus-hold; 24803160c1b8SSrinivas Kandagatla }; 24813160c1b8SSrinivas Kandagatla }; 24823160c1b8SSrinivas Kandagatla 2483031f5436SKrzysztof Kozlowski wsa_swr_sleep: wsa-swr-sleep-state { 2484031f5436SKrzysztof Kozlowski clk-pins { 24853160c1b8SSrinivas Kandagatla pins = "gpio10"; 24863160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 24873160c1b8SSrinivas Kandagatla drive-strength = <2>; 24883160c1b8SSrinivas Kandagatla bias-pull-down; 24893160c1b8SSrinivas Kandagatla }; 24903160c1b8SSrinivas Kandagatla 2491031f5436SKrzysztof Kozlowski data-pins { 24923160c1b8SSrinivas Kandagatla pins = "gpio11"; 24933160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 24943160c1b8SSrinivas Kandagatla drive-strength = <2>; 24953160c1b8SSrinivas Kandagatla bias-pull-down; 24963160c1b8SSrinivas Kandagatla }; 24973160c1b8SSrinivas Kandagatla }; 24983160c1b8SSrinivas Kandagatla 2499031f5436SKrzysztof Kozlowski dmic01_active: dmic01-active-state { 2500031f5436SKrzysztof Kozlowski clk-pins { 25013160c1b8SSrinivas Kandagatla pins = "gpio6"; 25023160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 25033160c1b8SSrinivas Kandagatla drive-strength = <8>; 25043160c1b8SSrinivas Kandagatla output-high; 25053160c1b8SSrinivas Kandagatla }; 2506031f5436SKrzysztof Kozlowski data-pins { 25073160c1b8SSrinivas Kandagatla pins = "gpio7"; 25083160c1b8SSrinivas Kandagatla function = "dmic1_data"; 25093160c1b8SSrinivas Kandagatla drive-strength = <8>; 25103160c1b8SSrinivas Kandagatla }; 25113160c1b8SSrinivas Kandagatla }; 25123160c1b8SSrinivas Kandagatla 2513031f5436SKrzysztof Kozlowski dmic01_sleep: dmic01-sleep-state { 2514031f5436SKrzysztof Kozlowski clk-pins { 25153160c1b8SSrinivas Kandagatla pins = "gpio6"; 25163160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 25173160c1b8SSrinivas Kandagatla drive-strength = <2>; 25183160c1b8SSrinivas Kandagatla bias-disable; 25193160c1b8SSrinivas Kandagatla output-low; 25203160c1b8SSrinivas Kandagatla }; 25213160c1b8SSrinivas Kandagatla 2522031f5436SKrzysztof Kozlowski data-pins { 25233160c1b8SSrinivas Kandagatla pins = "gpio7"; 25243160c1b8SSrinivas Kandagatla function = "dmic1_data"; 25253160c1b8SSrinivas Kandagatla drive-strength = <2>; 2526195a0a11SKrzysztof Kozlowski bias-pull-down; 25273160c1b8SSrinivas Kandagatla }; 25283160c1b8SSrinivas Kandagatla }; 252924f52ef0SSrinivas Kandagatla 2530031f5436SKrzysztof Kozlowski rx_swr_active: rx-swr-active-state { 2531031f5436SKrzysztof Kozlowski clk-pins { 253224f52ef0SSrinivas Kandagatla pins = "gpio3"; 253324f52ef0SSrinivas Kandagatla function = "swr_rx_clk"; 253424f52ef0SSrinivas Kandagatla drive-strength = <2>; 253524f52ef0SSrinivas Kandagatla slew-rate = <1>; 253624f52ef0SSrinivas Kandagatla bias-disable; 253724f52ef0SSrinivas Kandagatla }; 253824f52ef0SSrinivas Kandagatla 2539031f5436SKrzysztof Kozlowski data-pins { 254024f52ef0SSrinivas Kandagatla pins = "gpio4", "gpio5"; 254124f52ef0SSrinivas Kandagatla function = "swr_rx_data"; 254224f52ef0SSrinivas Kandagatla drive-strength = <2>; 254324f52ef0SSrinivas Kandagatla slew-rate = <1>; 254424f52ef0SSrinivas Kandagatla bias-bus-hold; 254524f52ef0SSrinivas Kandagatla }; 254624f52ef0SSrinivas Kandagatla }; 254724f52ef0SSrinivas Kandagatla 2548031f5436SKrzysztof Kozlowski tx_swr_active: tx-swr-active-state { 2549031f5436SKrzysztof Kozlowski clk-pins { 255024f52ef0SSrinivas Kandagatla pins = "gpio0"; 255124f52ef0SSrinivas Kandagatla function = "swr_tx_clk"; 255224f52ef0SSrinivas Kandagatla drive-strength = <2>; 255324f52ef0SSrinivas Kandagatla slew-rate = <1>; 255424f52ef0SSrinivas Kandagatla bias-disable; 255524f52ef0SSrinivas Kandagatla }; 255624f52ef0SSrinivas Kandagatla 2557031f5436SKrzysztof Kozlowski data-pins { 255824f52ef0SSrinivas Kandagatla pins = "gpio1", "gpio2"; 255924f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 256024f52ef0SSrinivas Kandagatla drive-strength = <2>; 256124f52ef0SSrinivas Kandagatla slew-rate = <1>; 256224f52ef0SSrinivas Kandagatla bias-bus-hold; 256324f52ef0SSrinivas Kandagatla }; 256424f52ef0SSrinivas Kandagatla }; 256524f52ef0SSrinivas Kandagatla 2566031f5436SKrzysztof Kozlowski tx_swr_sleep: tx-swr-sleep-state { 2567031f5436SKrzysztof Kozlowski clk-pins { 256824f52ef0SSrinivas Kandagatla pins = "gpio0"; 256924f52ef0SSrinivas Kandagatla function = "swr_tx_clk"; 257024f52ef0SSrinivas Kandagatla drive-strength = <2>; 257124f52ef0SSrinivas Kandagatla bias-pull-down; 257224f52ef0SSrinivas Kandagatla }; 257324f52ef0SSrinivas Kandagatla 2574031f5436SKrzysztof Kozlowski data1-pins { 257524f52ef0SSrinivas Kandagatla pins = "gpio1"; 257624f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 257724f52ef0SSrinivas Kandagatla drive-strength = <2>; 257824f52ef0SSrinivas Kandagatla bias-bus-hold; 257924f52ef0SSrinivas Kandagatla }; 258024f52ef0SSrinivas Kandagatla 2581031f5436SKrzysztof Kozlowski data2-pins { 258224f52ef0SSrinivas Kandagatla pins = "gpio2"; 258324f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 258424f52ef0SSrinivas Kandagatla drive-strength = <2>; 258524f52ef0SSrinivas Kandagatla bias-pull-down; 258624f52ef0SSrinivas Kandagatla }; 258724f52ef0SSrinivas Kandagatla }; 25883160c1b8SSrinivas Kandagatla }; 25893160c1b8SSrinivas Kandagatla 259004a3605bSJonathan Marek gpu: gpu@3d00000 { 259104a3605bSJonathan Marek compatible = "qcom,adreno-650.2", 25927c1dffd4SDmitry Baryshkov "qcom,adreno"; 259304a3605bSJonathan Marek 259404a3605bSJonathan Marek reg = <0 0x03d00000 0 0x40000>; 259504a3605bSJonathan Marek reg-names = "kgsl_3d0_reg_memory"; 259604a3605bSJonathan Marek 259704a3605bSJonathan Marek interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; 259804a3605bSJonathan Marek 259904a3605bSJonathan Marek iommus = <&adreno_smmu 0 0x401>; 260004a3605bSJonathan Marek 260104a3605bSJonathan Marek operating-points-v2 = <&gpu_opp_table>; 260204a3605bSJonathan Marek 260304a3605bSJonathan Marek qcom,gmu = <&gmu>; 260404a3605bSJonathan Marek 26052a50d1a0SKonrad Dybcio nvmem-cells = <&gpu_speed_bin>; 26062a50d1a0SKonrad Dybcio nvmem-cell-names = "speed_bin"; 26072a50d1a0SKonrad Dybcio 2608ece28cb5SKonrad Dybcio status = "disabled"; 2609ece28cb5SKonrad Dybcio 261004a3605bSJonathan Marek zap-shader { 261104a3605bSJonathan Marek memory-region = <&gpu_mem>; 261204a3605bSJonathan Marek }; 261304a3605bSJonathan Marek 261404a3605bSJonathan Marek gpu_opp_table: opp-table { 261504a3605bSJonathan Marek compatible = "operating-points-v2"; 261604a3605bSJonathan Marek 261704a3605bSJonathan Marek opp-670000000 { 261804a3605bSJonathan Marek opp-hz = /bits/ 64 <670000000>; 261904a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 26202a50d1a0SKonrad Dybcio opp-supported-hw = <0xa>; 262104a3605bSJonathan Marek }; 262204a3605bSJonathan Marek 262304a3605bSJonathan Marek opp-587000000 { 262404a3605bSJonathan Marek opp-hz = /bits/ 64 <587000000>; 262504a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 26262a50d1a0SKonrad Dybcio opp-supported-hw = <0xb>; 262704a3605bSJonathan Marek }; 262804a3605bSJonathan Marek 262904a3605bSJonathan Marek opp-525000000 { 263004a3605bSJonathan Marek opp-hz = /bits/ 64 <525000000>; 263104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; 26322a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 263304a3605bSJonathan Marek }; 263404a3605bSJonathan Marek 263504a3605bSJonathan Marek opp-490000000 { 263604a3605bSJonathan Marek opp-hz = /bits/ 64 <490000000>; 263704a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 26382a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 263904a3605bSJonathan Marek }; 264004a3605bSJonathan Marek 264104a3605bSJonathan Marek opp-441600000 { 264204a3605bSJonathan Marek opp-hz = /bits/ 64 <441600000>; 264304a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>; 26442a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 264504a3605bSJonathan Marek }; 264604a3605bSJonathan Marek 264704a3605bSJonathan Marek opp-400000000 { 264804a3605bSJonathan Marek opp-hz = /bits/ 64 <400000000>; 264904a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 26502a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 265104a3605bSJonathan Marek }; 265204a3605bSJonathan Marek 265304a3605bSJonathan Marek opp-305000000 { 265404a3605bSJonathan Marek opp-hz = /bits/ 64 <305000000>; 265504a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 26562a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 265704a3605bSJonathan Marek }; 265804a3605bSJonathan Marek }; 265904a3605bSJonathan Marek }; 266004a3605bSJonathan Marek 266104a3605bSJonathan Marek gmu: gmu@3d6a000 { 266204a3605bSJonathan Marek compatible = "qcom,adreno-gmu-650.2", "qcom,adreno-gmu"; 266304a3605bSJonathan Marek 266404a3605bSJonathan Marek reg = <0 0x03d6a000 0 0x30000>, 266504a3605bSJonathan Marek <0 0x3de0000 0 0x10000>, 266604a3605bSJonathan Marek <0 0xb290000 0 0x10000>, 266704a3605bSJonathan Marek <0 0xb490000 0 0x10000>; 266804a3605bSJonathan Marek reg-names = "gmu", "rscc", "gmu_pdc", "gmu_pdc_seq"; 266904a3605bSJonathan Marek 267004a3605bSJonathan Marek interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 267104a3605bSJonathan Marek <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 267204a3605bSJonathan Marek interrupt-names = "hfi", "gmu"; 267304a3605bSJonathan Marek 26740e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 26750e6aa9dbSJonathan Marek <&gpucc GPU_CC_CX_GMU_CLK>, 26760e6aa9dbSJonathan Marek <&gpucc GPU_CC_CXO_CLK>, 267704a3605bSJonathan Marek <&gcc GCC_DDRSS_GPU_AXI_CLK>, 267804a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>; 267904a3605bSJonathan Marek clock-names = "ahb", "gmu", "cxo", "axi", "memnoc"; 268004a3605bSJonathan Marek 26810e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>, 26820e6aa9dbSJonathan Marek <&gpucc GPU_GX_GDSC>; 268304a3605bSJonathan Marek power-domain-names = "cx", "gx"; 268404a3605bSJonathan Marek 268504a3605bSJonathan Marek iommus = <&adreno_smmu 5 0x400>; 268604a3605bSJonathan Marek 268704a3605bSJonathan Marek operating-points-v2 = <&gmu_opp_table>; 268804a3605bSJonathan Marek 2689ece28cb5SKonrad Dybcio status = "disabled"; 2690ece28cb5SKonrad Dybcio 269104a3605bSJonathan Marek gmu_opp_table: opp-table { 269204a3605bSJonathan Marek compatible = "operating-points-v2"; 269304a3605bSJonathan Marek 269404a3605bSJonathan Marek opp-200000000 { 269504a3605bSJonathan Marek opp-hz = /bits/ 64 <200000000>; 269604a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 269704a3605bSJonathan Marek }; 269804a3605bSJonathan Marek }; 269904a3605bSJonathan Marek }; 270004a3605bSJonathan Marek 270104a3605bSJonathan Marek gpucc: clock-controller@3d90000 { 270204a3605bSJonathan Marek compatible = "qcom,sm8250-gpucc"; 270304a3605bSJonathan Marek reg = <0 0x03d90000 0 0x9000>; 270404a3605bSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>, 270504a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_CLK_SRC>, 270604a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 270704a3605bSJonathan Marek clock-names = "bi_tcxo", 270804a3605bSJonathan Marek "gcc_gpu_gpll0_clk_src", 270904a3605bSJonathan Marek "gcc_gpu_gpll0_div_clk_src"; 271004a3605bSJonathan Marek #clock-cells = <1>; 271104a3605bSJonathan Marek #reset-cells = <1>; 271204a3605bSJonathan Marek #power-domain-cells = <1>; 271304a3605bSJonathan Marek }; 271404a3605bSJonathan Marek 271504a3605bSJonathan Marek adreno_smmu: iommu@3da0000 { 27168347b12eSKonrad Dybcio compatible = "qcom,sm8250-smmu-500", "qcom,adreno-smmu", 27178347b12eSKonrad Dybcio "qcom,smmu-500", "arm,mmu-500"; 271804a3605bSJonathan Marek reg = <0 0x03da0000 0 0x10000>; 271904a3605bSJonathan Marek #iommu-cells = <2>; 272004a3605bSJonathan Marek #global-interrupts = <2>; 272104a3605bSJonathan Marek interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, 272204a3605bSJonathan Marek <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, 272304a3605bSJonathan Marek <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>, 272404a3605bSJonathan Marek <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>, 272504a3605bSJonathan Marek <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, 272604a3605bSJonathan Marek <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, 272704a3605bSJonathan Marek <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, 272804a3605bSJonathan Marek <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, 272904a3605bSJonathan Marek <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, 273004a3605bSJonathan Marek <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>; 27310e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 273204a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>, 273304a3605bSJonathan Marek <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>; 273404a3605bSJonathan Marek clock-names = "ahb", "bus", "iface"; 273504a3605bSJonathan Marek 27360e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>; 27374cb19bd7SKonrad Dybcio dma-coherent; 273804a3605bSJonathan Marek }; 273904a3605bSJonathan Marek 274023a89037SBjorn Andersson slpi: remoteproc@5c00000 { 274123a89037SBjorn Andersson compatible = "qcom,sm8250-slpi-pas"; 274223a89037SBjorn Andersson reg = <0 0x05c00000 0 0x4000>; 274323a89037SBjorn Andersson 274423a89037SBjorn Andersson interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 274523a89037SBjorn Andersson <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 274623a89037SBjorn Andersson <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 274723a89037SBjorn Andersson <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 274823a89037SBjorn Andersson <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 274923a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 275023a89037SBjorn Andersson "handover", "stop-ack"; 275123a89037SBjorn Andersson 275223a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 275323a89037SBjorn Andersson clock-names = "xo"; 275423a89037SBjorn Andersson 275534e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_LCX>, 275634e2fd6aSRohit Agarwal <&rpmhpd RPMHPD_LMX>; 2757b74ee2d7SSibi Sankar power-domain-names = "lcx", "lmx"; 275823a89037SBjorn Andersson 275923a89037SBjorn Andersson memory-region = <&slpi_mem>; 276023a89037SBjorn Andersson 2761b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 2762b74ee2d7SSibi Sankar 276323a89037SBjorn Andersson qcom,smem-states = <&smp2p_slpi_out 0>; 276423a89037SBjorn Andersson qcom,smem-state-names = "stop"; 276523a89037SBjorn Andersson 276623a89037SBjorn Andersson status = "disabled"; 276723a89037SBjorn Andersson 276823a89037SBjorn Andersson glink-edge { 276923a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 277023a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 277123a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 277223a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 277323a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 277423a89037SBjorn Andersson 277525695808SJonathan Marek label = "slpi"; 277623a89037SBjorn Andersson qcom,remote-pid = <3>; 277725695808SJonathan Marek 277825695808SJonathan Marek fastrpc { 277925695808SJonathan Marek compatible = "qcom,fastrpc"; 278025695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 278125695808SJonathan Marek label = "sdsp"; 27828c8ce95bSJeya R qcom,non-secure-domain; 278325695808SJonathan Marek #address-cells = <1>; 278425695808SJonathan Marek #size-cells = <0>; 278525695808SJonathan Marek 278625695808SJonathan Marek compute-cb@1 { 278725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 278825695808SJonathan Marek reg = <1>; 278925695808SJonathan Marek iommus = <&apps_smmu 0x0541 0x0>; 279025695808SJonathan Marek }; 279125695808SJonathan Marek 279225695808SJonathan Marek compute-cb@2 { 279325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 279425695808SJonathan Marek reg = <2>; 279525695808SJonathan Marek iommus = <&apps_smmu 0x0542 0x0>; 279625695808SJonathan Marek }; 279725695808SJonathan Marek 279825695808SJonathan Marek compute-cb@3 { 279925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 280025695808SJonathan Marek reg = <3>; 280125695808SJonathan Marek iommus = <&apps_smmu 0x0543 0x0>; 280225695808SJonathan Marek /* note: shared-cb = <4> in downstream */ 280325695808SJonathan Marek }; 280425695808SJonathan Marek }; 280523a89037SBjorn Andersson }; 280623a89037SBjorn Andersson }; 280723a89037SBjorn Andersson 28087960de64SMao Jinlong stm@6002000 { 28097960de64SMao Jinlong compatible = "arm,coresight-stm", "arm,primecell"; 28107960de64SMao Jinlong reg = <0 0x06002000 0 0x1000>, <0 0x16280000 0 0x180000>; 28117960de64SMao Jinlong reg-names = "stm-base", "stm-stimulus-base"; 28127960de64SMao Jinlong 28137960de64SMao Jinlong clocks = <&aoss_qmp>; 28147960de64SMao Jinlong clock-names = "apb_pclk"; 28157960de64SMao Jinlong 28167960de64SMao Jinlong out-ports { 28177960de64SMao Jinlong port { 28187960de64SMao Jinlong stm_out: endpoint { 28197960de64SMao Jinlong remote-endpoint = <&funnel0_in7>; 28207960de64SMao Jinlong }; 28217960de64SMao Jinlong }; 28227960de64SMao Jinlong }; 28237960de64SMao Jinlong }; 28247960de64SMao Jinlong 2825fb1fe154SMao Jinlong tpda@6004000 { 2826fb1fe154SMao Jinlong compatible = "qcom,coresight-tpda", "arm,primecell"; 2827fb1fe154SMao Jinlong reg = <0 0x06004000 0 0x1000>; 2828fb1fe154SMao Jinlong 2829fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 2830fb1fe154SMao Jinlong clock-names = "apb_pclk"; 2831fb1fe154SMao Jinlong 2832fb1fe154SMao Jinlong out-ports { 2833fb1fe154SMao Jinlong 2834*cdb7f0e9SMao Jinlong port { 2835fb1fe154SMao Jinlong tpda_out_funnel_qatb: endpoint { 2836fb1fe154SMao Jinlong remote-endpoint = <&funnel_qatb_in_tpda>; 2837fb1fe154SMao Jinlong }; 2838fb1fe154SMao Jinlong }; 2839fb1fe154SMao Jinlong }; 2840fb1fe154SMao Jinlong 2841fb1fe154SMao Jinlong in-ports { 2842fb1fe154SMao Jinlong #address-cells = <1>; 2843fb1fe154SMao Jinlong #size-cells = <0>; 2844fb1fe154SMao Jinlong 2845fb1fe154SMao Jinlong port@9 { 2846fb1fe154SMao Jinlong reg = <9>; 2847fb1fe154SMao Jinlong tpda_9_in_tpdm_mm: endpoint { 2848fb1fe154SMao Jinlong remote-endpoint = <&tpdm_mm_out_tpda9>; 2849fb1fe154SMao Jinlong }; 2850fb1fe154SMao Jinlong }; 2851fb1fe154SMao Jinlong 2852fb1fe154SMao Jinlong port@17 { 2853fb1fe154SMao Jinlong reg = <23>; 2854fb1fe154SMao Jinlong tpda_23_in_tpdm_prng: endpoint { 2855fb1fe154SMao Jinlong remote-endpoint = <&tpdm_prng_out_tpda_23>; 2856fb1fe154SMao Jinlong }; 2857fb1fe154SMao Jinlong }; 2858fb1fe154SMao Jinlong }; 2859fb1fe154SMao Jinlong }; 2860fb1fe154SMao Jinlong 2861fb1fe154SMao Jinlong funnel@6005000 { 2862fb1fe154SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 2863fb1fe154SMao Jinlong reg = <0 0x06005000 0 0x1000>; 2864fb1fe154SMao Jinlong 2865fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 2866fb1fe154SMao Jinlong clock-names = "apb_pclk"; 2867fb1fe154SMao Jinlong 2868fb1fe154SMao Jinlong out-ports { 2869fb1fe154SMao Jinlong port { 2870fb1fe154SMao Jinlong funnel_qatb_out_funnel_in0: endpoint { 2871fb1fe154SMao Jinlong remote-endpoint = <&funnel_in0_in_funnel_qatb>; 2872fb1fe154SMao Jinlong }; 2873fb1fe154SMao Jinlong }; 2874fb1fe154SMao Jinlong }; 2875fb1fe154SMao Jinlong 2876fb1fe154SMao Jinlong in-ports { 2877*cdb7f0e9SMao Jinlong port { 2878fb1fe154SMao Jinlong funnel_qatb_in_tpda: endpoint { 2879fb1fe154SMao Jinlong remote-endpoint = <&tpda_out_funnel_qatb>; 2880fb1fe154SMao Jinlong }; 2881fb1fe154SMao Jinlong }; 2882fb1fe154SMao Jinlong }; 2883fb1fe154SMao Jinlong }; 2884fb1fe154SMao Jinlong 28857960de64SMao Jinlong funnel@6041000 { 28867960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 28877960de64SMao Jinlong reg = <0 0x06041000 0 0x1000>; 28887960de64SMao Jinlong 28897960de64SMao Jinlong clocks = <&aoss_qmp>; 28907960de64SMao Jinlong clock-names = "apb_pclk"; 28917960de64SMao Jinlong 28927960de64SMao Jinlong out-ports { 28937960de64SMao Jinlong port { 28947960de64SMao Jinlong funnel_in0_out_funnel_merg: endpoint { 28957960de64SMao Jinlong remote-endpoint = <&funnel_merg_in_funnel_in0>; 28967960de64SMao Jinlong }; 28977960de64SMao Jinlong }; 28987960de64SMao Jinlong }; 28997960de64SMao Jinlong 29007960de64SMao Jinlong in-ports { 29017960de64SMao Jinlong #address-cells = <1>; 29027960de64SMao Jinlong #size-cells = <0>; 29037960de64SMao Jinlong 2904fb1fe154SMao Jinlong port@6 { 2905fb1fe154SMao Jinlong reg = <6>; 2906fb1fe154SMao Jinlong funnel_in0_in_funnel_qatb: endpoint { 2907fb1fe154SMao Jinlong remote-endpoint = <&funnel_qatb_out_funnel_in0>; 2908fb1fe154SMao Jinlong }; 2909fb1fe154SMao Jinlong }; 2910fb1fe154SMao Jinlong 29117960de64SMao Jinlong port@7 { 29127960de64SMao Jinlong reg = <7>; 29137960de64SMao Jinlong funnel0_in7: endpoint { 29147960de64SMao Jinlong remote-endpoint = <&stm_out>; 29157960de64SMao Jinlong }; 29167960de64SMao Jinlong }; 29177960de64SMao Jinlong }; 29187960de64SMao Jinlong }; 29197960de64SMao Jinlong 29207960de64SMao Jinlong funnel@6042000 { 29217960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 29227960de64SMao Jinlong reg = <0 0x06042000 0 0x1000>; 29237960de64SMao Jinlong 29247960de64SMao Jinlong clocks = <&aoss_qmp>; 29257960de64SMao Jinlong clock-names = "apb_pclk"; 29267960de64SMao Jinlong 29277960de64SMao Jinlong out-ports { 2928d24539a6SKrzysztof Kozlowski port { 29297960de64SMao Jinlong funnel_in1_out_funnel_merg: endpoint { 29307960de64SMao Jinlong remote-endpoint = <&funnel_merg_in_funnel_in1>; 29317960de64SMao Jinlong }; 29327960de64SMao Jinlong }; 29337960de64SMao Jinlong }; 29347960de64SMao Jinlong 29357960de64SMao Jinlong in-ports { 29367960de64SMao Jinlong #address-cells = <1>; 29377960de64SMao Jinlong #size-cells = <0>; 29387960de64SMao Jinlong 29397960de64SMao Jinlong port@4 { 29407960de64SMao Jinlong reg = <4>; 29417960de64SMao Jinlong funnel_in1_in_funnel_apss_merg: endpoint { 29427960de64SMao Jinlong remote-endpoint = <&funnel_apss_merg_out_funnel_in1>; 29437960de64SMao Jinlong }; 29447960de64SMao Jinlong }; 29457960de64SMao Jinlong }; 29467960de64SMao Jinlong }; 29477960de64SMao Jinlong 29487960de64SMao Jinlong funnel@6045000 { 29497960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 29507960de64SMao Jinlong reg = <0 0x06045000 0 0x1000>; 29517960de64SMao Jinlong 29527960de64SMao Jinlong clocks = <&aoss_qmp>; 29537960de64SMao Jinlong clock-names = "apb_pclk"; 29547960de64SMao Jinlong 29557960de64SMao Jinlong out-ports { 29567960de64SMao Jinlong port { 29577960de64SMao Jinlong funnel_merg_out_funnel_swao: endpoint { 29587960de64SMao Jinlong remote-endpoint = <&funnel_swao_in_funnel_merg>; 29597960de64SMao Jinlong }; 29607960de64SMao Jinlong }; 29617960de64SMao Jinlong }; 29627960de64SMao Jinlong 29637960de64SMao Jinlong in-ports { 29647960de64SMao Jinlong #address-cells = <1>; 29657960de64SMao Jinlong #size-cells = <0>; 29667960de64SMao Jinlong 29677960de64SMao Jinlong port@0 { 29687960de64SMao Jinlong reg = <0>; 29697960de64SMao Jinlong funnel_merg_in_funnel_in0: endpoint { 29707960de64SMao Jinlong remote-endpoint = <&funnel_in0_out_funnel_merg>; 29717960de64SMao Jinlong }; 29727960de64SMao Jinlong }; 29737960de64SMao Jinlong 29747960de64SMao Jinlong port@1 { 29757960de64SMao Jinlong reg = <1>; 29767960de64SMao Jinlong funnel_merg_in_funnel_in1: endpoint { 29777960de64SMao Jinlong remote-endpoint = <&funnel_in1_out_funnel_merg>; 29787960de64SMao Jinlong }; 29797960de64SMao Jinlong }; 29807960de64SMao Jinlong }; 29817960de64SMao Jinlong }; 29827960de64SMao Jinlong 29837960de64SMao Jinlong replicator@6046000 { 29847960de64SMao Jinlong compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; 29857960de64SMao Jinlong reg = <0 0x06046000 0 0x1000>; 29867960de64SMao Jinlong 29877960de64SMao Jinlong clocks = <&aoss_qmp>; 29887960de64SMao Jinlong clock-names = "apb_pclk"; 29897960de64SMao Jinlong 29907960de64SMao Jinlong out-ports { 29917960de64SMao Jinlong port { 29927960de64SMao Jinlong replicator_out: endpoint { 29937960de64SMao Jinlong remote-endpoint = <&etr_in>; 29947960de64SMao Jinlong }; 29957960de64SMao Jinlong }; 29967960de64SMao Jinlong }; 29977960de64SMao Jinlong 29987960de64SMao Jinlong in-ports { 29997960de64SMao Jinlong port { 30007960de64SMao Jinlong replicator_cx_in_swao_out: endpoint { 30017960de64SMao Jinlong remote-endpoint = <&replicator_swao_out_cx_in>; 30027960de64SMao Jinlong }; 30037960de64SMao Jinlong }; 30047960de64SMao Jinlong }; 30057960de64SMao Jinlong }; 30067960de64SMao Jinlong 30077960de64SMao Jinlong etr@6048000 { 30087960de64SMao Jinlong compatible = "arm,coresight-tmc", "arm,primecell"; 30097960de64SMao Jinlong reg = <0 0x06048000 0 0x1000>; 30107960de64SMao Jinlong 30117960de64SMao Jinlong clocks = <&aoss_qmp>; 30127960de64SMao Jinlong clock-names = "apb_pclk"; 30137960de64SMao Jinlong arm,scatter-gather; 30147960de64SMao Jinlong 30157960de64SMao Jinlong in-ports { 30167960de64SMao Jinlong port { 30177960de64SMao Jinlong etr_in: endpoint { 30187960de64SMao Jinlong remote-endpoint = <&replicator_out>; 30197960de64SMao Jinlong }; 30207960de64SMao Jinlong }; 30217960de64SMao Jinlong }; 30227960de64SMao Jinlong }; 30237960de64SMao Jinlong 3024fb1fe154SMao Jinlong tpdm@684c000 { 3025fb1fe154SMao Jinlong compatible = "qcom,coresight-tpdm", "arm,primecell"; 3026fb1fe154SMao Jinlong reg = <0 0x0684c000 0 0x1000>; 3027fb1fe154SMao Jinlong 3028fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 3029fb1fe154SMao Jinlong clock-names = "apb_pclk"; 3030fb1fe154SMao Jinlong 3031fb1fe154SMao Jinlong out-ports { 3032fb1fe154SMao Jinlong port { 3033fb1fe154SMao Jinlong tpdm_prng_out_tpda_23: endpoint { 3034fb1fe154SMao Jinlong remote-endpoint = <&tpda_23_in_tpdm_prng>; 3035fb1fe154SMao Jinlong }; 3036fb1fe154SMao Jinlong }; 3037fb1fe154SMao Jinlong }; 3038fb1fe154SMao Jinlong }; 3039fb1fe154SMao Jinlong 30407960de64SMao Jinlong funnel@6b04000 { 30417960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 30427960de64SMao Jinlong arm,primecell-periphid = <0x000bb908>; 30437960de64SMao Jinlong 30447960de64SMao Jinlong reg = <0 0x06b04000 0 0x1000>; 30457960de64SMao Jinlong 30467960de64SMao Jinlong clocks = <&aoss_qmp>; 30477960de64SMao Jinlong clock-names = "apb_pclk"; 30487960de64SMao Jinlong 30497960de64SMao Jinlong out-ports { 30507960de64SMao Jinlong port { 30517960de64SMao Jinlong funnel_swao_out_etf: endpoint { 30527960de64SMao Jinlong remote-endpoint = <&etf_in_funnel_swao_out>; 30537960de64SMao Jinlong }; 30547960de64SMao Jinlong }; 30557960de64SMao Jinlong }; 30567960de64SMao Jinlong 30577960de64SMao Jinlong in-ports { 30587960de64SMao Jinlong #address-cells = <1>; 30597960de64SMao Jinlong #size-cells = <0>; 30607960de64SMao Jinlong 30617960de64SMao Jinlong port@7 { 30627960de64SMao Jinlong reg = <7>; 30637960de64SMao Jinlong funnel_swao_in_funnel_merg: endpoint { 30647960de64SMao Jinlong remote-endpoint = <&funnel_merg_out_funnel_swao>; 30657960de64SMao Jinlong }; 30667960de64SMao Jinlong }; 30677960de64SMao Jinlong }; 30687960de64SMao Jinlong }; 30697960de64SMao Jinlong 30707960de64SMao Jinlong etf@6b05000 { 30717960de64SMao Jinlong compatible = "arm,coresight-tmc", "arm,primecell"; 30727960de64SMao Jinlong reg = <0 0x06b05000 0 0x1000>; 30737960de64SMao Jinlong 30747960de64SMao Jinlong clocks = <&aoss_qmp>; 30757960de64SMao Jinlong clock-names = "apb_pclk"; 30767960de64SMao Jinlong 30777960de64SMao Jinlong out-ports { 30787960de64SMao Jinlong port { 30797960de64SMao Jinlong etf_out: endpoint { 30807960de64SMao Jinlong remote-endpoint = <&replicator_in>; 30817960de64SMao Jinlong }; 30827960de64SMao Jinlong }; 30837960de64SMao Jinlong }; 30847960de64SMao Jinlong 30857960de64SMao Jinlong in-ports { 30867960de64SMao Jinlong 3087*cdb7f0e9SMao Jinlong port { 30887960de64SMao Jinlong etf_in_funnel_swao_out: endpoint { 30897960de64SMao Jinlong remote-endpoint = <&funnel_swao_out_etf>; 30907960de64SMao Jinlong }; 30917960de64SMao Jinlong }; 30927960de64SMao Jinlong }; 30937960de64SMao Jinlong }; 30947960de64SMao Jinlong 30957960de64SMao Jinlong replicator@6b06000 { 30967960de64SMao Jinlong compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; 30977960de64SMao Jinlong reg = <0 0x06b06000 0 0x1000>; 30987960de64SMao Jinlong 30997960de64SMao Jinlong clocks = <&aoss_qmp>; 31007960de64SMao Jinlong clock-names = "apb_pclk"; 31017960de64SMao Jinlong 31027960de64SMao Jinlong out-ports { 31037960de64SMao Jinlong port { 31047960de64SMao Jinlong replicator_swao_out_cx_in: endpoint { 31057960de64SMao Jinlong remote-endpoint = <&replicator_cx_in_swao_out>; 31067960de64SMao Jinlong }; 31077960de64SMao Jinlong }; 31087960de64SMao Jinlong }; 31097960de64SMao Jinlong 31107960de64SMao Jinlong in-ports { 31117960de64SMao Jinlong port { 31127960de64SMao Jinlong replicator_in: endpoint { 31137960de64SMao Jinlong remote-endpoint = <&etf_out>; 31147960de64SMao Jinlong }; 31157960de64SMao Jinlong }; 31167960de64SMao Jinlong }; 31177960de64SMao Jinlong }; 31187960de64SMao Jinlong 3119fb1fe154SMao Jinlong tpdm@6c08000 { 3120fb1fe154SMao Jinlong compatible = "qcom,coresight-tpdm", "arm,primecell"; 3121fb1fe154SMao Jinlong reg = <0 0x06c08000 0 0x1000>; 3122fb1fe154SMao Jinlong 3123fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 3124fb1fe154SMao Jinlong clock-names = "apb_pclk"; 3125fb1fe154SMao Jinlong 3126fb1fe154SMao Jinlong out-ports { 3127fb1fe154SMao Jinlong port { 3128fb1fe154SMao Jinlong tpdm_mm_out_funnel_dl_mm: endpoint { 3129fb1fe154SMao Jinlong remote-endpoint = <&funnel_dl_mm_in_tpdm_mm>; 3130fb1fe154SMao Jinlong }; 3131fb1fe154SMao Jinlong }; 3132fb1fe154SMao Jinlong }; 3133fb1fe154SMao Jinlong }; 3134fb1fe154SMao Jinlong 3135fb1fe154SMao Jinlong funnel@6c0b000 { 3136fb1fe154SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 3137fb1fe154SMao Jinlong reg = <0 0x06c0b000 0 0x1000>; 3138fb1fe154SMao Jinlong 3139fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 3140fb1fe154SMao Jinlong clock-names = "apb_pclk"; 3141fb1fe154SMao Jinlong 3142fb1fe154SMao Jinlong out-ports { 3143fb1fe154SMao Jinlong port { 3144fb1fe154SMao Jinlong funnel_dl_mm_out_funnel_dl_center: endpoint { 3145fb1fe154SMao Jinlong remote-endpoint = <&funnel_dl_center_in_funnel_dl_mm>; 3146fb1fe154SMao Jinlong }; 3147fb1fe154SMao Jinlong }; 3148fb1fe154SMao Jinlong }; 3149fb1fe154SMao Jinlong 3150fb1fe154SMao Jinlong in-ports { 3151fb1fe154SMao Jinlong #address-cells = <1>; 3152fb1fe154SMao Jinlong #size-cells = <0>; 3153fb1fe154SMao Jinlong 3154fb1fe154SMao Jinlong port@3 { 3155fb1fe154SMao Jinlong reg = <3>; 3156fb1fe154SMao Jinlong funnel_dl_mm_in_tpdm_mm: endpoint { 3157fb1fe154SMao Jinlong remote-endpoint = <&tpdm_mm_out_funnel_dl_mm>; 3158fb1fe154SMao Jinlong }; 3159fb1fe154SMao Jinlong }; 3160fb1fe154SMao Jinlong }; 3161fb1fe154SMao Jinlong }; 3162fb1fe154SMao Jinlong 3163fb1fe154SMao Jinlong funnel@6c2d000 { 3164fb1fe154SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 3165fb1fe154SMao Jinlong reg = <0 0x06c2d000 0 0x1000>; 3166fb1fe154SMao Jinlong 3167fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 3168fb1fe154SMao Jinlong clock-names = "apb_pclk"; 3169fb1fe154SMao Jinlong 3170fb1fe154SMao Jinlong out-ports { 3171fb1fe154SMao Jinlong port { 3172fb1fe154SMao Jinlong tpdm_mm_out_tpda9: endpoint { 3173fb1fe154SMao Jinlong remote-endpoint = <&tpda_9_in_tpdm_mm>; 3174fb1fe154SMao Jinlong }; 3175fb1fe154SMao Jinlong }; 3176fb1fe154SMao Jinlong }; 3177fb1fe154SMao Jinlong 3178fb1fe154SMao Jinlong in-ports { 3179fb1fe154SMao Jinlong #address-cells = <1>; 3180fb1fe154SMao Jinlong #size-cells = <0>; 3181fb1fe154SMao Jinlong 3182fb1fe154SMao Jinlong port@2 { 3183fb1fe154SMao Jinlong reg = <2>; 3184fb1fe154SMao Jinlong funnel_dl_center_in_funnel_dl_mm: endpoint { 3185fb1fe154SMao Jinlong remote-endpoint = <&funnel_dl_mm_out_funnel_dl_center>; 3186fb1fe154SMao Jinlong }; 3187fb1fe154SMao Jinlong }; 3188fb1fe154SMao Jinlong }; 3189fb1fe154SMao Jinlong }; 3190fb1fe154SMao Jinlong 31917960de64SMao Jinlong etm@7040000 { 31927960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 31937960de64SMao Jinlong reg = <0 0x07040000 0 0x1000>; 31947960de64SMao Jinlong 31957960de64SMao Jinlong cpu = <&CPU0>; 31967960de64SMao Jinlong 31977960de64SMao Jinlong clocks = <&aoss_qmp>; 31987960de64SMao Jinlong clock-names = "apb_pclk"; 31997960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32007960de64SMao Jinlong 32017960de64SMao Jinlong out-ports { 32027960de64SMao Jinlong port { 32037960de64SMao Jinlong etm0_out: endpoint { 32047960de64SMao Jinlong remote-endpoint = <&apss_funnel_in0>; 32057960de64SMao Jinlong }; 32067960de64SMao Jinlong }; 32077960de64SMao Jinlong }; 32087960de64SMao Jinlong }; 32097960de64SMao Jinlong 32107960de64SMao Jinlong etm@7140000 { 32117960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32127960de64SMao Jinlong reg = <0 0x07140000 0 0x1000>; 32137960de64SMao Jinlong 32147960de64SMao Jinlong cpu = <&CPU1>; 32157960de64SMao Jinlong 32167960de64SMao Jinlong clocks = <&aoss_qmp>; 32177960de64SMao Jinlong clock-names = "apb_pclk"; 32187960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32197960de64SMao Jinlong 32207960de64SMao Jinlong out-ports { 32217960de64SMao Jinlong port { 32227960de64SMao Jinlong etm1_out: endpoint { 32237960de64SMao Jinlong remote-endpoint = <&apss_funnel_in1>; 32247960de64SMao Jinlong }; 32257960de64SMao Jinlong }; 32267960de64SMao Jinlong }; 32277960de64SMao Jinlong }; 32287960de64SMao Jinlong 32297960de64SMao Jinlong etm@7240000 { 32307960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32317960de64SMao Jinlong reg = <0 0x07240000 0 0x1000>; 32327960de64SMao Jinlong 32337960de64SMao Jinlong cpu = <&CPU2>; 32347960de64SMao Jinlong 32357960de64SMao Jinlong clocks = <&aoss_qmp>; 32367960de64SMao Jinlong clock-names = "apb_pclk"; 32377960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32387960de64SMao Jinlong 32397960de64SMao Jinlong out-ports { 32407960de64SMao Jinlong port { 32417960de64SMao Jinlong etm2_out: endpoint { 32427960de64SMao Jinlong remote-endpoint = <&apss_funnel_in2>; 32437960de64SMao Jinlong }; 32447960de64SMao Jinlong }; 32457960de64SMao Jinlong }; 32467960de64SMao Jinlong }; 32477960de64SMao Jinlong 32487960de64SMao Jinlong etm@7340000 { 32497960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32507960de64SMao Jinlong reg = <0 0x07340000 0 0x1000>; 32517960de64SMao Jinlong 32527960de64SMao Jinlong cpu = <&CPU3>; 32537960de64SMao Jinlong 32547960de64SMao Jinlong clocks = <&aoss_qmp>; 32557960de64SMao Jinlong clock-names = "apb_pclk"; 32567960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32577960de64SMao Jinlong 32587960de64SMao Jinlong out-ports { 32597960de64SMao Jinlong port { 32607960de64SMao Jinlong etm3_out: endpoint { 32617960de64SMao Jinlong remote-endpoint = <&apss_funnel_in3>; 32627960de64SMao Jinlong }; 32637960de64SMao Jinlong }; 32647960de64SMao Jinlong }; 32657960de64SMao Jinlong }; 32667960de64SMao Jinlong 32677960de64SMao Jinlong etm@7440000 { 32687960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32697960de64SMao Jinlong reg = <0 0x07440000 0 0x1000>; 32707960de64SMao Jinlong 32717960de64SMao Jinlong cpu = <&CPU4>; 32727960de64SMao Jinlong 32737960de64SMao Jinlong clocks = <&aoss_qmp>; 32747960de64SMao Jinlong clock-names = "apb_pclk"; 32757960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32767960de64SMao Jinlong 32777960de64SMao Jinlong out-ports { 32787960de64SMao Jinlong port { 32797960de64SMao Jinlong etm4_out: endpoint { 32807960de64SMao Jinlong remote-endpoint = <&apss_funnel_in4>; 32817960de64SMao Jinlong }; 32827960de64SMao Jinlong }; 32837960de64SMao Jinlong }; 32847960de64SMao Jinlong }; 32857960de64SMao Jinlong 32867960de64SMao Jinlong etm@7540000 { 32877960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32887960de64SMao Jinlong reg = <0 0x07540000 0 0x1000>; 32897960de64SMao Jinlong 32907960de64SMao Jinlong cpu = <&CPU5>; 32917960de64SMao Jinlong 32927960de64SMao Jinlong clocks = <&aoss_qmp>; 32937960de64SMao Jinlong clock-names = "apb_pclk"; 32947960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32957960de64SMao Jinlong 32967960de64SMao Jinlong out-ports { 32977960de64SMao Jinlong port { 32987960de64SMao Jinlong etm5_out: endpoint { 32997960de64SMao Jinlong remote-endpoint = <&apss_funnel_in5>; 33007960de64SMao Jinlong }; 33017960de64SMao Jinlong }; 33027960de64SMao Jinlong }; 33037960de64SMao Jinlong }; 33047960de64SMao Jinlong 33057960de64SMao Jinlong etm@7640000 { 33067960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 33077960de64SMao Jinlong reg = <0 0x07640000 0 0x1000>; 33087960de64SMao Jinlong 33097960de64SMao Jinlong cpu = <&CPU6>; 33107960de64SMao Jinlong 33117960de64SMao Jinlong clocks = <&aoss_qmp>; 33127960de64SMao Jinlong clock-names = "apb_pclk"; 33137960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 33147960de64SMao Jinlong 33157960de64SMao Jinlong out-ports { 33167960de64SMao Jinlong port { 33177960de64SMao Jinlong etm6_out: endpoint { 33187960de64SMao Jinlong remote-endpoint = <&apss_funnel_in6>; 33197960de64SMao Jinlong }; 33207960de64SMao Jinlong }; 33217960de64SMao Jinlong }; 33227960de64SMao Jinlong }; 33237960de64SMao Jinlong 33247960de64SMao Jinlong etm@7740000 { 33257960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 33267960de64SMao Jinlong reg = <0 0x07740000 0 0x1000>; 33277960de64SMao Jinlong 33287960de64SMao Jinlong cpu = <&CPU7>; 33297960de64SMao Jinlong 33307960de64SMao Jinlong clocks = <&aoss_qmp>; 33317960de64SMao Jinlong clock-names = "apb_pclk"; 33327960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 33337960de64SMao Jinlong 33347960de64SMao Jinlong out-ports { 33357960de64SMao Jinlong port { 33367960de64SMao Jinlong etm7_out: endpoint { 33377960de64SMao Jinlong remote-endpoint = <&apss_funnel_in7>; 33387960de64SMao Jinlong }; 33397960de64SMao Jinlong }; 33407960de64SMao Jinlong }; 33417960de64SMao Jinlong }; 33427960de64SMao Jinlong 33437960de64SMao Jinlong funnel@7800000 { 33447960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 33457960de64SMao Jinlong reg = <0 0x07800000 0 0x1000>; 33467960de64SMao Jinlong 33477960de64SMao Jinlong clocks = <&aoss_qmp>; 33487960de64SMao Jinlong clock-names = "apb_pclk"; 33497960de64SMao Jinlong 33507960de64SMao Jinlong out-ports { 33517960de64SMao Jinlong port { 33527960de64SMao Jinlong funnel_apss_out_funnel_apss_merg: endpoint { 33537960de64SMao Jinlong remote-endpoint = <&funnel_apss_merg_in_funnel_apss>; 33547960de64SMao Jinlong }; 33557960de64SMao Jinlong }; 33567960de64SMao Jinlong }; 33577960de64SMao Jinlong 33587960de64SMao Jinlong in-ports { 33597960de64SMao Jinlong #address-cells = <1>; 33607960de64SMao Jinlong #size-cells = <0>; 33617960de64SMao Jinlong 33627960de64SMao Jinlong port@0 { 33637960de64SMao Jinlong reg = <0>; 33647960de64SMao Jinlong apss_funnel_in0: endpoint { 33657960de64SMao Jinlong remote-endpoint = <&etm0_out>; 33667960de64SMao Jinlong }; 33677960de64SMao Jinlong }; 33687960de64SMao Jinlong 33697960de64SMao Jinlong port@1 { 33707960de64SMao Jinlong reg = <1>; 33717960de64SMao Jinlong apss_funnel_in1: endpoint { 33727960de64SMao Jinlong remote-endpoint = <&etm1_out>; 33737960de64SMao Jinlong }; 33747960de64SMao Jinlong }; 33757960de64SMao Jinlong 33767960de64SMao Jinlong port@2 { 33777960de64SMao Jinlong reg = <2>; 33787960de64SMao Jinlong apss_funnel_in2: endpoint { 33797960de64SMao Jinlong remote-endpoint = <&etm2_out>; 33807960de64SMao Jinlong }; 33817960de64SMao Jinlong }; 33827960de64SMao Jinlong 33837960de64SMao Jinlong port@3 { 33847960de64SMao Jinlong reg = <3>; 33857960de64SMao Jinlong apss_funnel_in3: endpoint { 33867960de64SMao Jinlong remote-endpoint = <&etm3_out>; 33877960de64SMao Jinlong }; 33887960de64SMao Jinlong }; 33897960de64SMao Jinlong 33907960de64SMao Jinlong port@4 { 33917960de64SMao Jinlong reg = <4>; 33927960de64SMao Jinlong apss_funnel_in4: endpoint { 33937960de64SMao Jinlong remote-endpoint = <&etm4_out>; 33947960de64SMao Jinlong }; 33957960de64SMao Jinlong }; 33967960de64SMao Jinlong 33977960de64SMao Jinlong port@5 { 33987960de64SMao Jinlong reg = <5>; 33997960de64SMao Jinlong apss_funnel_in5: endpoint { 34007960de64SMao Jinlong remote-endpoint = <&etm5_out>; 34017960de64SMao Jinlong }; 34027960de64SMao Jinlong }; 34037960de64SMao Jinlong 34047960de64SMao Jinlong port@6 { 34057960de64SMao Jinlong reg = <6>; 34067960de64SMao Jinlong apss_funnel_in6: endpoint { 34077960de64SMao Jinlong remote-endpoint = <&etm6_out>; 34087960de64SMao Jinlong }; 34097960de64SMao Jinlong }; 34107960de64SMao Jinlong 34117960de64SMao Jinlong port@7 { 34127960de64SMao Jinlong reg = <7>; 34137960de64SMao Jinlong apss_funnel_in7: endpoint { 34147960de64SMao Jinlong remote-endpoint = <&etm7_out>; 34157960de64SMao Jinlong }; 34167960de64SMao Jinlong }; 34177960de64SMao Jinlong }; 34187960de64SMao Jinlong }; 34197960de64SMao Jinlong 34207960de64SMao Jinlong funnel@7810000 { 34217960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 34227960de64SMao Jinlong reg = <0 0x07810000 0 0x1000>; 34237960de64SMao Jinlong 34247960de64SMao Jinlong clocks = <&aoss_qmp>; 34257960de64SMao Jinlong clock-names = "apb_pclk"; 34267960de64SMao Jinlong 34277960de64SMao Jinlong out-ports { 34287960de64SMao Jinlong port { 34297960de64SMao Jinlong funnel_apss_merg_out_funnel_in1: endpoint { 34307960de64SMao Jinlong remote-endpoint = <&funnel_in1_in_funnel_apss_merg>; 34317960de64SMao Jinlong }; 34327960de64SMao Jinlong }; 34337960de64SMao Jinlong }; 34347960de64SMao Jinlong 34357960de64SMao Jinlong in-ports { 3436*cdb7f0e9SMao Jinlong port { 34377960de64SMao Jinlong funnel_apss_merg_in_funnel_apss: endpoint { 34387960de64SMao Jinlong remote-endpoint = <&funnel_apss_out_funnel_apss_merg>; 34397960de64SMao Jinlong }; 34407960de64SMao Jinlong }; 34417960de64SMao Jinlong }; 34427960de64SMao Jinlong }; 34437960de64SMao Jinlong 344423a89037SBjorn Andersson cdsp: remoteproc@8300000 { 344523a89037SBjorn Andersson compatible = "qcom,sm8250-cdsp-pas"; 344623a89037SBjorn Andersson reg = <0 0x08300000 0 0x10000>; 344723a89037SBjorn Andersson 344823a89037SBjorn Andersson interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 344923a89037SBjorn Andersson <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 345023a89037SBjorn Andersson <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 345123a89037SBjorn Andersson <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 345223a89037SBjorn Andersson <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 345323a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 345423a89037SBjorn Andersson "handover", "stop-ack"; 345523a89037SBjorn Andersson 345623a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 345723a89037SBjorn Andersson clock-names = "xo"; 345823a89037SBjorn Andersson 345934e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 346023a89037SBjorn Andersson 346123a89037SBjorn Andersson memory-region = <&cdsp_mem>; 346223a89037SBjorn Andersson 3463b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 3464b74ee2d7SSibi Sankar 346523a89037SBjorn Andersson qcom,smem-states = <&smp2p_cdsp_out 0>; 346623a89037SBjorn Andersson qcom,smem-state-names = "stop"; 346723a89037SBjorn Andersson 346823a89037SBjorn Andersson status = "disabled"; 346923a89037SBjorn Andersson 347023a89037SBjorn Andersson glink-edge { 347123a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 347223a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 347323a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 347423a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 347523a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 347623a89037SBjorn Andersson 347725695808SJonathan Marek label = "cdsp"; 347823a89037SBjorn Andersson qcom,remote-pid = <5>; 347925695808SJonathan Marek 348025695808SJonathan Marek fastrpc { 348125695808SJonathan Marek compatible = "qcom,fastrpc"; 348225695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 348325695808SJonathan Marek label = "cdsp"; 34848c8ce95bSJeya R qcom,non-secure-domain; 348525695808SJonathan Marek #address-cells = <1>; 348625695808SJonathan Marek #size-cells = <0>; 348725695808SJonathan Marek 348825695808SJonathan Marek compute-cb@1 { 348925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 349025695808SJonathan Marek reg = <1>; 349125695808SJonathan Marek iommus = <&apps_smmu 0x1001 0x0460>; 349225695808SJonathan Marek }; 349325695808SJonathan Marek 349425695808SJonathan Marek compute-cb@2 { 349525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 349625695808SJonathan Marek reg = <2>; 349725695808SJonathan Marek iommus = <&apps_smmu 0x1002 0x0460>; 349825695808SJonathan Marek }; 349925695808SJonathan Marek 350025695808SJonathan Marek compute-cb@3 { 350125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 350225695808SJonathan Marek reg = <3>; 350325695808SJonathan Marek iommus = <&apps_smmu 0x1003 0x0460>; 350425695808SJonathan Marek }; 350525695808SJonathan Marek 350625695808SJonathan Marek compute-cb@4 { 350725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 350825695808SJonathan Marek reg = <4>; 350925695808SJonathan Marek iommus = <&apps_smmu 0x1004 0x0460>; 351025695808SJonathan Marek }; 351125695808SJonathan Marek 351225695808SJonathan Marek compute-cb@5 { 351325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 351425695808SJonathan Marek reg = <5>; 351525695808SJonathan Marek iommus = <&apps_smmu 0x1005 0x0460>; 351625695808SJonathan Marek }; 351725695808SJonathan Marek 351825695808SJonathan Marek compute-cb@6 { 351925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 352025695808SJonathan Marek reg = <6>; 352125695808SJonathan Marek iommus = <&apps_smmu 0x1006 0x0460>; 352225695808SJonathan Marek }; 352325695808SJonathan Marek 352425695808SJonathan Marek compute-cb@7 { 352525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 352625695808SJonathan Marek reg = <7>; 352725695808SJonathan Marek iommus = <&apps_smmu 0x1007 0x0460>; 352825695808SJonathan Marek }; 352925695808SJonathan Marek 353025695808SJonathan Marek compute-cb@8 { 353125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 353225695808SJonathan Marek reg = <8>; 353325695808SJonathan Marek iommus = <&apps_smmu 0x1008 0x0460>; 353425695808SJonathan Marek }; 353525695808SJonathan Marek 353625695808SJonathan Marek /* note: secure cb9 in downstream */ 353725695808SJonathan Marek }; 353823a89037SBjorn Andersson }; 353923a89037SBjorn Andersson }; 354023a89037SBjorn Andersson 354146a6f297SJonathan Marek usb_1_hsphy: phy@88e3000 { 354246a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 354346a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 354446a6f297SJonathan Marek reg = <0 0x088e3000 0 0x400>; 354546a6f297SJonathan Marek status = "disabled"; 354646a6f297SJonathan Marek #phy-cells = <0>; 354746a6f297SJonathan Marek 354846a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 354946a6f297SJonathan Marek clock-names = "ref"; 355046a6f297SJonathan Marek 355146a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 355246a6f297SJonathan Marek }; 355346a6f297SJonathan Marek 355446a6f297SJonathan Marek usb_2_hsphy: phy@88e4000 { 355546a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 355646a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 355746a6f297SJonathan Marek reg = <0 0x088e4000 0 0x400>; 355846a6f297SJonathan Marek status = "disabled"; 355946a6f297SJonathan Marek #phy-cells = <0>; 356046a6f297SJonathan Marek 356146a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 356246a6f297SJonathan Marek clock-names = "ref"; 356346a6f297SJonathan Marek 356446a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 356546a6f297SJonathan Marek }; 356646a6f297SJonathan Marek 356746a6f297SJonathan Marek usb_1_qmpphy: phy@88e9000 { 35685aa0d1beSDmitry Baryshkov compatible = "qcom,sm8250-qmp-usb3-dp-phy"; 356946a6f297SJonathan Marek reg = <0 0x088e9000 0 0x200>, 35705aa0d1beSDmitry Baryshkov <0 0x088e8000 0 0x40>, 35715aa0d1beSDmitry Baryshkov <0 0x088ea000 0 0x200>; 357246a6f297SJonathan Marek status = "disabled"; 357346a6f297SJonathan Marek #address-cells = <2>; 357446a6f297SJonathan Marek #size-cells = <2>; 357546a6f297SJonathan Marek ranges; 357646a6f297SJonathan Marek 357746a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 357846a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 357946a6f297SJonathan Marek <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 358046a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "com_aux"; 358146a6f297SJonathan Marek 358246a6f297SJonathan Marek resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 358346a6f297SJonathan Marek <&gcc GCC_USB3_PHY_PRIM_BCR>; 358446a6f297SJonathan Marek reset-names = "phy", "common"; 358546a6f297SJonathan Marek 35865aa0d1beSDmitry Baryshkov usb_1_ssphy: usb3-phy@88e9200 { 358746a6f297SJonathan Marek reg = <0 0x088e9200 0 0x200>, 358846a6f297SJonathan Marek <0 0x088e9400 0 0x200>, 358946a6f297SJonathan Marek <0 0x088e9c00 0 0x400>, 359046a6f297SJonathan Marek <0 0x088e9600 0 0x200>, 359146a6f297SJonathan Marek <0 0x088e9800 0 0x200>, 359246a6f297SJonathan Marek <0 0x088e9a00 0 0x100>; 35937178d4ccSJonathan Marek #clock-cells = <0>; 359446a6f297SJonathan Marek #phy-cells = <0>; 359546a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 359646a6f297SJonathan Marek clock-names = "pipe0"; 359746a6f297SJonathan Marek clock-output-names = "usb3_phy_pipe_clk_src"; 359846a6f297SJonathan Marek }; 35995aa0d1beSDmitry Baryshkov 36005aa0d1beSDmitry Baryshkov dp_phy: dp-phy@88ea200 { 36015aa0d1beSDmitry Baryshkov reg = <0 0x088ea200 0 0x200>, 36025aa0d1beSDmitry Baryshkov <0 0x088ea400 0 0x200>, 3603f8d8840cSJohan Hovold <0 0x088eaa00 0 0x200>, 36045aa0d1beSDmitry Baryshkov <0 0x088ea600 0 0x200>, 3605f8d8840cSJohan Hovold <0 0x088ea800 0 0x200>; 36065aa0d1beSDmitry Baryshkov #phy-cells = <0>; 36075aa0d1beSDmitry Baryshkov #clock-cells = <1>; 36085aa0d1beSDmitry Baryshkov }; 360946a6f297SJonathan Marek }; 361046a6f297SJonathan Marek 361146a6f297SJonathan Marek usb_2_qmpphy: phy@88eb000 { 361246a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-uni-phy"; 361346a6f297SJonathan Marek reg = <0 0x088eb000 0 0x200>; 361446a6f297SJonathan Marek status = "disabled"; 361546a6f297SJonathan Marek #address-cells = <2>; 361646a6f297SJonathan Marek #size-cells = <2>; 361746a6f297SJonathan Marek ranges; 361846a6f297SJonathan Marek 361946a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 362046a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 362146a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>, 362246a6f297SJonathan Marek <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 362346a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 362446a6f297SJonathan Marek 362546a6f297SJonathan Marek resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 362646a6f297SJonathan Marek <&gcc GCC_USB3_PHY_SEC_BCR>; 362746a6f297SJonathan Marek reset-names = "phy", "common"; 362846a6f297SJonathan Marek 36291351512fSShawn Guo usb_2_ssphy: phy@88eb200 { 363046a6f297SJonathan Marek reg = <0 0x088eb200 0 0x200>, 363146a6f297SJonathan Marek <0 0x088eb400 0 0x200>, 363246a6f297SJonathan Marek <0 0x088eb800 0 0x800>; 36337178d4ccSJonathan Marek #clock-cells = <0>; 363446a6f297SJonathan Marek #phy-cells = <0>; 363546a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 363646a6f297SJonathan Marek clock-names = "pipe0"; 363746a6f297SJonathan Marek clock-output-names = "usb3_uni_phy_pipe_clk_src"; 363846a6f297SJonathan Marek }; 363946a6f297SJonathan Marek }; 364046a6f297SJonathan Marek 364196bb736fSBhupesh Sharma sdhc_2: mmc@8804000 { 3642c4cf0300SManivannan Sadhasivam compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 3643c4cf0300SManivannan Sadhasivam reg = <0 0x08804000 0 0x1000>; 3644c4cf0300SManivannan Sadhasivam 3645c4cf0300SManivannan Sadhasivam interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 3646c4cf0300SManivannan Sadhasivam <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 3647c4cf0300SManivannan Sadhasivam interrupt-names = "hc_irq", "pwr_irq"; 3648c4cf0300SManivannan Sadhasivam 3649c4cf0300SManivannan Sadhasivam clocks = <&gcc GCC_SDCC2_AHB_CLK>, 3650c4cf0300SManivannan Sadhasivam <&gcc GCC_SDCC2_APPS_CLK>, 365174097d80SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 3652c4cf0300SManivannan Sadhasivam clock-names = "iface", "core", "xo"; 3653c4cf0300SManivannan Sadhasivam iommus = <&apps_smmu 0x4a0 0x0>; 3654c4cf0300SManivannan Sadhasivam qcom,dll-config = <0x0007642c>; 3655c4cf0300SManivannan Sadhasivam qcom,ddr-config = <0x80040868>; 365634e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_CX>; 3657c4cf0300SManivannan Sadhasivam operating-points-v2 = <&sdhc2_opp_table>; 3658c4cf0300SManivannan Sadhasivam 3659c4cf0300SManivannan Sadhasivam status = "disabled"; 3660c4cf0300SManivannan Sadhasivam 36610e3e6546SKrzysztof Kozlowski sdhc2_opp_table: opp-table { 3662c4cf0300SManivannan Sadhasivam compatible = "operating-points-v2"; 3663c4cf0300SManivannan Sadhasivam 3664c4cf0300SManivannan Sadhasivam opp-19200000 { 3665c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <19200000>; 3666c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_min_svs>; 3667c4cf0300SManivannan Sadhasivam }; 3668c4cf0300SManivannan Sadhasivam 3669c4cf0300SManivannan Sadhasivam opp-50000000 { 3670c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <50000000>; 3671c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_low_svs>; 3672c4cf0300SManivannan Sadhasivam }; 3673c4cf0300SManivannan Sadhasivam 3674c4cf0300SManivannan Sadhasivam opp-100000000 { 3675c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <100000000>; 3676c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs>; 3677c4cf0300SManivannan Sadhasivam }; 3678c4cf0300SManivannan Sadhasivam 3679c4cf0300SManivannan Sadhasivam opp-202000000 { 3680c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <202000000>; 3681c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs_l1>; 3682c4cf0300SManivannan Sadhasivam }; 3683c4cf0300SManivannan Sadhasivam }; 3684c4cf0300SManivannan Sadhasivam }; 3685c4cf0300SManivannan Sadhasivam 36862a2bd124SKonrad Dybcio pmu@9091000 { 36872a2bd124SKonrad Dybcio compatible = "qcom,sm8250-llcc-bwmon", "qcom,sc7280-llcc-bwmon"; 36882a2bd124SKonrad Dybcio reg = <0 0x09091000 0 0x1000>; 36892a2bd124SKonrad Dybcio 36902a2bd124SKonrad Dybcio interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 36912a2bd124SKonrad Dybcio 36922a2bd124SKonrad Dybcio interconnects = <&mc_virt MASTER_LLCC 3 &mc_virt SLAVE_EBI_CH0 3>; 36932a2bd124SKonrad Dybcio 36942a2bd124SKonrad Dybcio operating-points-v2 = <&llcc_bwmon_opp_table>; 36952a2bd124SKonrad Dybcio 36962a2bd124SKonrad Dybcio llcc_bwmon_opp_table: opp-table { 36972a2bd124SKonrad Dybcio compatible = "operating-points-v2"; 36982a2bd124SKonrad Dybcio 36992a2bd124SKonrad Dybcio opp-800000 { 37002a2bd124SKonrad Dybcio opp-peak-kBps = <(200 * 4 * 1000)>; 37012a2bd124SKonrad Dybcio }; 37022a2bd124SKonrad Dybcio 37032a2bd124SKonrad Dybcio opp-1200000 { 37042a2bd124SKonrad Dybcio opp-peak-kBps = <(300 * 4 * 1000)>; 37052a2bd124SKonrad Dybcio }; 37062a2bd124SKonrad Dybcio 37072a2bd124SKonrad Dybcio opp-1804000 { 37082a2bd124SKonrad Dybcio opp-peak-kBps = <(451 * 4 * 1000)>; 37092a2bd124SKonrad Dybcio }; 37102a2bd124SKonrad Dybcio 37112a2bd124SKonrad Dybcio opp-2188000 { 37122a2bd124SKonrad Dybcio opp-peak-kBps = <(547 * 4 * 1000)>; 37132a2bd124SKonrad Dybcio }; 37142a2bd124SKonrad Dybcio 37152a2bd124SKonrad Dybcio opp-2724000 { 37162a2bd124SKonrad Dybcio opp-peak-kBps = <(681 * 4 * 1000)>; 37172a2bd124SKonrad Dybcio }; 37182a2bd124SKonrad Dybcio 37192a2bd124SKonrad Dybcio opp-3072000 { 37202a2bd124SKonrad Dybcio opp-peak-kBps = <(768 * 4 * 1000)>; 37212a2bd124SKonrad Dybcio }; 37222a2bd124SKonrad Dybcio 37232a2bd124SKonrad Dybcio opp-4068000 { 37242a2bd124SKonrad Dybcio opp-peak-kBps = <(1017 * 4 * 1000)>; 37252a2bd124SKonrad Dybcio }; 37262a2bd124SKonrad Dybcio 37272a2bd124SKonrad Dybcio /* 1353 MHz, LPDDR4X */ 37282a2bd124SKonrad Dybcio 37292a2bd124SKonrad Dybcio opp-6220000 { 37302a2bd124SKonrad Dybcio opp-peak-kBps = <(1555 * 4 * 1000)>; 37312a2bd124SKonrad Dybcio }; 37322a2bd124SKonrad Dybcio 37332a2bd124SKonrad Dybcio opp-7216000 { 37342a2bd124SKonrad Dybcio opp-peak-kBps = <(1804 * 4 * 1000)>; 37352a2bd124SKonrad Dybcio }; 37362a2bd124SKonrad Dybcio 37372a2bd124SKonrad Dybcio opp-8368000 { 37382a2bd124SKonrad Dybcio opp-peak-kBps = <(2092 * 4 * 1000)>; 37392a2bd124SKonrad Dybcio }; 37402a2bd124SKonrad Dybcio 37412a2bd124SKonrad Dybcio /* LPDDR5 */ 37422a2bd124SKonrad Dybcio opp-10944000 { 37432a2bd124SKonrad Dybcio opp-peak-kBps = <(2736 * 4 * 1000)>; 37442a2bd124SKonrad Dybcio }; 37452a2bd124SKonrad Dybcio }; 37462a2bd124SKonrad Dybcio }; 37472a2bd124SKonrad Dybcio 37482a2bd124SKonrad Dybcio pmu@90b6400 { 37492a2bd124SKonrad Dybcio compatible = "qcom,sm8250-cpu-bwmon", "qcom,sdm845-bwmon"; 37502a2bd124SKonrad Dybcio reg = <0 0x090b6400 0 0x600>; 37512a2bd124SKonrad Dybcio 37522a2bd124SKonrad Dybcio interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>; 37532a2bd124SKonrad Dybcio 37542a2bd124SKonrad Dybcio interconnects = <&gem_noc MASTER_AMPSS_M0 3 &gem_noc SLAVE_LLCC 3>; 37552a2bd124SKonrad Dybcio operating-points-v2 = <&cpu_bwmon_opp_table>; 37562a2bd124SKonrad Dybcio 37572a2bd124SKonrad Dybcio cpu_bwmon_opp_table: opp-table { 37582a2bd124SKonrad Dybcio compatible = "operating-points-v2"; 37592a2bd124SKonrad Dybcio 37602a2bd124SKonrad Dybcio opp-800000 { 37612a2bd124SKonrad Dybcio opp-peak-kBps = <(200 * 4 * 1000)>; 37622a2bd124SKonrad Dybcio }; 37632a2bd124SKonrad Dybcio 37642a2bd124SKonrad Dybcio opp-1804000 { 37652a2bd124SKonrad Dybcio opp-peak-kBps = <(451 * 4 * 1000)>; 37662a2bd124SKonrad Dybcio }; 37672a2bd124SKonrad Dybcio 37682a2bd124SKonrad Dybcio opp-2188000 { 37692a2bd124SKonrad Dybcio opp-peak-kBps = <(547 * 4 * 1000)>; 37702a2bd124SKonrad Dybcio }; 37712a2bd124SKonrad Dybcio 37722a2bd124SKonrad Dybcio opp-2724000 { 37732a2bd124SKonrad Dybcio opp-peak-kBps = <(681 * 4 * 1000)>; 37742a2bd124SKonrad Dybcio }; 37752a2bd124SKonrad Dybcio 37762a2bd124SKonrad Dybcio opp-3072000 { 37772a2bd124SKonrad Dybcio opp-peak-kBps = <(768 * 4 * 1000)>; 37782a2bd124SKonrad Dybcio }; 37792a2bd124SKonrad Dybcio 37802a2bd124SKonrad Dybcio /* 1017MHz, 1353 MHz, LPDDR4X */ 37812a2bd124SKonrad Dybcio 37822a2bd124SKonrad Dybcio opp-6220000 { 37832a2bd124SKonrad Dybcio opp-peak-kBps = <(1555 * 4 * 1000)>; 37842a2bd124SKonrad Dybcio }; 37852a2bd124SKonrad Dybcio 37862a2bd124SKonrad Dybcio opp-6832000 { 37872a2bd124SKonrad Dybcio opp-peak-kBps = <(1708 * 4 * 1000)>; 37882a2bd124SKonrad Dybcio }; 37892a2bd124SKonrad Dybcio 37902a2bd124SKonrad Dybcio opp-8368000 { 37912a2bd124SKonrad Dybcio opp-peak-kBps = <(2092 * 4 * 1000)>; 37922a2bd124SKonrad Dybcio }; 37932a2bd124SKonrad Dybcio 37942a2bd124SKonrad Dybcio /* 2133MHz, LPDDR4X */ 37952a2bd124SKonrad Dybcio 37962a2bd124SKonrad Dybcio /* LPDDR5 */ 37972a2bd124SKonrad Dybcio opp-10944000 { 37982a2bd124SKonrad Dybcio opp-peak-kBps = <(2736 * 4 * 1000)>; 37992a2bd124SKonrad Dybcio }; 38002a2bd124SKonrad Dybcio 38012a2bd124SKonrad Dybcio /* LPDDR5 */ 38022a2bd124SKonrad Dybcio opp-12784000 { 38032a2bd124SKonrad Dybcio opp-peak-kBps = <(3196 * 4 * 1000)>; 38042a2bd124SKonrad Dybcio }; 38052a2bd124SKonrad Dybcio }; 38062a2bd124SKonrad Dybcio }; 38072a2bd124SKonrad Dybcio 3808e7e41a20SJonathan Marek dc_noc: interconnect@90c0000 { 3809e7e41a20SJonathan Marek compatible = "qcom,sm8250-dc-noc"; 3810e7e41a20SJonathan Marek reg = <0 0x090c0000 0 0x4200>; 3811b5a12438SAbel Vesa #interconnect-cells = <2>; 3812e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 3813e7e41a20SJonathan Marek }; 3814e7e41a20SJonathan Marek 3815e7e41a20SJonathan Marek gem_noc: interconnect@9100000 { 3816e7e41a20SJonathan Marek compatible = "qcom,sm8250-gem-noc"; 3817e7e41a20SJonathan Marek reg = <0 0x09100000 0 0xb4000>; 3818b5a12438SAbel Vesa #interconnect-cells = <2>; 3819e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 3820e7e41a20SJonathan Marek }; 3821e7e41a20SJonathan Marek 3822e7e41a20SJonathan Marek npu_noc: interconnect@9990000 { 3823e7e41a20SJonathan Marek compatible = "qcom,sm8250-npu-noc"; 3824e7e41a20SJonathan Marek reg = <0 0x09990000 0 0x1600>; 3825b5a12438SAbel Vesa #interconnect-cells = <2>; 3826e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 3827e7e41a20SJonathan Marek }; 3828e7e41a20SJonathan Marek 382946a6f297SJonathan Marek usb_1: usb@a6f8800 { 383046a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 383146a6f297SJonathan Marek reg = <0 0x0a6f8800 0 0x400>; 383246a6f297SJonathan Marek status = "disabled"; 383346a6f297SJonathan Marek #address-cells = <2>; 383446a6f297SJonathan Marek #size-cells = <2>; 383546a6f297SJonathan Marek ranges; 383646a6f297SJonathan Marek dma-ranges; 383746a6f297SJonathan Marek 383846a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 383946a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>, 384046a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 384146a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 38428d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 384346a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 38448d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 38458d5fd4e4SKrzysztof Kozlowski "core", 38468d5fd4e4SKrzysztof Kozlowski "iface", 38478d5fd4e4SKrzysztof Kozlowski "sleep", 38488d5fd4e4SKrzysztof Kozlowski "mock_utmi", 38498d5fd4e4SKrzysztof Kozlowski "xo"; 385046a6f297SJonathan Marek 385146a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 385246a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>; 385346a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 385446a6f297SJonathan Marek 385546a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 38565b7e3499SJohan Hovold <&pdc 17 IRQ_TYPE_LEVEL_HIGH>, 385746a6f297SJonathan Marek <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 38585b7e3499SJohan Hovold <&pdc 14 IRQ_TYPE_EDGE_BOTH>; 38595b7e3499SJohan Hovold interrupt-names = "hs_phy_irq", 38605b7e3499SJohan Hovold "ss_phy_irq", 38615b7e3499SJohan Hovold "dm_hs_phy_irq", 38625b7e3499SJohan Hovold "dp_hs_phy_irq"; 386346a6f297SJonathan Marek 386446a6f297SJonathan Marek power-domains = <&gcc USB30_PRIM_GDSC>; 386546a6f297SJonathan Marek 386646a6f297SJonathan Marek resets = <&gcc GCC_USB30_PRIM_BCR>; 386746a6f297SJonathan Marek 3868fd62fd1cSAbel Vesa interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>, 3869fd62fd1cSAbel Vesa <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>; 3870fd62fd1cSAbel Vesa interconnect-names = "usb-ddr", "apps-usb"; 3871fd62fd1cSAbel Vesa 38722aa2b50dSBhupesh Sharma usb_1_dwc3: usb@a600000 { 387346a6f297SJonathan Marek compatible = "snps,dwc3"; 387446a6f297SJonathan Marek reg = <0 0x0a600000 0 0xcd00>; 387546a6f297SJonathan Marek interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 387646a6f297SJonathan Marek iommus = <&apps_smmu 0x0 0x0>; 387746a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 387846a6f297SJonathan Marek snps,dis_enblslpm_quirk; 387946a6f297SJonathan Marek phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 388046a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 388146a6f297SJonathan Marek }; 388246a6f297SJonathan Marek }; 388346a6f297SJonathan Marek 38840085a33aSManivannan Sadhasivam system-cache-controller@9200000 { 38850085a33aSManivannan Sadhasivam compatible = "qcom,sm8250-llcc"; 388642c9b157SManivannan Sadhasivam reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, 388742c9b157SManivannan Sadhasivam <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, 388842c9b157SManivannan Sadhasivam <0 0x09600000 0 0x50000>; 388942c9b157SManivannan Sadhasivam reg-names = "llcc0_base", "llcc1_base", "llcc2_base", 389042c9b157SManivannan Sadhasivam "llcc3_base", "llcc_broadcast_base"; 38910085a33aSManivannan Sadhasivam }; 38920085a33aSManivannan Sadhasivam 389346a6f297SJonathan Marek usb_2: usb@a8f8800 { 389446a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 389546a6f297SJonathan Marek reg = <0 0x0a8f8800 0 0x400>; 389646a6f297SJonathan Marek status = "disabled"; 389746a6f297SJonathan Marek #address-cells = <2>; 389846a6f297SJonathan Marek #size-cells = <2>; 389946a6f297SJonathan Marek ranges; 390046a6f297SJonathan Marek dma-ranges; 390146a6f297SJonathan Marek 390246a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 390346a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>, 390446a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 390546a6f297SJonathan Marek <&gcc GCC_USB30_SEC_SLEEP_CLK>, 39068d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 390746a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 39088d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 39098d5fd4e4SKrzysztof Kozlowski "core", 39108d5fd4e4SKrzysztof Kozlowski "iface", 39118d5fd4e4SKrzysztof Kozlowski "sleep", 39128d5fd4e4SKrzysztof Kozlowski "mock_utmi", 39138d5fd4e4SKrzysztof Kozlowski "xo"; 391446a6f297SJonathan Marek 391546a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 391646a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>; 391746a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 391846a6f297SJonathan Marek 391946a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 39205b7e3499SJohan Hovold <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, 392146a6f297SJonathan Marek <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 39225b7e3499SJohan Hovold <&pdc 12 IRQ_TYPE_EDGE_BOTH>; 39235b7e3499SJohan Hovold interrupt-names = "hs_phy_irq", 39245b7e3499SJohan Hovold "ss_phy_irq", 39255b7e3499SJohan Hovold "dm_hs_phy_irq", 39265b7e3499SJohan Hovold "dp_hs_phy_irq"; 392746a6f297SJonathan Marek 392846a6f297SJonathan Marek power-domains = <&gcc USB30_SEC_GDSC>; 392946a6f297SJonathan Marek 393046a6f297SJonathan Marek resets = <&gcc GCC_USB30_SEC_BCR>; 393146a6f297SJonathan Marek 3932fd62fd1cSAbel Vesa interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>, 3933fd62fd1cSAbel Vesa <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>; 3934fd62fd1cSAbel Vesa interconnect-names = "usb-ddr", "apps-usb"; 3935fd62fd1cSAbel Vesa 39362aa2b50dSBhupesh Sharma usb_2_dwc3: usb@a800000 { 393746a6f297SJonathan Marek compatible = "snps,dwc3"; 393846a6f297SJonathan Marek reg = <0 0x0a800000 0 0xcd00>; 393946a6f297SJonathan Marek interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 394046a6f297SJonathan Marek iommus = <&apps_smmu 0x20 0>; 394146a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 394246a6f297SJonathan Marek snps,dis_enblslpm_quirk; 394346a6f297SJonathan Marek phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 394446a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 394546a6f297SJonathan Marek }; 394646a6f297SJonathan Marek }; 394746a6f297SJonathan Marek 3948fa245b3fSBryan O'Donoghue venus: video-codec@aa00000 { 3949fa245b3fSBryan O'Donoghue compatible = "qcom,sm8250-venus"; 3950fa245b3fSBryan O'Donoghue reg = <0 0x0aa00000 0 0x100000>; 3951fa245b3fSBryan O'Donoghue interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 3952fa245b3fSBryan O'Donoghue power-domains = <&videocc MVS0C_GDSC>, 3953fa245b3fSBryan O'Donoghue <&videocc MVS0_GDSC>, 395434e2fd6aSRohit Agarwal <&rpmhpd RPMHPD_MX>; 3955fa245b3fSBryan O'Donoghue power-domain-names = "venus", "vcodec0", "mx"; 3956fa245b3fSBryan O'Donoghue operating-points-v2 = <&venus_opp_table>; 3957fa245b3fSBryan O'Donoghue 3958fa245b3fSBryan O'Donoghue clocks = <&gcc GCC_VIDEO_AXI0_CLK>, 3959fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0C_CLK>, 3960fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0_CLK>; 3961fa245b3fSBryan O'Donoghue clock-names = "iface", "core", "vcodec0_core"; 3962fa245b3fSBryan O'Donoghue 3963b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_VENUS_CFG 0>, 3964b5a12438SAbel Vesa <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI_CH0 0>; 3965fa245b3fSBryan O'Donoghue interconnect-names = "cpu-cfg", "video-mem"; 3966fa245b3fSBryan O'Donoghue 3967fa245b3fSBryan O'Donoghue iommus = <&apps_smmu 0x2100 0x0400>; 3968fa245b3fSBryan O'Donoghue memory-region = <&video_mem>; 3969fa245b3fSBryan O'Donoghue 3970fa245b3fSBryan O'Donoghue resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, 3971fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0C_CLK_ARES>; 3972fa245b3fSBryan O'Donoghue reset-names = "bus", "core"; 3973fa245b3fSBryan O'Donoghue 3974ece28cb5SKonrad Dybcio status = "disabled"; 3975ece28cb5SKonrad Dybcio 3976fa245b3fSBryan O'Donoghue video-decoder { 3977fa245b3fSBryan O'Donoghue compatible = "venus-decoder"; 3978fa245b3fSBryan O'Donoghue }; 3979fa245b3fSBryan O'Donoghue 3980fa245b3fSBryan O'Donoghue video-encoder { 3981fa245b3fSBryan O'Donoghue compatible = "venus-encoder"; 3982fa245b3fSBryan O'Donoghue }; 3983fa245b3fSBryan O'Donoghue 39840e3e6546SKrzysztof Kozlowski venus_opp_table: opp-table { 3985fa245b3fSBryan O'Donoghue compatible = "operating-points-v2"; 3986fa245b3fSBryan O'Donoghue 3987fa245b3fSBryan O'Donoghue opp-720000000 { 3988fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <720000000>; 3989fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_low_svs>; 3990fa245b3fSBryan O'Donoghue }; 3991fa245b3fSBryan O'Donoghue 3992fa245b3fSBryan O'Donoghue opp-1014000000 { 3993fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1014000000>; 3994fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_svs>; 3995fa245b3fSBryan O'Donoghue }; 3996fa245b3fSBryan O'Donoghue 3997fa245b3fSBryan O'Donoghue opp-1098000000 { 3998fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1098000000>; 3999fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_svs_l1>; 4000fa245b3fSBryan O'Donoghue }; 4001fa245b3fSBryan O'Donoghue 4002fa245b3fSBryan O'Donoghue opp-1332000000 { 4003fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1332000000>; 4004fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_nom>; 4005fa245b3fSBryan O'Donoghue }; 4006fa245b3fSBryan O'Donoghue }; 4007fa245b3fSBryan O'Donoghue }; 4008fa245b3fSBryan O'Donoghue 40095b9ec225Sjonathan@marek.ca videocc: clock-controller@abf0000 { 40105b9ec225Sjonathan@marek.ca compatible = "qcom,sm8250-videocc"; 40115b9ec225Sjonathan@marek.ca reg = <0 0x0abf0000 0 0x10000>; 40125b9ec225Sjonathan@marek.ca clocks = <&gcc GCC_VIDEO_AHB_CLK>, 40135b9ec225Sjonathan@marek.ca <&rpmhcc RPMH_CXO_CLK>, 40145b9ec225Sjonathan@marek.ca <&rpmhcc RPMH_CXO_CLK_A>; 401534e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_MMCX>; 4016266e5cf3SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 40175b9ec225Sjonathan@marek.ca clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; 40185b9ec225Sjonathan@marek.ca #clock-cells = <1>; 40195b9ec225Sjonathan@marek.ca #reset-cells = <1>; 40205b9ec225Sjonathan@marek.ca #power-domain-cells = <1>; 40215b9ec225Sjonathan@marek.ca }; 40225b9ec225Sjonathan@marek.ca 4023e7173009SBryan O'Donoghue cci0: cci@ac4f000 { 4024dd45008bSKonrad Dybcio compatible = "qcom,sm8250-cci", "qcom,msm8996-cci"; 4025e7173009SBryan O'Donoghue #address-cells = <1>; 4026e7173009SBryan O'Donoghue #size-cells = <0>; 4027e7173009SBryan O'Donoghue 4028e7173009SBryan O'Donoghue reg = <0 0x0ac4f000 0 0x1000>; 4029e7173009SBryan O'Donoghue interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>; 4030e7173009SBryan O'Donoghue power-domains = <&camcc TITAN_TOP_GDSC>; 4031e7173009SBryan O'Donoghue 4032e7173009SBryan O'Donoghue clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, 4033e7173009SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 4034e7173009SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 4035e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_0_CLK>, 4036e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_0_CLK_SRC>; 4037e7173009SBryan O'Donoghue clock-names = "camnoc_axi", 4038e7173009SBryan O'Donoghue "slow_ahb_src", 4039e7173009SBryan O'Donoghue "cpas_ahb", 4040e7173009SBryan O'Donoghue "cci", 4041e7173009SBryan O'Donoghue "cci_src"; 4042e7173009SBryan O'Donoghue 4043e7173009SBryan O'Donoghue pinctrl-0 = <&cci0_default>; 4044e7173009SBryan O'Donoghue pinctrl-1 = <&cci0_sleep>; 4045e7173009SBryan O'Donoghue pinctrl-names = "default", "sleep"; 4046e7173009SBryan O'Donoghue 4047e7173009SBryan O'Donoghue status = "disabled"; 4048e7173009SBryan O'Donoghue 4049e7173009SBryan O'Donoghue cci0_i2c0: i2c-bus@0 { 4050e7173009SBryan O'Donoghue reg = <0>; 4051e7173009SBryan O'Donoghue clock-frequency = <1000000>; 4052e7173009SBryan O'Donoghue #address-cells = <1>; 4053e7173009SBryan O'Donoghue #size-cells = <0>; 4054e7173009SBryan O'Donoghue }; 4055e7173009SBryan O'Donoghue 4056e7173009SBryan O'Donoghue cci0_i2c1: i2c-bus@1 { 4057e7173009SBryan O'Donoghue reg = <1>; 4058e7173009SBryan O'Donoghue clock-frequency = <1000000>; 4059e7173009SBryan O'Donoghue #address-cells = <1>; 4060e7173009SBryan O'Donoghue #size-cells = <0>; 4061e7173009SBryan O'Donoghue }; 4062e7173009SBryan O'Donoghue }; 4063e7173009SBryan O'Donoghue 4064e7173009SBryan O'Donoghue cci1: cci@ac50000 { 4065dd45008bSKonrad Dybcio compatible = "qcom,sm8250-cci", "qcom,msm8996-cci"; 4066e7173009SBryan O'Donoghue #address-cells = <1>; 4067e7173009SBryan O'Donoghue #size-cells = <0>; 4068e7173009SBryan O'Donoghue 4069e7173009SBryan O'Donoghue reg = <0 0x0ac50000 0 0x1000>; 4070e7173009SBryan O'Donoghue interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>; 4071e7173009SBryan O'Donoghue power-domains = <&camcc TITAN_TOP_GDSC>; 4072e7173009SBryan O'Donoghue 4073e7173009SBryan O'Donoghue clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, 4074e7173009SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 4075e7173009SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 4076e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_1_CLK>, 4077e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_1_CLK_SRC>; 4078e7173009SBryan O'Donoghue clock-names = "camnoc_axi", 4079e7173009SBryan O'Donoghue "slow_ahb_src", 4080e7173009SBryan O'Donoghue "cpas_ahb", 4081e7173009SBryan O'Donoghue "cci", 4082e7173009SBryan O'Donoghue "cci_src"; 4083e7173009SBryan O'Donoghue 4084e7173009SBryan O'Donoghue pinctrl-0 = <&cci1_default>; 4085e7173009SBryan O'Donoghue pinctrl-1 = <&cci1_sleep>; 4086e7173009SBryan O'Donoghue pinctrl-names = "default", "sleep"; 4087e7173009SBryan O'Donoghue 4088e7173009SBryan O'Donoghue status = "disabled"; 4089e7173009SBryan O'Donoghue 4090e7173009SBryan O'Donoghue cci1_i2c0: i2c-bus@0 { 4091e7173009SBryan O'Donoghue reg = <0>; 4092e7173009SBryan O'Donoghue clock-frequency = <1000000>; 4093e7173009SBryan O'Donoghue #address-cells = <1>; 4094e7173009SBryan O'Donoghue #size-cells = <0>; 4095e7173009SBryan O'Donoghue }; 4096e7173009SBryan O'Donoghue 4097e7173009SBryan O'Donoghue cci1_i2c1: i2c-bus@1 { 4098e7173009SBryan O'Donoghue reg = <1>; 4099e7173009SBryan O'Donoghue clock-frequency = <1000000>; 4100e7173009SBryan O'Donoghue #address-cells = <1>; 4101e7173009SBryan O'Donoghue #size-cells = <0>; 4102e7173009SBryan O'Donoghue }; 4103e7173009SBryan O'Donoghue }; 4104e7173009SBryan O'Donoghue 410530325603SBryan O'Donoghue camss: camss@ac6a000 { 410630325603SBryan O'Donoghue compatible = "qcom,sm8250-camss"; 410730325603SBryan O'Donoghue status = "disabled"; 410830325603SBryan O'Donoghue 410981f43efcSKonrad Dybcio reg = <0 0x0ac6a000 0 0x2000>, 411081f43efcSKonrad Dybcio <0 0x0ac6c000 0 0x2000>, 411181f43efcSKonrad Dybcio <0 0x0ac6e000 0 0x1000>, 411281f43efcSKonrad Dybcio <0 0x0ac70000 0 0x1000>, 411381f43efcSKonrad Dybcio <0 0x0ac72000 0 0x1000>, 411481f43efcSKonrad Dybcio <0 0x0ac74000 0 0x1000>, 411581f43efcSKonrad Dybcio <0 0x0acb4000 0 0xd000>, 411681f43efcSKonrad Dybcio <0 0x0acc3000 0 0xd000>, 411781f43efcSKonrad Dybcio <0 0x0acd9000 0 0x2200>, 411881f43efcSKonrad Dybcio <0 0x0acdb200 0 0x2200>; 411930325603SBryan O'Donoghue reg-names = "csiphy0", 412030325603SBryan O'Donoghue "csiphy1", 412130325603SBryan O'Donoghue "csiphy2", 412230325603SBryan O'Donoghue "csiphy3", 412330325603SBryan O'Donoghue "csiphy4", 412430325603SBryan O'Donoghue "csiphy5", 412530325603SBryan O'Donoghue "vfe0", 412630325603SBryan O'Donoghue "vfe1", 412730325603SBryan O'Donoghue "vfe_lite0", 412830325603SBryan O'Donoghue "vfe_lite1"; 412930325603SBryan O'Donoghue 413030325603SBryan O'Donoghue interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, 413130325603SBryan O'Donoghue <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, 413230325603SBryan O'Donoghue <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>, 413330325603SBryan O'Donoghue <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 413430325603SBryan O'Donoghue <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 413530325603SBryan O'Donoghue <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 413630325603SBryan O'Donoghue <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, 413730325603SBryan O'Donoghue <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, 413830325603SBryan O'Donoghue <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, 413930325603SBryan O'Donoghue <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, 414030325603SBryan O'Donoghue <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, 414130325603SBryan O'Donoghue <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, 414230325603SBryan O'Donoghue <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, 414330325603SBryan O'Donoghue <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 414430325603SBryan O'Donoghue interrupt-names = "csiphy0", 414530325603SBryan O'Donoghue "csiphy1", 414630325603SBryan O'Donoghue "csiphy2", 414730325603SBryan O'Donoghue "csiphy3", 414830325603SBryan O'Donoghue "csiphy4", 414930325603SBryan O'Donoghue "csiphy5", 415030325603SBryan O'Donoghue "csid0", 415130325603SBryan O'Donoghue "csid1", 415230325603SBryan O'Donoghue "csid2", 415330325603SBryan O'Donoghue "csid3", 415430325603SBryan O'Donoghue "vfe0", 415530325603SBryan O'Donoghue "vfe1", 415630325603SBryan O'Donoghue "vfe_lite0", 415730325603SBryan O'Donoghue "vfe_lite1"; 415830325603SBryan O'Donoghue 415930325603SBryan O'Donoghue power-domains = <&camcc IFE_0_GDSC>, 416030325603SBryan O'Donoghue <&camcc IFE_1_GDSC>, 416130325603SBryan O'Donoghue <&camcc TITAN_TOP_GDSC>; 416230325603SBryan O'Donoghue 416330325603SBryan O'Donoghue clocks = <&gcc GCC_CAMERA_AHB_CLK>, 416430325603SBryan O'Donoghue <&gcc GCC_CAMERA_HF_AXI_CLK>, 416530325603SBryan O'Donoghue <&gcc GCC_CAMERA_SF_AXI_CLK>, 416630325603SBryan O'Donoghue <&camcc CAM_CC_CAMNOC_AXI_CLK>, 416730325603SBryan O'Donoghue <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, 416830325603SBryan O'Donoghue <&camcc CAM_CC_CORE_AHB_CLK>, 416930325603SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 417030325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY0_CLK>, 417130325603SBryan O'Donoghue <&camcc CAM_CC_CSI0PHYTIMER_CLK>, 417230325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY1_CLK>, 417330325603SBryan O'Donoghue <&camcc CAM_CC_CSI1PHYTIMER_CLK>, 417430325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY2_CLK>, 417530325603SBryan O'Donoghue <&camcc CAM_CC_CSI2PHYTIMER_CLK>, 417630325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY3_CLK>, 417730325603SBryan O'Donoghue <&camcc CAM_CC_CSI3PHYTIMER_CLK>, 417830325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY4_CLK>, 417930325603SBryan O'Donoghue <&camcc CAM_CC_CSI4PHYTIMER_CLK>, 418030325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY5_CLK>, 418130325603SBryan O'Donoghue <&camcc CAM_CC_CSI5PHYTIMER_CLK>, 418230325603SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 418330325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AHB_CLK>, 418430325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AXI_CLK>, 418530325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CLK>, 418630325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, 418730325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CSID_CLK>, 418830325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AREG_CLK>, 418930325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AHB_CLK>, 419030325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AXI_CLK>, 419130325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CLK>, 419230325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, 419330325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CSID_CLK>, 419430325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AREG_CLK>, 419530325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_AHB_CLK>, 419630325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_AXI_CLK>, 419730325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CLK>, 419830325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, 419930325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CSID_CLK>; 420030325603SBryan O'Donoghue 420130325603SBryan O'Donoghue clock-names = "cam_ahb_clk", 420230325603SBryan O'Donoghue "cam_hf_axi", 420330325603SBryan O'Donoghue "cam_sf_axi", 420430325603SBryan O'Donoghue "camnoc_axi", 420530325603SBryan O'Donoghue "camnoc_axi_src", 420630325603SBryan O'Donoghue "core_ahb", 420730325603SBryan O'Donoghue "cpas_ahb", 420830325603SBryan O'Donoghue "csiphy0", 420930325603SBryan O'Donoghue "csiphy0_timer", 421030325603SBryan O'Donoghue "csiphy1", 421130325603SBryan O'Donoghue "csiphy1_timer", 421230325603SBryan O'Donoghue "csiphy2", 421330325603SBryan O'Donoghue "csiphy2_timer", 421430325603SBryan O'Donoghue "csiphy3", 421530325603SBryan O'Donoghue "csiphy3_timer", 421630325603SBryan O'Donoghue "csiphy4", 421730325603SBryan O'Donoghue "csiphy4_timer", 421830325603SBryan O'Donoghue "csiphy5", 421930325603SBryan O'Donoghue "csiphy5_timer", 422030325603SBryan O'Donoghue "slow_ahb_src", 422130325603SBryan O'Donoghue "vfe0_ahb", 422230325603SBryan O'Donoghue "vfe0_axi", 422330325603SBryan O'Donoghue "vfe0", 422430325603SBryan O'Donoghue "vfe0_cphy_rx", 422530325603SBryan O'Donoghue "vfe0_csid", 422630325603SBryan O'Donoghue "vfe0_areg", 422730325603SBryan O'Donoghue "vfe1_ahb", 422830325603SBryan O'Donoghue "vfe1_axi", 422930325603SBryan O'Donoghue "vfe1", 423030325603SBryan O'Donoghue "vfe1_cphy_rx", 423130325603SBryan O'Donoghue "vfe1_csid", 423230325603SBryan O'Donoghue "vfe1_areg", 423330325603SBryan O'Donoghue "vfe_lite_ahb", 423430325603SBryan O'Donoghue "vfe_lite_axi", 423530325603SBryan O'Donoghue "vfe_lite", 423630325603SBryan O'Donoghue "vfe_lite_cphy_rx", 423730325603SBryan O'Donoghue "vfe_lite_csid"; 423830325603SBryan O'Donoghue 423930325603SBryan O'Donoghue iommus = <&apps_smmu 0x800 0x400>, 424030325603SBryan O'Donoghue <&apps_smmu 0x801 0x400>, 424130325603SBryan O'Donoghue <&apps_smmu 0x840 0x400>, 424230325603SBryan O'Donoghue <&apps_smmu 0x841 0x400>, 424330325603SBryan O'Donoghue <&apps_smmu 0xc00 0x400>, 424430325603SBryan O'Donoghue <&apps_smmu 0xc01 0x400>, 424530325603SBryan O'Donoghue <&apps_smmu 0xc40 0x400>, 424630325603SBryan O'Donoghue <&apps_smmu 0xc41 0x400>; 424730325603SBryan O'Donoghue 4248b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_CAMERA_CFG 0>, 4249b5a12438SAbel Vesa <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI_CH0 0>, 4250b5a12438SAbel Vesa <&mmss_noc MASTER_CAMNOC_SF 0 &mc_virt SLAVE_EBI_CH0 0>, 4251b5a12438SAbel Vesa <&mmss_noc MASTER_CAMNOC_ICP 0 &mc_virt SLAVE_EBI_CH0 0>; 425230325603SBryan O'Donoghue interconnect-names = "cam_ahb", 425330325603SBryan O'Donoghue "cam_hf_0_mnoc", 425430325603SBryan O'Donoghue "cam_sf_0_mnoc", 425530325603SBryan O'Donoghue "cam_sf_icp_mnoc"; 42563c5aa4c7SBryan O'Donoghue 42573c5aa4c7SBryan O'Donoghue ports { 42583c5aa4c7SBryan O'Donoghue #address-cells = <1>; 42593c5aa4c7SBryan O'Donoghue #size-cells = <0>; 42603c5aa4c7SBryan O'Donoghue 42613c5aa4c7SBryan O'Donoghue port@0 { 42623c5aa4c7SBryan O'Donoghue reg = <0>; 42633c5aa4c7SBryan O'Donoghue }; 42643c5aa4c7SBryan O'Donoghue 42653c5aa4c7SBryan O'Donoghue port@1 { 42663c5aa4c7SBryan O'Donoghue reg = <1>; 42673c5aa4c7SBryan O'Donoghue }; 42683c5aa4c7SBryan O'Donoghue 42693c5aa4c7SBryan O'Donoghue port@2 { 42703c5aa4c7SBryan O'Donoghue reg = <2>; 42713c5aa4c7SBryan O'Donoghue }; 42723c5aa4c7SBryan O'Donoghue 42733c5aa4c7SBryan O'Donoghue port@3 { 42743c5aa4c7SBryan O'Donoghue reg = <3>; 42753c5aa4c7SBryan O'Donoghue }; 42763c5aa4c7SBryan O'Donoghue 42773c5aa4c7SBryan O'Donoghue port@4 { 42783c5aa4c7SBryan O'Donoghue reg = <4>; 42793c5aa4c7SBryan O'Donoghue }; 42803c5aa4c7SBryan O'Donoghue 42813c5aa4c7SBryan O'Donoghue port@5 { 42823c5aa4c7SBryan O'Donoghue reg = <5>; 42833c5aa4c7SBryan O'Donoghue }; 42843c5aa4c7SBryan O'Donoghue }; 428530325603SBryan O'Donoghue }; 428630325603SBryan O'Donoghue 4287ca79a997SBryan O'Donoghue camcc: clock-controller@ad00000 { 4288ca79a997SBryan O'Donoghue compatible = "qcom,sm8250-camcc"; 4289ca79a997SBryan O'Donoghue reg = <0 0x0ad00000 0 0x10000>; 4290ca79a997SBryan O'Donoghue clocks = <&gcc GCC_CAMERA_AHB_CLK>, 4291ca79a997SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 4292ca79a997SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK_A>, 4293ca79a997SBryan O'Donoghue <&sleep_clk>; 4294ca79a997SBryan O'Donoghue clock-names = "iface", "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 429534e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_MMCX>; 4296ca79a997SBryan O'Donoghue required-opps = <&rpmhpd_opp_low_svs>; 42971b3bfc40SVladimir Zapolskiy status = "disabled"; 4298ca79a997SBryan O'Donoghue #clock-cells = <1>; 4299ca79a997SBryan O'Donoghue #reset-cells = <1>; 4300ca79a997SBryan O'Donoghue #power-domain-cells = <1>; 4301ca79a997SBryan O'Donoghue }; 4302ca79a997SBryan O'Donoghue 4303ecf0f5ffSDmitry Baryshkov mdss: display-subsystem@ae00000 { 4304dc5d9125SJonathan Marek compatible = "qcom,sm8250-mdss"; 43057c1dffd4SDmitry Baryshkov reg = <0 0x0ae00000 0 0x1000>; 43067c1dffd4SDmitry Baryshkov reg-names = "mdss"; 43077c1dffd4SDmitry Baryshkov 4308b5a12438SAbel Vesa interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>, 4309b5a12438SAbel Vesa <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>; 4310888771a9SJonathan Marek interconnect-names = "mdp0-mem", "mdp1-mem"; 43117c1dffd4SDmitry Baryshkov 43127c1dffd4SDmitry Baryshkov power-domains = <&dispcc MDSS_GDSC>; 43137c1dffd4SDmitry Baryshkov 43147c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 4315e091b836SAmit Pundir <&gcc GCC_DISP_HF_AXI_CLK>, 43167c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_SF_AXI_CLK>, 43177c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>; 4318e091b836SAmit Pundir clock-names = "iface", "bus", "nrt_bus", "core"; 43197c1dffd4SDmitry Baryshkov 43207c1dffd4SDmitry Baryshkov interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 43217c1dffd4SDmitry Baryshkov interrupt-controller; 43227c1dffd4SDmitry Baryshkov #interrupt-cells = <1>; 43237c1dffd4SDmitry Baryshkov 43247c1dffd4SDmitry Baryshkov iommus = <&apps_smmu 0x820 0x402>; 43257c1dffd4SDmitry Baryshkov 43267c1dffd4SDmitry Baryshkov status = "disabled"; 43277c1dffd4SDmitry Baryshkov 43287c1dffd4SDmitry Baryshkov #address-cells = <2>; 43297c1dffd4SDmitry Baryshkov #size-cells = <2>; 43307c1dffd4SDmitry Baryshkov ranges; 43317c1dffd4SDmitry Baryshkov 4332ce5cf986SDmitry Baryshkov mdss_mdp: display-controller@ae01000 { 4333dc5d9125SJonathan Marek compatible = "qcom,sm8250-dpu"; 43347c1dffd4SDmitry Baryshkov reg = <0 0x0ae01000 0 0x8f000>, 43357c1dffd4SDmitry Baryshkov <0 0x0aeb0000 0 0x2008>; 43367c1dffd4SDmitry Baryshkov reg-names = "mdp", "vbif"; 43377c1dffd4SDmitry Baryshkov 43387c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 43397c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 43407c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>, 43417c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 43427c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "core", "vsync"; 43437c1dffd4SDmitry Baryshkov 43446edb3238SVinod Polimera assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 43456edb3238SVinod Polimera assigned-clock-rates = <19200000>; 43467c1dffd4SDmitry Baryshkov 43477c1dffd4SDmitry Baryshkov operating-points-v2 = <&mdp_opp_table>; 434834e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_MMCX>; 43497c1dffd4SDmitry Baryshkov 43507c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 4351be633329SDmitry Baryshkov interrupts = <0>; 43527c1dffd4SDmitry Baryshkov 43537c1dffd4SDmitry Baryshkov ports { 43547c1dffd4SDmitry Baryshkov #address-cells = <1>; 43557c1dffd4SDmitry Baryshkov #size-cells = <0>; 43567c1dffd4SDmitry Baryshkov 43577c1dffd4SDmitry Baryshkov port@0 { 43587c1dffd4SDmitry Baryshkov reg = <0>; 43597c1dffd4SDmitry Baryshkov dpu_intf1_out: endpoint { 4360e47a7f57SDmitry Baryshkov remote-endpoint = <&mdss_dsi0_in>; 43617c1dffd4SDmitry Baryshkov }; 43627c1dffd4SDmitry Baryshkov }; 43637c1dffd4SDmitry Baryshkov 43647c1dffd4SDmitry Baryshkov port@1 { 43657c1dffd4SDmitry Baryshkov reg = <1>; 43667c1dffd4SDmitry Baryshkov dpu_intf2_out: endpoint { 4367e47a7f57SDmitry Baryshkov remote-endpoint = <&mdss_dsi1_in>; 43687c1dffd4SDmitry Baryshkov }; 43697c1dffd4SDmitry Baryshkov }; 43707c1dffd4SDmitry Baryshkov }; 43717c1dffd4SDmitry Baryshkov 43720e3e6546SKrzysztof Kozlowski mdp_opp_table: opp-table { 43737c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 43747c1dffd4SDmitry Baryshkov 43757c1dffd4SDmitry Baryshkov opp-200000000 { 43767c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <200000000>; 43777c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 43787c1dffd4SDmitry Baryshkov }; 43797c1dffd4SDmitry Baryshkov 43807c1dffd4SDmitry Baryshkov opp-300000000 { 43817c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 43827c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 43837c1dffd4SDmitry Baryshkov }; 43847c1dffd4SDmitry Baryshkov 43857c1dffd4SDmitry Baryshkov opp-345000000 { 43867c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <345000000>; 43877c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 43887c1dffd4SDmitry Baryshkov }; 43897c1dffd4SDmitry Baryshkov 43907c1dffd4SDmitry Baryshkov opp-460000000 { 43917c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <460000000>; 43927c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_nom>; 43937c1dffd4SDmitry Baryshkov }; 43947c1dffd4SDmitry Baryshkov }; 43957c1dffd4SDmitry Baryshkov }; 43967c1dffd4SDmitry Baryshkov 4397e47a7f57SDmitry Baryshkov mdss_dsi0: dsi@ae94000 { 4398ff114e39SBryan O'Donoghue compatible = "qcom,sm8250-dsi-ctrl", 4399ff114e39SBryan O'Donoghue "qcom,mdss-dsi-ctrl"; 44007c1dffd4SDmitry Baryshkov reg = <0 0x0ae94000 0 0x400>; 44017c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 44027c1dffd4SDmitry Baryshkov 44037c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 4404be633329SDmitry Baryshkov interrupts = <4>; 44057c1dffd4SDmitry Baryshkov 44067c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 44077c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 44087c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 44097c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC0_CLK>, 44107c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 44117c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 44127c1dffd4SDmitry Baryshkov clock-names = "byte", 44137c1dffd4SDmitry Baryshkov "byte_intf", 44147c1dffd4SDmitry Baryshkov "pixel", 44157c1dffd4SDmitry Baryshkov "core", 44167c1dffd4SDmitry Baryshkov "iface", 44177c1dffd4SDmitry Baryshkov "bus"; 44187c1dffd4SDmitry Baryshkov 441997ec669dSDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; 4420e47a7f57SDmitry Baryshkov assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; 442197ec669dSDmitry Baryshkov 44227c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 442334e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_MMCX>; 44247c1dffd4SDmitry Baryshkov 4425e47a7f57SDmitry Baryshkov phys = <&mdss_dsi0_phy>; 44267c1dffd4SDmitry Baryshkov 44277c1dffd4SDmitry Baryshkov status = "disabled"; 44287c1dffd4SDmitry Baryshkov 442940f7d36dSKonrad Dybcio #address-cells = <1>; 443040f7d36dSKonrad Dybcio #size-cells = <0>; 443140f7d36dSKonrad Dybcio 44327c1dffd4SDmitry Baryshkov ports { 44337c1dffd4SDmitry Baryshkov #address-cells = <1>; 44347c1dffd4SDmitry Baryshkov #size-cells = <0>; 44357c1dffd4SDmitry Baryshkov 44367c1dffd4SDmitry Baryshkov port@0 { 44377c1dffd4SDmitry Baryshkov reg = <0>; 4438e47a7f57SDmitry Baryshkov mdss_dsi0_in: endpoint { 44397c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf1_out>; 44407c1dffd4SDmitry Baryshkov }; 44417c1dffd4SDmitry Baryshkov }; 44427c1dffd4SDmitry Baryshkov 44437c1dffd4SDmitry Baryshkov port@1 { 44447c1dffd4SDmitry Baryshkov reg = <1>; 4445e47a7f57SDmitry Baryshkov mdss_dsi0_out: endpoint { 44467c1dffd4SDmitry Baryshkov }; 44477c1dffd4SDmitry Baryshkov }; 44487c1dffd4SDmitry Baryshkov }; 44499ea5ae62SDmitry Baryshkov 44509ea5ae62SDmitry Baryshkov dsi_opp_table: opp-table { 44519ea5ae62SDmitry Baryshkov compatible = "operating-points-v2"; 44529ea5ae62SDmitry Baryshkov 44539ea5ae62SDmitry Baryshkov opp-187500000 { 44549ea5ae62SDmitry Baryshkov opp-hz = /bits/ 64 <187500000>; 44559ea5ae62SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 44569ea5ae62SDmitry Baryshkov }; 44579ea5ae62SDmitry Baryshkov 44589ea5ae62SDmitry Baryshkov opp-300000000 { 44599ea5ae62SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 44609ea5ae62SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 44619ea5ae62SDmitry Baryshkov }; 44629ea5ae62SDmitry Baryshkov 44639ea5ae62SDmitry Baryshkov opp-358000000 { 44649ea5ae62SDmitry Baryshkov opp-hz = /bits/ 64 <358000000>; 44659ea5ae62SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 44669ea5ae62SDmitry Baryshkov }; 44679ea5ae62SDmitry Baryshkov }; 44687c1dffd4SDmitry Baryshkov }; 44697c1dffd4SDmitry Baryshkov 4470e47a7f57SDmitry Baryshkov mdss_dsi0_phy: phy@ae94400 { 44717c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 44727c1dffd4SDmitry Baryshkov reg = <0 0x0ae94400 0 0x200>, 44737c1dffd4SDmitry Baryshkov <0 0x0ae94600 0 0x280>, 44747c1dffd4SDmitry Baryshkov <0 0x0ae94900 0 0x260>; 44757c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 44767c1dffd4SDmitry Baryshkov "dsi_phy_lane", 44777c1dffd4SDmitry Baryshkov "dsi_pll"; 44787c1dffd4SDmitry Baryshkov 44797c1dffd4SDmitry Baryshkov #clock-cells = <1>; 44807c1dffd4SDmitry Baryshkov #phy-cells = <0>; 44817c1dffd4SDmitry Baryshkov 44827c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 44837c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 44847c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 44857c1dffd4SDmitry Baryshkov 44867c1dffd4SDmitry Baryshkov status = "disabled"; 44877c1dffd4SDmitry Baryshkov }; 44887c1dffd4SDmitry Baryshkov 4489e47a7f57SDmitry Baryshkov mdss_dsi1: dsi@ae96000 { 4490ff114e39SBryan O'Donoghue compatible = "qcom,sm8250-dsi-ctrl", 4491ff114e39SBryan O'Donoghue "qcom,mdss-dsi-ctrl"; 44927c1dffd4SDmitry Baryshkov reg = <0 0x0ae96000 0 0x400>; 44937c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 44947c1dffd4SDmitry Baryshkov 44957c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 4496be633329SDmitry Baryshkov interrupts = <5>; 44977c1dffd4SDmitry Baryshkov 44987c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 44997c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 45007c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 45017c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC1_CLK>, 45027c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 45037c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 45047c1dffd4SDmitry Baryshkov clock-names = "byte", 45057c1dffd4SDmitry Baryshkov "byte_intf", 45067c1dffd4SDmitry Baryshkov "pixel", 45077c1dffd4SDmitry Baryshkov "core", 45087c1dffd4SDmitry Baryshkov "iface", 45097c1dffd4SDmitry Baryshkov "bus"; 45107c1dffd4SDmitry Baryshkov 451197ec669dSDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; 4512e47a7f57SDmitry Baryshkov assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>; 451397ec669dSDmitry Baryshkov 45147c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 451534e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_MMCX>; 45167c1dffd4SDmitry Baryshkov 4517e47a7f57SDmitry Baryshkov phys = <&mdss_dsi1_phy>; 45187c1dffd4SDmitry Baryshkov 45197c1dffd4SDmitry Baryshkov status = "disabled"; 45207c1dffd4SDmitry Baryshkov 452140f7d36dSKonrad Dybcio #address-cells = <1>; 452240f7d36dSKonrad Dybcio #size-cells = <0>; 452340f7d36dSKonrad Dybcio 45247c1dffd4SDmitry Baryshkov ports { 45257c1dffd4SDmitry Baryshkov #address-cells = <1>; 45267c1dffd4SDmitry Baryshkov #size-cells = <0>; 45277c1dffd4SDmitry Baryshkov 45287c1dffd4SDmitry Baryshkov port@0 { 45297c1dffd4SDmitry Baryshkov reg = <0>; 4530e47a7f57SDmitry Baryshkov mdss_dsi1_in: endpoint { 45317c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf2_out>; 45327c1dffd4SDmitry Baryshkov }; 45337c1dffd4SDmitry Baryshkov }; 45347c1dffd4SDmitry Baryshkov 45357c1dffd4SDmitry Baryshkov port@1 { 45367c1dffd4SDmitry Baryshkov reg = <1>; 4537e47a7f57SDmitry Baryshkov mdss_dsi1_out: endpoint { 45387c1dffd4SDmitry Baryshkov }; 45397c1dffd4SDmitry Baryshkov }; 45407c1dffd4SDmitry Baryshkov }; 45417c1dffd4SDmitry Baryshkov }; 45427c1dffd4SDmitry Baryshkov 4543e47a7f57SDmitry Baryshkov mdss_dsi1_phy: phy@ae96400 { 45447c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 45457c1dffd4SDmitry Baryshkov reg = <0 0x0ae96400 0 0x200>, 45467c1dffd4SDmitry Baryshkov <0 0x0ae96600 0 0x280>, 45477c1dffd4SDmitry Baryshkov <0 0x0ae96900 0 0x260>; 45487c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 45497c1dffd4SDmitry Baryshkov "dsi_phy_lane", 45507c1dffd4SDmitry Baryshkov "dsi_pll"; 45517c1dffd4SDmitry Baryshkov 45527c1dffd4SDmitry Baryshkov #clock-cells = <1>; 45537c1dffd4SDmitry Baryshkov #phy-cells = <0>; 45547c1dffd4SDmitry Baryshkov 45557c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 45567c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 45577c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 45587c1dffd4SDmitry Baryshkov 45597c1dffd4SDmitry Baryshkov status = "disabled"; 45607c1dffd4SDmitry Baryshkov }; 45617c1dffd4SDmitry Baryshkov }; 45627c1dffd4SDmitry Baryshkov 45637c1dffd4SDmitry Baryshkov dispcc: clock-controller@af00000 { 45647c1dffd4SDmitry Baryshkov compatible = "qcom,sm8250-dispcc"; 4565888771a9SJonathan Marek reg = <0 0x0af00000 0 0x10000>; 456634e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_MMCX>; 4567266e5cf3SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 45687c1dffd4SDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 4569e47a7f57SDmitry Baryshkov <&mdss_dsi0_phy 0>, 4570e47a7f57SDmitry Baryshkov <&mdss_dsi0_phy 1>, 4571e47a7f57SDmitry Baryshkov <&mdss_dsi1_phy 0>, 4572e47a7f57SDmitry Baryshkov <&mdss_dsi1_phy 1>, 45739b315324SDmitry Baryshkov <&dp_phy 0>, 45749b315324SDmitry Baryshkov <&dp_phy 1>; 45757c1dffd4SDmitry Baryshkov clock-names = "bi_tcxo", 45767c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_byteclk", 45777c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_dsiclk", 45787c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_byteclk", 45797c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_dsiclk", 4580888771a9SJonathan Marek "dp_phy_pll_link_clk", 4581888771a9SJonathan Marek "dp_phy_pll_vco_div_clk"; 45827c1dffd4SDmitry Baryshkov #clock-cells = <1>; 45837c1dffd4SDmitry Baryshkov #reset-cells = <1>; 45847c1dffd4SDmitry Baryshkov #power-domain-cells = <1>; 45857c1dffd4SDmitry Baryshkov }; 45867c1dffd4SDmitry Baryshkov 458760378f1aSVenkata Narendra Kumar Gutta pdc: interrupt-controller@b220000 { 458824003196SBjorn Andersson compatible = "qcom,sm8250-pdc", "qcom,pdc"; 458924003196SBjorn Andersson reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 459060378f1aSVenkata Narendra Kumar Gutta qcom,pdc-ranges = <0 480 94>, <94 609 31>, 459160378f1aSVenkata Narendra Kumar Gutta <125 63 1>, <126 716 12>; 459260378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <2>; 459360378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 459460378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 459560378f1aSVenkata Narendra Kumar Gutta }; 459660378f1aSVenkata Narendra Kumar Gutta 4597bac12f25SAmit Kucheria tsens0: thermal-sensor@c263000 { 4598bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 4599bac12f25SAmit Kucheria reg = <0 0x0c263000 0 0x1ff>, /* TM */ 4600bac12f25SAmit Kucheria <0 0x0c222000 0 0x1ff>; /* SROT */ 4601bac12f25SAmit Kucheria #qcom,sensors = <16>; 4602bac12f25SAmit Kucheria interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 4603bac12f25SAmit Kucheria <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 4604bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 4605bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 4606bac12f25SAmit Kucheria }; 4607bac12f25SAmit Kucheria 4608bac12f25SAmit Kucheria tsens1: thermal-sensor@c265000 { 4609bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 4610bac12f25SAmit Kucheria reg = <0 0x0c265000 0 0x1ff>, /* TM */ 4611bac12f25SAmit Kucheria <0 0x0c223000 0 0x1ff>; /* SROT */ 4612bac12f25SAmit Kucheria #qcom,sensors = <9>; 4613bac12f25SAmit Kucheria interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 4614bac12f25SAmit Kucheria <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 4615bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 4616bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 4617bac12f25SAmit Kucheria }; 4618bac12f25SAmit Kucheria 4619bb99820dSKrzysztof Kozlowski aoss_qmp: power-management@c300000 { 46206ba93ba9SKrzysztof Kozlowski compatible = "qcom,sm8250-aoss-qmp", "qcom,aoss-qmp"; 462147cb6a06SMaulik Shah reg = <0 0x0c300000 0 0x400>; 4622087d537aSBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_AOP 4623087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 4624087d537aSBjorn Andersson IRQ_TYPE_EDGE_RISING>; 4625087d537aSBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_AOP 4626087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 4627087d537aSBjorn Andersson 4628087d537aSBjorn Andersson #clock-cells = <0>; 4629087d537aSBjorn Andersson }; 4630087d537aSBjorn Andersson 463147cb6a06SMaulik Shah sram@c3f0000 { 463247cb6a06SMaulik Shah compatible = "qcom,rpmh-stats"; 463347cb6a06SMaulik Shah reg = <0 0x0c3f0000 0 0x400>; 463460378f1aSVenkata Narendra Kumar Gutta }; 463560378f1aSVenkata Narendra Kumar Gutta 463660378f1aSVenkata Narendra Kumar Gutta spmi_bus: spmi@c440000 { 463760378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,spmi-pmic-arb"; 463860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0c440000 0x0 0x0001100>, 463960378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c600000 0x0 0x2000000>, 464016951b49SBjorn Andersson <0x0 0x0e600000 0x0 0x0100000>, 464116951b49SBjorn Andersson <0x0 0x0e700000 0x0 0x00a0000>, 464216951b49SBjorn Andersson <0x0 0x0c40a000 0x0 0x0026000>; 464316951b49SBjorn Andersson reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 464416951b49SBjorn Andersson interrupt-names = "periph_irq"; 464516951b49SBjorn Andersson interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 464616951b49SBjorn Andersson qcom,ee = <0>; 464716951b49SBjorn Andersson qcom,channel = <0>; 464816951b49SBjorn Andersson #address-cells = <2>; 464916951b49SBjorn Andersson #size-cells = <0>; 465016951b49SBjorn Andersson interrupt-controller; 465116951b49SBjorn Andersson #interrupt-cells = <4>; 465216951b49SBjorn Andersson }; 4653e5813b15SDmitry Baryshkov 4654e5813b15SDmitry Baryshkov tlmm: pinctrl@f100000 { 4655e5813b15SDmitry Baryshkov compatible = "qcom,sm8250-pinctrl"; 4656e5813b15SDmitry Baryshkov reg = <0 0x0f100000 0 0x300000>, 4657e5813b15SDmitry Baryshkov <0 0x0f500000 0 0x300000>, 4658e5813b15SDmitry Baryshkov <0 0x0f900000 0 0x300000>; 4659e5813b15SDmitry Baryshkov reg-names = "west", "south", "north"; 4660e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 4661e5813b15SDmitry Baryshkov gpio-controller; 4662e5813b15SDmitry Baryshkov #gpio-cells = <2>; 4663e5813b15SDmitry Baryshkov interrupt-controller; 4664e5813b15SDmitry Baryshkov #interrupt-cells = <2>; 4665e526cb03SShawn Guo gpio-ranges = <&tlmm 0 0 181>; 466616951b49SBjorn Andersson wakeup-parent = <&pdc>; 4667e5813b15SDmitry Baryshkov 466816b24fe5SBryan O'Donoghue cam2_default: cam2-default-state { 466916b24fe5SBryan O'Donoghue rst-pins { 467016b24fe5SBryan O'Donoghue pins = "gpio78"; 467116b24fe5SBryan O'Donoghue function = "gpio"; 467216b24fe5SBryan O'Donoghue drive-strength = <2>; 467316b24fe5SBryan O'Donoghue bias-disable; 467416b24fe5SBryan O'Donoghue }; 467516b24fe5SBryan O'Donoghue 467616b24fe5SBryan O'Donoghue mclk-pins { 467716b24fe5SBryan O'Donoghue pins = "gpio96"; 467816b24fe5SBryan O'Donoghue function = "cam_mclk"; 467916b24fe5SBryan O'Donoghue drive-strength = <16>; 468016b24fe5SBryan O'Donoghue bias-disable; 468116b24fe5SBryan O'Donoghue }; 468216b24fe5SBryan O'Donoghue }; 468316b24fe5SBryan O'Donoghue 468416b24fe5SBryan O'Donoghue cam2_suspend: cam2-suspend-state { 468516b24fe5SBryan O'Donoghue rst-pins { 468616b24fe5SBryan O'Donoghue pins = "gpio78"; 468716b24fe5SBryan O'Donoghue function = "gpio"; 468816b24fe5SBryan O'Donoghue drive-strength = <2>; 468916b24fe5SBryan O'Donoghue bias-pull-down; 469016b24fe5SBryan O'Donoghue output-low; 469116b24fe5SBryan O'Donoghue }; 469216b24fe5SBryan O'Donoghue 469316b24fe5SBryan O'Donoghue mclk-pins { 469416b24fe5SBryan O'Donoghue pins = "gpio96"; 469516b24fe5SBryan O'Donoghue function = "cam_mclk"; 469616b24fe5SBryan O'Donoghue drive-strength = <2>; 469716b24fe5SBryan O'Donoghue bias-disable; 469816b24fe5SBryan O'Donoghue }; 469916b24fe5SBryan O'Donoghue }; 470016b24fe5SBryan O'Donoghue 4701f7636174SKrzysztof Kozlowski cci0_default: cci0-default-state { 4702f7636174SKrzysztof Kozlowski cci0_i2c0_default: cci0-i2c0-default-pins { 4703e7173009SBryan O'Donoghue /* SDA, SCL */ 4704e7173009SBryan O'Donoghue pins = "gpio101", "gpio102"; 4705e7173009SBryan O'Donoghue function = "cci_i2c"; 4706e7173009SBryan O'Donoghue 4707e7173009SBryan O'Donoghue bias-pull-up; 4708e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4709e7173009SBryan O'Donoghue }; 4710e7173009SBryan O'Donoghue 4711f7636174SKrzysztof Kozlowski cci0_i2c1_default: cci0-i2c1-default-pins { 4712e7173009SBryan O'Donoghue /* SDA, SCL */ 4713e7173009SBryan O'Donoghue pins = "gpio103", "gpio104"; 4714e7173009SBryan O'Donoghue function = "cci_i2c"; 4715e7173009SBryan O'Donoghue 4716e7173009SBryan O'Donoghue bias-pull-up; 4717e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4718e7173009SBryan O'Donoghue }; 4719e7173009SBryan O'Donoghue }; 4720e7173009SBryan O'Donoghue 4721f7636174SKrzysztof Kozlowski cci0_sleep: cci0-sleep-state { 4722f7636174SKrzysztof Kozlowski cci0_i2c0_sleep: cci0-i2c0-sleep-pins { 4723e7173009SBryan O'Donoghue /* SDA, SCL */ 4724e7173009SBryan O'Donoghue pins = "gpio101", "gpio102"; 4725e7173009SBryan O'Donoghue function = "cci_i2c"; 4726e7173009SBryan O'Donoghue 4727e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4728e7173009SBryan O'Donoghue bias-pull-down; 4729e7173009SBryan O'Donoghue }; 4730e7173009SBryan O'Donoghue 4731f7636174SKrzysztof Kozlowski cci0_i2c1_sleep: cci0-i2c1-sleep-pins { 4732e7173009SBryan O'Donoghue /* SDA, SCL */ 4733e7173009SBryan O'Donoghue pins = "gpio103", "gpio104"; 4734e7173009SBryan O'Donoghue function = "cci_i2c"; 4735e7173009SBryan O'Donoghue 4736e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4737e7173009SBryan O'Donoghue bias-pull-down; 4738e7173009SBryan O'Donoghue }; 4739e7173009SBryan O'Donoghue }; 4740e7173009SBryan O'Donoghue 4741f7636174SKrzysztof Kozlowski cci1_default: cci1-default-state { 4742f7636174SKrzysztof Kozlowski cci1_i2c0_default: cci1-i2c0-default-pins { 4743e7173009SBryan O'Donoghue /* SDA, SCL */ 4744e7173009SBryan O'Donoghue pins = "gpio105","gpio106"; 4745e7173009SBryan O'Donoghue function = "cci_i2c"; 4746e7173009SBryan O'Donoghue 4747e7173009SBryan O'Donoghue bias-pull-up; 4748e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4749e7173009SBryan O'Donoghue }; 4750e7173009SBryan O'Donoghue 4751f7636174SKrzysztof Kozlowski cci1_i2c1_default: cci1-i2c1-default-pins { 4752e7173009SBryan O'Donoghue /* SDA, SCL */ 4753e7173009SBryan O'Donoghue pins = "gpio107","gpio108"; 4754e7173009SBryan O'Donoghue function = "cci_i2c"; 4755e7173009SBryan O'Donoghue 4756e7173009SBryan O'Donoghue bias-pull-up; 4757e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4758e7173009SBryan O'Donoghue }; 4759e7173009SBryan O'Donoghue }; 4760e7173009SBryan O'Donoghue 4761f7636174SKrzysztof Kozlowski cci1_sleep: cci1-sleep-state { 4762f7636174SKrzysztof Kozlowski cci1_i2c0_sleep: cci1-i2c0-sleep-pins { 4763e7173009SBryan O'Donoghue /* SDA, SCL */ 4764e7173009SBryan O'Donoghue pins = "gpio105","gpio106"; 4765e7173009SBryan O'Donoghue function = "cci_i2c"; 4766e7173009SBryan O'Donoghue 4767e7173009SBryan O'Donoghue bias-pull-down; 4768e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4769e7173009SBryan O'Donoghue }; 4770e7173009SBryan O'Donoghue 4771f7636174SKrzysztof Kozlowski cci1_i2c1_sleep: cci1-i2c1-sleep-pins { 4772e7173009SBryan O'Donoghue /* SDA, SCL */ 4773e7173009SBryan O'Donoghue pins = "gpio107","gpio108"; 4774e7173009SBryan O'Donoghue function = "cci_i2c"; 4775e7173009SBryan O'Donoghue 4776e7173009SBryan O'Donoghue bias-pull-down; 4777e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4778e7173009SBryan O'Donoghue }; 4779e7173009SBryan O'Donoghue }; 4780e7173009SBryan O'Donoghue 4781f7636174SKrzysztof Kozlowski pri_mi2s_active: pri-mi2s-active-state { 4782f7636174SKrzysztof Kozlowski sclk-pins { 4783b657d372SSrinivas Kandagatla pins = "gpio138"; 4784b657d372SSrinivas Kandagatla function = "mi2s0_sck"; 4785b657d372SSrinivas Kandagatla drive-strength = <8>; 4786b657d372SSrinivas Kandagatla bias-disable; 4787b657d372SSrinivas Kandagatla }; 4788b657d372SSrinivas Kandagatla 4789f7636174SKrzysztof Kozlowski ws-pins { 4790b657d372SSrinivas Kandagatla pins = "gpio141"; 4791b657d372SSrinivas Kandagatla function = "mi2s0_ws"; 4792b657d372SSrinivas Kandagatla drive-strength = <8>; 4793b657d372SSrinivas Kandagatla output-high; 4794b657d372SSrinivas Kandagatla }; 4795b657d372SSrinivas Kandagatla 4796f7636174SKrzysztof Kozlowski data0-pins { 4797b657d372SSrinivas Kandagatla pins = "gpio139"; 4798b657d372SSrinivas Kandagatla function = "mi2s0_data0"; 4799b657d372SSrinivas Kandagatla drive-strength = <8>; 4800b657d372SSrinivas Kandagatla bias-disable; 4801b657d372SSrinivas Kandagatla output-high; 4802b657d372SSrinivas Kandagatla }; 4803b657d372SSrinivas Kandagatla 4804f7636174SKrzysztof Kozlowski data1-pins { 4805b657d372SSrinivas Kandagatla pins = "gpio140"; 4806b657d372SSrinivas Kandagatla function = "mi2s0_data1"; 4807b657d372SSrinivas Kandagatla drive-strength = <8>; 4808b657d372SSrinivas Kandagatla output-high; 4809b657d372SSrinivas Kandagatla }; 4810b657d372SSrinivas Kandagatla }; 4811b657d372SSrinivas Kandagatla 4812f7636174SKrzysztof Kozlowski qup_i2c0_default: qup-i2c0-default-state { 4813e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 4814e5813b15SDmitry Baryshkov function = "qup0"; 4815e5813b15SDmitry Baryshkov drive-strength = <2>; 4816e5813b15SDmitry Baryshkov bias-disable; 4817e5813b15SDmitry Baryshkov }; 4818e5813b15SDmitry Baryshkov 4819f7636174SKrzysztof Kozlowski qup_i2c1_default: qup-i2c1-default-state { 4820e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 4821e5813b15SDmitry Baryshkov function = "qup1"; 4822e5813b15SDmitry Baryshkov drive-strength = <2>; 4823e5813b15SDmitry Baryshkov bias-disable; 4824e5813b15SDmitry Baryshkov }; 4825e5813b15SDmitry Baryshkov 4826f7636174SKrzysztof Kozlowski qup_i2c2_default: qup-i2c2-default-state { 4827e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 4828e5813b15SDmitry Baryshkov function = "qup2"; 4829e5813b15SDmitry Baryshkov drive-strength = <2>; 4830e5813b15SDmitry Baryshkov bias-disable; 4831e5813b15SDmitry Baryshkov }; 4832e5813b15SDmitry Baryshkov 4833f7636174SKrzysztof Kozlowski qup_i2c3_default: qup-i2c3-default-state { 4834e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 4835e5813b15SDmitry Baryshkov function = "qup3"; 4836e5813b15SDmitry Baryshkov drive-strength = <2>; 4837e5813b15SDmitry Baryshkov bias-disable; 4838e5813b15SDmitry Baryshkov }; 4839e5813b15SDmitry Baryshkov 4840f7636174SKrzysztof Kozlowski qup_i2c4_default: qup-i2c4-default-state { 4841e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 4842e5813b15SDmitry Baryshkov function = "qup4"; 4843e5813b15SDmitry Baryshkov drive-strength = <2>; 4844e5813b15SDmitry Baryshkov bias-disable; 4845e5813b15SDmitry Baryshkov }; 4846e5813b15SDmitry Baryshkov 4847f7636174SKrzysztof Kozlowski qup_i2c5_default: qup-i2c5-default-state { 4848e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 4849e5813b15SDmitry Baryshkov function = "qup5"; 4850e5813b15SDmitry Baryshkov drive-strength = <2>; 4851e5813b15SDmitry Baryshkov bias-disable; 4852e5813b15SDmitry Baryshkov }; 4853e5813b15SDmitry Baryshkov 4854f7636174SKrzysztof Kozlowski qup_i2c6_default: qup-i2c6-default-state { 4855e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 4856e5813b15SDmitry Baryshkov function = "qup6"; 4857e5813b15SDmitry Baryshkov drive-strength = <2>; 4858e5813b15SDmitry Baryshkov bias-disable; 4859e5813b15SDmitry Baryshkov }; 4860e5813b15SDmitry Baryshkov 4861f7636174SKrzysztof Kozlowski qup_i2c7_default: qup-i2c7-default-state { 4862e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 4863e5813b15SDmitry Baryshkov function = "qup7"; 4864e5813b15SDmitry Baryshkov drive-strength = <2>; 4865e5813b15SDmitry Baryshkov bias-disable; 4866e5813b15SDmitry Baryshkov }; 4867e5813b15SDmitry Baryshkov 4868f7636174SKrzysztof Kozlowski qup_i2c8_default: qup-i2c8-default-state { 4869e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 4870e5813b15SDmitry Baryshkov function = "qup8"; 4871e5813b15SDmitry Baryshkov drive-strength = <2>; 4872e5813b15SDmitry Baryshkov bias-disable; 4873e5813b15SDmitry Baryshkov }; 4874e5813b15SDmitry Baryshkov 4875f7636174SKrzysztof Kozlowski qup_i2c9_default: qup-i2c9-default-state { 4876e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 4877e5813b15SDmitry Baryshkov function = "qup9"; 4878e5813b15SDmitry Baryshkov drive-strength = <2>; 4879e5813b15SDmitry Baryshkov bias-disable; 4880e5813b15SDmitry Baryshkov }; 4881e5813b15SDmitry Baryshkov 4882f7636174SKrzysztof Kozlowski qup_i2c10_default: qup-i2c10-default-state { 4883e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 4884e5813b15SDmitry Baryshkov function = "qup10"; 4885e5813b15SDmitry Baryshkov drive-strength = <2>; 4886e5813b15SDmitry Baryshkov bias-disable; 4887e5813b15SDmitry Baryshkov }; 4888e5813b15SDmitry Baryshkov 4889f7636174SKrzysztof Kozlowski qup_i2c11_default: qup-i2c11-default-state { 4890e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 4891e5813b15SDmitry Baryshkov function = "qup11"; 4892e5813b15SDmitry Baryshkov drive-strength = <2>; 4893e5813b15SDmitry Baryshkov bias-disable; 4894e5813b15SDmitry Baryshkov }; 4895e5813b15SDmitry Baryshkov 4896f7636174SKrzysztof Kozlowski qup_i2c12_default: qup-i2c12-default-state { 4897e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 4898e5813b15SDmitry Baryshkov function = "qup12"; 4899e5813b15SDmitry Baryshkov drive-strength = <2>; 4900e5813b15SDmitry Baryshkov bias-disable; 4901e5813b15SDmitry Baryshkov }; 4902e5813b15SDmitry Baryshkov 4903f7636174SKrzysztof Kozlowski qup_i2c13_default: qup-i2c13-default-state { 4904e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 4905e5813b15SDmitry Baryshkov function = "qup13"; 4906e5813b15SDmitry Baryshkov drive-strength = <2>; 4907e5813b15SDmitry Baryshkov bias-disable; 4908e5813b15SDmitry Baryshkov }; 4909e5813b15SDmitry Baryshkov 4910f7636174SKrzysztof Kozlowski qup_i2c14_default: qup-i2c14-default-state { 4911e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 4912e5813b15SDmitry Baryshkov function = "qup14"; 4913e5813b15SDmitry Baryshkov drive-strength = <2>; 4914e5813b15SDmitry Baryshkov bias-disable; 4915e5813b15SDmitry Baryshkov }; 4916e5813b15SDmitry Baryshkov 4917f7636174SKrzysztof Kozlowski qup_i2c15_default: qup-i2c15-default-state { 4918e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 4919e5813b15SDmitry Baryshkov function = "qup15"; 4920e5813b15SDmitry Baryshkov drive-strength = <2>; 4921e5813b15SDmitry Baryshkov bias-disable; 4922e5813b15SDmitry Baryshkov }; 4923e5813b15SDmitry Baryshkov 4924f7636174SKrzysztof Kozlowski qup_i2c16_default: qup-i2c16-default-state { 4925e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 4926e5813b15SDmitry Baryshkov function = "qup16"; 4927e5813b15SDmitry Baryshkov drive-strength = <2>; 4928e5813b15SDmitry Baryshkov bias-disable; 4929e5813b15SDmitry Baryshkov }; 4930e5813b15SDmitry Baryshkov 4931f7636174SKrzysztof Kozlowski qup_i2c17_default: qup-i2c17-default-state { 4932e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 4933e5813b15SDmitry Baryshkov function = "qup17"; 4934e5813b15SDmitry Baryshkov drive-strength = <2>; 4935e5813b15SDmitry Baryshkov bias-disable; 4936e5813b15SDmitry Baryshkov }; 4937e5813b15SDmitry Baryshkov 4938f7636174SKrzysztof Kozlowski qup_i2c18_default: qup-i2c18-default-state { 4939e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 4940e5813b15SDmitry Baryshkov function = "qup18"; 4941e5813b15SDmitry Baryshkov drive-strength = <2>; 4942e5813b15SDmitry Baryshkov bias-disable; 4943e5813b15SDmitry Baryshkov }; 4944e5813b15SDmitry Baryshkov 4945f7636174SKrzysztof Kozlowski qup_i2c19_default: qup-i2c19-default-state { 4946e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 4947e5813b15SDmitry Baryshkov function = "qup19"; 4948e5813b15SDmitry Baryshkov drive-strength = <2>; 4949e5813b15SDmitry Baryshkov bias-disable; 4950e5813b15SDmitry Baryshkov }; 4951e5813b15SDmitry Baryshkov 4952f7636174SKrzysztof Kozlowski qup_spi0_cs: qup-spi0-cs-state { 4953c88f9eccSDmitry Baryshkov pins = "gpio31"; 4954e5813b15SDmitry Baryshkov function = "qup0"; 4955e5813b15SDmitry Baryshkov }; 4956e5813b15SDmitry Baryshkov 4957f7636174SKrzysztof Kozlowski qup_spi0_cs_gpio: qup-spi0-cs-gpio-state { 4958eb97ccbbSDmitry Baryshkov pins = "gpio31"; 4959eb97ccbbSDmitry Baryshkov function = "gpio"; 4960eb97ccbbSDmitry Baryshkov }; 4961eb97ccbbSDmitry Baryshkov 4962f7636174SKrzysztof Kozlowski qup_spi0_data_clk: qup-spi0-data-clk-state { 4963c88f9eccSDmitry Baryshkov pins = "gpio28", "gpio29", 4964c88f9eccSDmitry Baryshkov "gpio30"; 4965c88f9eccSDmitry Baryshkov function = "qup0"; 4966c88f9eccSDmitry Baryshkov }; 4967c88f9eccSDmitry Baryshkov 4968f7636174SKrzysztof Kozlowski qup_spi1_cs: qup-spi1-cs-state { 4969c88f9eccSDmitry Baryshkov pins = "gpio7"; 4970e5813b15SDmitry Baryshkov function = "qup1"; 4971e5813b15SDmitry Baryshkov }; 4972e5813b15SDmitry Baryshkov 4973f7636174SKrzysztof Kozlowski qup_spi1_cs_gpio: qup-spi1-cs-gpio-state { 4974eb97ccbbSDmitry Baryshkov pins = "gpio7"; 4975eb97ccbbSDmitry Baryshkov function = "gpio"; 4976eb97ccbbSDmitry Baryshkov }; 4977eb97ccbbSDmitry Baryshkov 4978f7636174SKrzysztof Kozlowski qup_spi1_data_clk: qup-spi1-data-clk-state { 4979c88f9eccSDmitry Baryshkov pins = "gpio4", "gpio5", 4980c88f9eccSDmitry Baryshkov "gpio6"; 4981c88f9eccSDmitry Baryshkov function = "qup1"; 4982c88f9eccSDmitry Baryshkov }; 4983c88f9eccSDmitry Baryshkov 4984f7636174SKrzysztof Kozlowski qup_spi2_cs: qup-spi2-cs-state { 4985c88f9eccSDmitry Baryshkov pins = "gpio118"; 4986e5813b15SDmitry Baryshkov function = "qup2"; 4987e5813b15SDmitry Baryshkov }; 4988e5813b15SDmitry Baryshkov 4989f7636174SKrzysztof Kozlowski qup_spi2_cs_gpio: qup-spi2-cs-gpio-state { 4990eb97ccbbSDmitry Baryshkov pins = "gpio118"; 4991eb97ccbbSDmitry Baryshkov function = "gpio"; 4992eb97ccbbSDmitry Baryshkov }; 4993eb97ccbbSDmitry Baryshkov 4994f7636174SKrzysztof Kozlowski qup_spi2_data_clk: qup-spi2-data-clk-state { 4995c88f9eccSDmitry Baryshkov pins = "gpio115", "gpio116", 4996c88f9eccSDmitry Baryshkov "gpio117"; 4997c88f9eccSDmitry Baryshkov function = "qup2"; 4998c88f9eccSDmitry Baryshkov }; 4999c88f9eccSDmitry Baryshkov 5000f7636174SKrzysztof Kozlowski qup_spi3_cs: qup-spi3-cs-state { 5001c88f9eccSDmitry Baryshkov pins = "gpio122"; 5002e5813b15SDmitry Baryshkov function = "qup3"; 5003e5813b15SDmitry Baryshkov }; 5004e5813b15SDmitry Baryshkov 5005f7636174SKrzysztof Kozlowski qup_spi3_cs_gpio: qup-spi3-cs-gpio-state { 5006eb97ccbbSDmitry Baryshkov pins = "gpio122"; 5007eb97ccbbSDmitry Baryshkov function = "gpio"; 5008eb97ccbbSDmitry Baryshkov }; 5009eb97ccbbSDmitry Baryshkov 5010f7636174SKrzysztof Kozlowski qup_spi3_data_clk: qup-spi3-data-clk-state { 5011c88f9eccSDmitry Baryshkov pins = "gpio119", "gpio120", 5012c88f9eccSDmitry Baryshkov "gpio121"; 5013c88f9eccSDmitry Baryshkov function = "qup3"; 5014c88f9eccSDmitry Baryshkov }; 5015c88f9eccSDmitry Baryshkov 5016f7636174SKrzysztof Kozlowski qup_spi4_cs: qup-spi4-cs-state { 5017c88f9eccSDmitry Baryshkov pins = "gpio11"; 5018e5813b15SDmitry Baryshkov function = "qup4"; 5019e5813b15SDmitry Baryshkov }; 5020e5813b15SDmitry Baryshkov 5021f7636174SKrzysztof Kozlowski qup_spi4_cs_gpio: qup-spi4-cs-gpio-state { 5022eb97ccbbSDmitry Baryshkov pins = "gpio11"; 5023eb97ccbbSDmitry Baryshkov function = "gpio"; 5024eb97ccbbSDmitry Baryshkov }; 5025eb97ccbbSDmitry Baryshkov 5026f7636174SKrzysztof Kozlowski qup_spi4_data_clk: qup-spi4-data-clk-state { 5027c88f9eccSDmitry Baryshkov pins = "gpio8", "gpio9", 5028c88f9eccSDmitry Baryshkov "gpio10"; 5029c88f9eccSDmitry Baryshkov function = "qup4"; 5030c88f9eccSDmitry Baryshkov }; 5031c88f9eccSDmitry Baryshkov 5032f7636174SKrzysztof Kozlowski qup_spi5_cs: qup-spi5-cs-state { 5033c88f9eccSDmitry Baryshkov pins = "gpio15"; 5034e5813b15SDmitry Baryshkov function = "qup5"; 5035e5813b15SDmitry Baryshkov }; 5036e5813b15SDmitry Baryshkov 5037f7636174SKrzysztof Kozlowski qup_spi5_cs_gpio: qup-spi5-cs-gpio-state { 5038eb97ccbbSDmitry Baryshkov pins = "gpio15"; 5039eb97ccbbSDmitry Baryshkov function = "gpio"; 5040eb97ccbbSDmitry Baryshkov }; 5041eb97ccbbSDmitry Baryshkov 5042f7636174SKrzysztof Kozlowski qup_spi5_data_clk: qup-spi5-data-clk-state { 5043c88f9eccSDmitry Baryshkov pins = "gpio12", "gpio13", 5044c88f9eccSDmitry Baryshkov "gpio14"; 5045c88f9eccSDmitry Baryshkov function = "qup5"; 5046c88f9eccSDmitry Baryshkov }; 5047c88f9eccSDmitry Baryshkov 5048f7636174SKrzysztof Kozlowski qup_spi6_cs: qup-spi6-cs-state { 5049c88f9eccSDmitry Baryshkov pins = "gpio19"; 5050e5813b15SDmitry Baryshkov function = "qup6"; 5051e5813b15SDmitry Baryshkov }; 5052e5813b15SDmitry Baryshkov 5053f7636174SKrzysztof Kozlowski qup_spi6_cs_gpio: qup-spi6-cs-gpio-state { 5054eb97ccbbSDmitry Baryshkov pins = "gpio19"; 5055eb97ccbbSDmitry Baryshkov function = "gpio"; 5056eb97ccbbSDmitry Baryshkov }; 5057eb97ccbbSDmitry Baryshkov 5058f7636174SKrzysztof Kozlowski qup_spi6_data_clk: qup-spi6-data-clk-state { 5059c88f9eccSDmitry Baryshkov pins = "gpio16", "gpio17", 5060c88f9eccSDmitry Baryshkov "gpio18"; 5061c88f9eccSDmitry Baryshkov function = "qup6"; 5062c88f9eccSDmitry Baryshkov }; 5063c88f9eccSDmitry Baryshkov 5064f7636174SKrzysztof Kozlowski qup_spi7_cs: qup-spi7-cs-state { 5065c88f9eccSDmitry Baryshkov pins = "gpio23"; 5066e5813b15SDmitry Baryshkov function = "qup7"; 5067e5813b15SDmitry Baryshkov }; 5068e5813b15SDmitry Baryshkov 5069f7636174SKrzysztof Kozlowski qup_spi7_cs_gpio: qup-spi7-cs-gpio-state { 5070eb97ccbbSDmitry Baryshkov pins = "gpio23"; 5071eb97ccbbSDmitry Baryshkov function = "gpio"; 5072eb97ccbbSDmitry Baryshkov }; 5073eb97ccbbSDmitry Baryshkov 5074f7636174SKrzysztof Kozlowski qup_spi7_data_clk: qup-spi7-data-clk-state { 5075c88f9eccSDmitry Baryshkov pins = "gpio20", "gpio21", 5076c88f9eccSDmitry Baryshkov "gpio22"; 5077c88f9eccSDmitry Baryshkov function = "qup7"; 5078c88f9eccSDmitry Baryshkov }; 5079c88f9eccSDmitry Baryshkov 5080f7636174SKrzysztof Kozlowski qup_spi8_cs: qup-spi8-cs-state { 5081c88f9eccSDmitry Baryshkov pins = "gpio27"; 5082e5813b15SDmitry Baryshkov function = "qup8"; 5083e5813b15SDmitry Baryshkov }; 5084e5813b15SDmitry Baryshkov 5085f7636174SKrzysztof Kozlowski qup_spi8_cs_gpio: qup-spi8-cs-gpio-state { 5086eb97ccbbSDmitry Baryshkov pins = "gpio27"; 5087eb97ccbbSDmitry Baryshkov function = "gpio"; 5088eb97ccbbSDmitry Baryshkov }; 5089eb97ccbbSDmitry Baryshkov 5090f7636174SKrzysztof Kozlowski qup_spi8_data_clk: qup-spi8-data-clk-state { 5091c88f9eccSDmitry Baryshkov pins = "gpio24", "gpio25", 5092c88f9eccSDmitry Baryshkov "gpio26"; 5093c88f9eccSDmitry Baryshkov function = "qup8"; 5094c88f9eccSDmitry Baryshkov }; 5095c88f9eccSDmitry Baryshkov 5096f7636174SKrzysztof Kozlowski qup_spi9_cs: qup-spi9-cs-state { 5097c88f9eccSDmitry Baryshkov pins = "gpio128"; 5098e5813b15SDmitry Baryshkov function = "qup9"; 5099e5813b15SDmitry Baryshkov }; 5100e5813b15SDmitry Baryshkov 5101f7636174SKrzysztof Kozlowski qup_spi9_cs_gpio: qup-spi9-cs-gpio-state { 5102eb97ccbbSDmitry Baryshkov pins = "gpio128"; 5103eb97ccbbSDmitry Baryshkov function = "gpio"; 5104eb97ccbbSDmitry Baryshkov }; 5105eb97ccbbSDmitry Baryshkov 5106f7636174SKrzysztof Kozlowski qup_spi9_data_clk: qup-spi9-data-clk-state { 5107c88f9eccSDmitry Baryshkov pins = "gpio125", "gpio126", 5108c88f9eccSDmitry Baryshkov "gpio127"; 5109c88f9eccSDmitry Baryshkov function = "qup9"; 5110c88f9eccSDmitry Baryshkov }; 5111c88f9eccSDmitry Baryshkov 5112f7636174SKrzysztof Kozlowski qup_spi10_cs: qup-spi10-cs-state { 5113c88f9eccSDmitry Baryshkov pins = "gpio132"; 5114e5813b15SDmitry Baryshkov function = "qup10"; 5115e5813b15SDmitry Baryshkov }; 5116e5813b15SDmitry Baryshkov 5117f7636174SKrzysztof Kozlowski qup_spi10_cs_gpio: qup-spi10-cs-gpio-state { 5118eb97ccbbSDmitry Baryshkov pins = "gpio132"; 5119eb97ccbbSDmitry Baryshkov function = "gpio"; 5120eb97ccbbSDmitry Baryshkov }; 5121eb97ccbbSDmitry Baryshkov 5122f7636174SKrzysztof Kozlowski qup_spi10_data_clk: qup-spi10-data-clk-state { 5123c88f9eccSDmitry Baryshkov pins = "gpio129", "gpio130", 5124c88f9eccSDmitry Baryshkov "gpio131"; 5125c88f9eccSDmitry Baryshkov function = "qup10"; 5126c88f9eccSDmitry Baryshkov }; 5127c88f9eccSDmitry Baryshkov 5128f7636174SKrzysztof Kozlowski qup_spi11_cs: qup-spi11-cs-state { 5129c88f9eccSDmitry Baryshkov pins = "gpio63"; 5130e5813b15SDmitry Baryshkov function = "qup11"; 5131e5813b15SDmitry Baryshkov }; 5132e5813b15SDmitry Baryshkov 5133f7636174SKrzysztof Kozlowski qup_spi11_cs_gpio: qup-spi11-cs-gpio-state { 5134eb97ccbbSDmitry Baryshkov pins = "gpio63"; 5135eb97ccbbSDmitry Baryshkov function = "gpio"; 5136eb97ccbbSDmitry Baryshkov }; 5137eb97ccbbSDmitry Baryshkov 5138f7636174SKrzysztof Kozlowski qup_spi11_data_clk: qup-spi11-data-clk-state { 5139c88f9eccSDmitry Baryshkov pins = "gpio60", "gpio61", 5140c88f9eccSDmitry Baryshkov "gpio62"; 5141c88f9eccSDmitry Baryshkov function = "qup11"; 5142c88f9eccSDmitry Baryshkov }; 5143c88f9eccSDmitry Baryshkov 5144f7636174SKrzysztof Kozlowski qup_spi12_cs: qup-spi12-cs-state { 5145c88f9eccSDmitry Baryshkov pins = "gpio35"; 5146e5813b15SDmitry Baryshkov function = "qup12"; 5147e5813b15SDmitry Baryshkov }; 5148e5813b15SDmitry Baryshkov 5149f7636174SKrzysztof Kozlowski qup_spi12_cs_gpio: qup-spi12-cs-gpio-state { 5150eb97ccbbSDmitry Baryshkov pins = "gpio35"; 5151eb97ccbbSDmitry Baryshkov function = "gpio"; 5152eb97ccbbSDmitry Baryshkov }; 5153eb97ccbbSDmitry Baryshkov 5154f7636174SKrzysztof Kozlowski qup_spi12_data_clk: qup-spi12-data-clk-state { 5155c88f9eccSDmitry Baryshkov pins = "gpio32", "gpio33", 5156c88f9eccSDmitry Baryshkov "gpio34"; 5157c88f9eccSDmitry Baryshkov function = "qup12"; 5158c88f9eccSDmitry Baryshkov }; 5159c88f9eccSDmitry Baryshkov 5160f7636174SKrzysztof Kozlowski qup_spi13_cs: qup-spi13-cs-state { 5161c88f9eccSDmitry Baryshkov pins = "gpio39"; 5162e5813b15SDmitry Baryshkov function = "qup13"; 5163e5813b15SDmitry Baryshkov }; 5164e5813b15SDmitry Baryshkov 5165f7636174SKrzysztof Kozlowski qup_spi13_cs_gpio: qup-spi13-cs-gpio-state { 5166eb97ccbbSDmitry Baryshkov pins = "gpio39"; 5167eb97ccbbSDmitry Baryshkov function = "gpio"; 5168eb97ccbbSDmitry Baryshkov }; 5169eb97ccbbSDmitry Baryshkov 5170f7636174SKrzysztof Kozlowski qup_spi13_data_clk: qup-spi13-data-clk-state { 5171c88f9eccSDmitry Baryshkov pins = "gpio36", "gpio37", 5172c88f9eccSDmitry Baryshkov "gpio38"; 5173c88f9eccSDmitry Baryshkov function = "qup13"; 5174c88f9eccSDmitry Baryshkov }; 5175c88f9eccSDmitry Baryshkov 5176f7636174SKrzysztof Kozlowski qup_spi14_cs: qup-spi14-cs-state { 5177c88f9eccSDmitry Baryshkov pins = "gpio43"; 5178e5813b15SDmitry Baryshkov function = "qup14"; 5179e5813b15SDmitry Baryshkov }; 5180e5813b15SDmitry Baryshkov 5181f7636174SKrzysztof Kozlowski qup_spi14_cs_gpio: qup-spi14-cs-gpio-state { 5182eb97ccbbSDmitry Baryshkov pins = "gpio43"; 5183eb97ccbbSDmitry Baryshkov function = "gpio"; 5184eb97ccbbSDmitry Baryshkov }; 5185eb97ccbbSDmitry Baryshkov 5186f7636174SKrzysztof Kozlowski qup_spi14_data_clk: qup-spi14-data-clk-state { 5187c88f9eccSDmitry Baryshkov pins = "gpio40", "gpio41", 5188c88f9eccSDmitry Baryshkov "gpio42"; 5189c88f9eccSDmitry Baryshkov function = "qup14"; 5190c88f9eccSDmitry Baryshkov }; 5191c88f9eccSDmitry Baryshkov 5192f7636174SKrzysztof Kozlowski qup_spi15_cs: qup-spi15-cs-state { 5193c88f9eccSDmitry Baryshkov pins = "gpio47"; 5194e5813b15SDmitry Baryshkov function = "qup15"; 5195e5813b15SDmitry Baryshkov }; 5196e5813b15SDmitry Baryshkov 5197f7636174SKrzysztof Kozlowski qup_spi15_cs_gpio: qup-spi15-cs-gpio-state { 5198eb97ccbbSDmitry Baryshkov pins = "gpio47"; 5199eb97ccbbSDmitry Baryshkov function = "gpio"; 5200eb97ccbbSDmitry Baryshkov }; 5201eb97ccbbSDmitry Baryshkov 5202f7636174SKrzysztof Kozlowski qup_spi15_data_clk: qup-spi15-data-clk-state { 5203c88f9eccSDmitry Baryshkov pins = "gpio44", "gpio45", 5204c88f9eccSDmitry Baryshkov "gpio46"; 5205c88f9eccSDmitry Baryshkov function = "qup15"; 5206c88f9eccSDmitry Baryshkov }; 5207c88f9eccSDmitry Baryshkov 5208f7636174SKrzysztof Kozlowski qup_spi16_cs: qup-spi16-cs-state { 5209c88f9eccSDmitry Baryshkov pins = "gpio51"; 5210e5813b15SDmitry Baryshkov function = "qup16"; 5211e5813b15SDmitry Baryshkov }; 5212e5813b15SDmitry Baryshkov 5213f7636174SKrzysztof Kozlowski qup_spi16_cs_gpio: qup-spi16-cs-gpio-state { 5214eb97ccbbSDmitry Baryshkov pins = "gpio51"; 5215eb97ccbbSDmitry Baryshkov function = "gpio"; 5216eb97ccbbSDmitry Baryshkov }; 5217eb97ccbbSDmitry Baryshkov 5218f7636174SKrzysztof Kozlowski qup_spi16_data_clk: qup-spi16-data-clk-state { 5219c88f9eccSDmitry Baryshkov pins = "gpio48", "gpio49", 5220c88f9eccSDmitry Baryshkov "gpio50"; 5221c88f9eccSDmitry Baryshkov function = "qup16"; 5222c88f9eccSDmitry Baryshkov }; 5223c88f9eccSDmitry Baryshkov 5224f7636174SKrzysztof Kozlowski qup_spi17_cs: qup-spi17-cs-state { 5225c88f9eccSDmitry Baryshkov pins = "gpio55"; 5226e5813b15SDmitry Baryshkov function = "qup17"; 5227e5813b15SDmitry Baryshkov }; 5228e5813b15SDmitry Baryshkov 5229f7636174SKrzysztof Kozlowski qup_spi17_cs_gpio: qup-spi17-cs-gpio-state { 5230eb97ccbbSDmitry Baryshkov pins = "gpio55"; 5231eb97ccbbSDmitry Baryshkov function = "gpio"; 5232eb97ccbbSDmitry Baryshkov }; 5233eb97ccbbSDmitry Baryshkov 5234f7636174SKrzysztof Kozlowski qup_spi17_data_clk: qup-spi17-data-clk-state { 5235c88f9eccSDmitry Baryshkov pins = "gpio52", "gpio53", 5236c88f9eccSDmitry Baryshkov "gpio54"; 5237c88f9eccSDmitry Baryshkov function = "qup17"; 5238c88f9eccSDmitry Baryshkov }; 5239c88f9eccSDmitry Baryshkov 5240f7636174SKrzysztof Kozlowski qup_spi18_cs: qup-spi18-cs-state { 5241c88f9eccSDmitry Baryshkov pins = "gpio59"; 5242e5813b15SDmitry Baryshkov function = "qup18"; 5243e5813b15SDmitry Baryshkov }; 5244e5813b15SDmitry Baryshkov 5245f7636174SKrzysztof Kozlowski qup_spi18_cs_gpio: qup-spi18-cs-gpio-state { 5246eb97ccbbSDmitry Baryshkov pins = "gpio59"; 5247eb97ccbbSDmitry Baryshkov function = "gpio"; 5248eb97ccbbSDmitry Baryshkov }; 5249eb97ccbbSDmitry Baryshkov 5250f7636174SKrzysztof Kozlowski qup_spi18_data_clk: qup-spi18-data-clk-state { 5251c88f9eccSDmitry Baryshkov pins = "gpio56", "gpio57", 5252c88f9eccSDmitry Baryshkov "gpio58"; 5253c88f9eccSDmitry Baryshkov function = "qup18"; 5254c88f9eccSDmitry Baryshkov }; 5255c88f9eccSDmitry Baryshkov 5256f7636174SKrzysztof Kozlowski qup_spi19_cs: qup-spi19-cs-state { 5257c88f9eccSDmitry Baryshkov pins = "gpio3"; 5258c88f9eccSDmitry Baryshkov function = "qup19"; 5259c88f9eccSDmitry Baryshkov }; 5260c88f9eccSDmitry Baryshkov 5261f7636174SKrzysztof Kozlowski qup_spi19_cs_gpio: qup-spi19-cs-gpio-state { 5262eb97ccbbSDmitry Baryshkov pins = "gpio3"; 5263eb97ccbbSDmitry Baryshkov function = "gpio"; 5264eb97ccbbSDmitry Baryshkov }; 5265eb97ccbbSDmitry Baryshkov 5266f7636174SKrzysztof Kozlowski qup_spi19_data_clk: qup-spi19-data-clk-state { 5267e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 5268c88f9eccSDmitry Baryshkov "gpio2"; 5269e5813b15SDmitry Baryshkov function = "qup19"; 5270e5813b15SDmitry Baryshkov }; 5271e5813b15SDmitry Baryshkov 5272f7636174SKrzysztof Kozlowski qup_uart2_default: qup-uart2-default-state { 527308a9ae2dSDmitry Baryshkov pins = "gpio117", "gpio118"; 527408a9ae2dSDmitry Baryshkov function = "qup2"; 527508a9ae2dSDmitry Baryshkov }; 527608a9ae2dSDmitry Baryshkov 5277f7636174SKrzysztof Kozlowski qup_uart6_default: qup-uart6-default-state { 5278f7636174SKrzysztof Kozlowski pins = "gpio16", "gpio17", "gpio18", "gpio19"; 527908a9ae2dSDmitry Baryshkov function = "qup6"; 528008a9ae2dSDmitry Baryshkov }; 528108a9ae2dSDmitry Baryshkov 5282f7636174SKrzysztof Kozlowski qup_uart12_default: qup-uart12-default-state { 5283bb1dfb4dSManivannan Sadhasivam pins = "gpio34", "gpio35"; 5284bb1dfb4dSManivannan Sadhasivam function = "qup12"; 5285bb1dfb4dSManivannan Sadhasivam }; 528608a9ae2dSDmitry Baryshkov 5287f7636174SKrzysztof Kozlowski qup_uart17_default: qup-uart17-default-state { 5288f7636174SKrzysztof Kozlowski pins = "gpio52", "gpio53", "gpio54", "gpio55"; 528908a9ae2dSDmitry Baryshkov function = "qup17"; 529008a9ae2dSDmitry Baryshkov }; 529108a9ae2dSDmitry Baryshkov 5292f7636174SKrzysztof Kozlowski qup_uart18_default: qup-uart18-default-state { 529308a9ae2dSDmitry Baryshkov pins = "gpio58", "gpio59"; 529408a9ae2dSDmitry Baryshkov function = "qup18"; 529508a9ae2dSDmitry Baryshkov }; 5296b657d372SSrinivas Kandagatla 5297f7636174SKrzysztof Kozlowski tert_mi2s_active: tert-mi2s-active-state { 5298f7636174SKrzysztof Kozlowski sck-pins { 5299b657d372SSrinivas Kandagatla pins = "gpio133"; 5300b657d372SSrinivas Kandagatla function = "mi2s2_sck"; 5301b657d372SSrinivas Kandagatla drive-strength = <8>; 5302b657d372SSrinivas Kandagatla bias-disable; 5303b657d372SSrinivas Kandagatla }; 5304b657d372SSrinivas Kandagatla 5305f7636174SKrzysztof Kozlowski data0-pins { 5306b657d372SSrinivas Kandagatla pins = "gpio134"; 5307b657d372SSrinivas Kandagatla function = "mi2s2_data0"; 5308b657d372SSrinivas Kandagatla drive-strength = <8>; 5309b657d372SSrinivas Kandagatla bias-disable; 5310b657d372SSrinivas Kandagatla output-high; 5311b657d372SSrinivas Kandagatla }; 5312b657d372SSrinivas Kandagatla 5313f7636174SKrzysztof Kozlowski ws-pins { 5314b657d372SSrinivas Kandagatla pins = "gpio135"; 5315b657d372SSrinivas Kandagatla function = "mi2s2_ws"; 5316b657d372SSrinivas Kandagatla drive-strength = <8>; 5317b657d372SSrinivas Kandagatla output-high; 5318b657d372SSrinivas Kandagatla }; 5319b657d372SSrinivas Kandagatla }; 53208eaa6501SKonrad Dybcio 5321f7636174SKrzysztof Kozlowski sdc2_sleep_state: sdc2-sleep-state { 5322f7636174SKrzysztof Kozlowski clk-pins { 53238eaa6501SKonrad Dybcio pins = "sdc2_clk"; 53248eaa6501SKonrad Dybcio drive-strength = <2>; 53258eaa6501SKonrad Dybcio bias-disable; 53268eaa6501SKonrad Dybcio }; 53278eaa6501SKonrad Dybcio 5328f7636174SKrzysztof Kozlowski cmd-pins { 53298eaa6501SKonrad Dybcio pins = "sdc2_cmd"; 53308eaa6501SKonrad Dybcio drive-strength = <2>; 53318eaa6501SKonrad Dybcio bias-pull-up; 53328eaa6501SKonrad Dybcio }; 53338eaa6501SKonrad Dybcio 5334f7636174SKrzysztof Kozlowski data-pins { 53358eaa6501SKonrad Dybcio pins = "sdc2_data"; 53368eaa6501SKonrad Dybcio drive-strength = <2>; 53378eaa6501SKonrad Dybcio bias-pull-up; 53388eaa6501SKonrad Dybcio }; 53398eaa6501SKonrad Dybcio }; 534013e948a3SKonrad Dybcio 5341f7636174SKrzysztof Kozlowski pcie0_default_state: pcie0-default-state { 5342f7636174SKrzysztof Kozlowski perst-pins { 534313e948a3SKonrad Dybcio pins = "gpio79"; 534413e948a3SKonrad Dybcio function = "gpio"; 534513e948a3SKonrad Dybcio drive-strength = <2>; 534613e948a3SKonrad Dybcio bias-pull-down; 534713e948a3SKonrad Dybcio }; 534813e948a3SKonrad Dybcio 5349f7636174SKrzysztof Kozlowski clkreq-pins { 535013e948a3SKonrad Dybcio pins = "gpio80"; 535113e948a3SKonrad Dybcio function = "pci_e0"; 535213e948a3SKonrad Dybcio drive-strength = <2>; 535313e948a3SKonrad Dybcio bias-pull-up; 535413e948a3SKonrad Dybcio }; 535513e948a3SKonrad Dybcio 5356f7636174SKrzysztof Kozlowski wake-pins { 535713e948a3SKonrad Dybcio pins = "gpio81"; 535813e948a3SKonrad Dybcio function = "gpio"; 535913e948a3SKonrad Dybcio drive-strength = <2>; 536013e948a3SKonrad Dybcio bias-pull-up; 536113e948a3SKonrad Dybcio }; 536213e948a3SKonrad Dybcio }; 536313e948a3SKonrad Dybcio 5364f7636174SKrzysztof Kozlowski pcie1_default_state: pcie1-default-state { 5365f7636174SKrzysztof Kozlowski perst-pins { 536613e948a3SKonrad Dybcio pins = "gpio82"; 536713e948a3SKonrad Dybcio function = "gpio"; 536813e948a3SKonrad Dybcio drive-strength = <2>; 536913e948a3SKonrad Dybcio bias-pull-down; 537013e948a3SKonrad Dybcio }; 537113e948a3SKonrad Dybcio 5372f7636174SKrzysztof Kozlowski clkreq-pins { 537313e948a3SKonrad Dybcio pins = "gpio83"; 537413e948a3SKonrad Dybcio function = "pci_e1"; 537513e948a3SKonrad Dybcio drive-strength = <2>; 537613e948a3SKonrad Dybcio bias-pull-up; 537713e948a3SKonrad Dybcio }; 537813e948a3SKonrad Dybcio 5379f7636174SKrzysztof Kozlowski wake-pins { 538013e948a3SKonrad Dybcio pins = "gpio84"; 538113e948a3SKonrad Dybcio function = "gpio"; 538213e948a3SKonrad Dybcio drive-strength = <2>; 538313e948a3SKonrad Dybcio bias-pull-up; 538413e948a3SKonrad Dybcio }; 538513e948a3SKonrad Dybcio }; 538613e948a3SKonrad Dybcio 5387f7636174SKrzysztof Kozlowski pcie2_default_state: pcie2-default-state { 5388f7636174SKrzysztof Kozlowski perst-pins { 538913e948a3SKonrad Dybcio pins = "gpio85"; 539013e948a3SKonrad Dybcio function = "gpio"; 539113e948a3SKonrad Dybcio drive-strength = <2>; 539213e948a3SKonrad Dybcio bias-pull-down; 539313e948a3SKonrad Dybcio }; 539413e948a3SKonrad Dybcio 5395f7636174SKrzysztof Kozlowski clkreq-pins { 539613e948a3SKonrad Dybcio pins = "gpio86"; 539713e948a3SKonrad Dybcio function = "pci_e2"; 539813e948a3SKonrad Dybcio drive-strength = <2>; 539913e948a3SKonrad Dybcio bias-pull-up; 540013e948a3SKonrad Dybcio }; 540113e948a3SKonrad Dybcio 5402f7636174SKrzysztof Kozlowski wake-pins { 540313e948a3SKonrad Dybcio pins = "gpio87"; 540413e948a3SKonrad Dybcio function = "gpio"; 540513e948a3SKonrad Dybcio drive-strength = <2>; 540613e948a3SKonrad Dybcio bias-pull-up; 540713e948a3SKonrad Dybcio }; 540813e948a3SKonrad Dybcio }; 540916951b49SBjorn Andersson }; 541016951b49SBjorn Andersson 5411a89441fcSJonathan Marek apps_smmu: iommu@15000000 { 54122438aba4SKrzysztof Kozlowski compatible = "qcom,sm8250-smmu-500", "qcom,smmu-500", "arm,mmu-500"; 5413a89441fcSJonathan Marek reg = <0 0x15000000 0 0x100000>; 5414a89441fcSJonathan Marek #iommu-cells = <2>; 5415a89441fcSJonathan Marek #global-interrupts = <2>; 5416a89441fcSJonathan Marek interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 5417a89441fcSJonathan Marek <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 5418a89441fcSJonathan Marek <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 5419a89441fcSJonathan Marek <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 5420a89441fcSJonathan Marek <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 5421a89441fcSJonathan Marek <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 5422a89441fcSJonathan Marek <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 5423a89441fcSJonathan Marek <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 5424a89441fcSJonathan Marek <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 5425a89441fcSJonathan Marek <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 5426a89441fcSJonathan Marek <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 5427a89441fcSJonathan Marek <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 5428a89441fcSJonathan Marek <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 5429a89441fcSJonathan Marek <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 5430a89441fcSJonathan Marek <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 5431a89441fcSJonathan Marek <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 5432a89441fcSJonathan Marek <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 5433a89441fcSJonathan Marek <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 5434a89441fcSJonathan Marek <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 5435a89441fcSJonathan Marek <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 5436a89441fcSJonathan Marek <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 5437a89441fcSJonathan Marek <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 5438a89441fcSJonathan Marek <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 5439a89441fcSJonathan Marek <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 5440a89441fcSJonathan Marek <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 5441a89441fcSJonathan Marek <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 5442a89441fcSJonathan Marek <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 5443a89441fcSJonathan Marek <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 5444a89441fcSJonathan Marek <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 5445a89441fcSJonathan Marek <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 5446a89441fcSJonathan Marek <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 5447a89441fcSJonathan Marek <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 5448a89441fcSJonathan Marek <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 5449a89441fcSJonathan Marek <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 5450a89441fcSJonathan Marek <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 5451a89441fcSJonathan Marek <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 5452a89441fcSJonathan Marek <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 5453a89441fcSJonathan Marek <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 5454a89441fcSJonathan Marek <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 5455a89441fcSJonathan Marek <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 5456a89441fcSJonathan Marek <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 5457a89441fcSJonathan Marek <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 5458a89441fcSJonathan Marek <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 5459a89441fcSJonathan Marek <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 5460a89441fcSJonathan Marek <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 5461a89441fcSJonathan Marek <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 5462a89441fcSJonathan Marek <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 5463a89441fcSJonathan Marek <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 5464a89441fcSJonathan Marek <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 5465a89441fcSJonathan Marek <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 5466a89441fcSJonathan Marek <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 5467a89441fcSJonathan Marek <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 5468a89441fcSJonathan Marek <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 5469a89441fcSJonathan Marek <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 5470a89441fcSJonathan Marek <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 5471a89441fcSJonathan Marek <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 5472a89441fcSJonathan Marek <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 5473a89441fcSJonathan Marek <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 5474a89441fcSJonathan Marek <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 5475a89441fcSJonathan Marek <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 5476a89441fcSJonathan Marek <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 5477a89441fcSJonathan Marek <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 5478a89441fcSJonathan Marek <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 5479a89441fcSJonathan Marek <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 5480a89441fcSJonathan Marek <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 5481a89441fcSJonathan Marek <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 5482a89441fcSJonathan Marek <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 5483a89441fcSJonathan Marek <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 5484a89441fcSJonathan Marek <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 5485a89441fcSJonathan Marek <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 5486a89441fcSJonathan Marek <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 5487a89441fcSJonathan Marek <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 5488a89441fcSJonathan Marek <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 5489a89441fcSJonathan Marek <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 5490a89441fcSJonathan Marek <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 5491a89441fcSJonathan Marek <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 5492a89441fcSJonathan Marek <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 5493a89441fcSJonathan Marek <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 5494a89441fcSJonathan Marek <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 5495a89441fcSJonathan Marek <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 5496a89441fcSJonathan Marek <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 5497a89441fcSJonathan Marek <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 5498a89441fcSJonathan Marek <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 5499a89441fcSJonathan Marek <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 5500a89441fcSJonathan Marek <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 5501a89441fcSJonathan Marek <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 5502a89441fcSJonathan Marek <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 5503a89441fcSJonathan Marek <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 5504a89441fcSJonathan Marek <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 5505a89441fcSJonathan Marek <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 5506a89441fcSJonathan Marek <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 5507a89441fcSJonathan Marek <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 5508a89441fcSJonathan Marek <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 5509a89441fcSJonathan Marek <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 5510a89441fcSJonathan Marek <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 5511a89441fcSJonathan Marek <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 5512a89441fcSJonathan Marek <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 5513a89441fcSJonathan Marek <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 55144cb19bd7SKonrad Dybcio dma-coherent; 5515a89441fcSJonathan Marek }; 5516a89441fcSJonathan Marek 551723a89037SBjorn Andersson adsp: remoteproc@17300000 { 551823a89037SBjorn Andersson compatible = "qcom,sm8250-adsp-pas"; 551923a89037SBjorn Andersson reg = <0 0x17300000 0 0x100>; 552023a89037SBjorn Andersson 552123a89037SBjorn Andersson interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 552223a89037SBjorn Andersson <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 552323a89037SBjorn Andersson <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 552423a89037SBjorn Andersson <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 552523a89037SBjorn Andersson <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 552623a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 552723a89037SBjorn Andersson "handover", "stop-ack"; 552823a89037SBjorn Andersson 552923a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 553023a89037SBjorn Andersson clock-names = "xo"; 553123a89037SBjorn Andersson 553234e2fd6aSRohit Agarwal power-domains = <&rpmhpd RPMHPD_LCX>, 553334e2fd6aSRohit Agarwal <&rpmhpd RPMHPD_LMX>; 5534b74ee2d7SSibi Sankar power-domain-names = "lcx", "lmx"; 553523a89037SBjorn Andersson 553623a89037SBjorn Andersson memory-region = <&adsp_mem>; 553723a89037SBjorn Andersson 5538b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 5539b74ee2d7SSibi Sankar 554023a89037SBjorn Andersson qcom,smem-states = <&smp2p_adsp_out 0>; 554123a89037SBjorn Andersson qcom,smem-state-names = "stop"; 554223a89037SBjorn Andersson 554323a89037SBjorn Andersson status = "disabled"; 554423a89037SBjorn Andersson 554523a89037SBjorn Andersson glink-edge { 554623a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 554723a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 554823a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 554923a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 555023a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 555123a89037SBjorn Andersson 555223a89037SBjorn Andersson label = "lpass"; 555323a89037SBjorn Andersson qcom,remote-pid = <2>; 555425695808SJonathan Marek 555563e10791SSrinivas Kandagatla apr { 555663e10791SSrinivas Kandagatla compatible = "qcom,apr-v2"; 555763e10791SSrinivas Kandagatla qcom,glink-channels = "apr_audio_svc"; 55582f114511SDavid Heidelberg qcom,domain = <APR_DOMAIN_ADSP>; 555963e10791SSrinivas Kandagatla #address-cells = <1>; 556063e10791SSrinivas Kandagatla #size-cells = <0>; 556163e10791SSrinivas Kandagatla 5562a22609bfSKrzysztof Kozlowski service@3 { 556363e10791SSrinivas Kandagatla reg = <APR_SVC_ADSP_CORE>; 556463e10791SSrinivas Kandagatla compatible = "qcom,q6core"; 556563e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 556663e10791SSrinivas Kandagatla }; 556763e10791SSrinivas Kandagatla 5568a22609bfSKrzysztof Kozlowski q6afe: service@4 { 556963e10791SSrinivas Kandagatla compatible = "qcom,q6afe"; 557063e10791SSrinivas Kandagatla reg = <APR_SVC_AFE>; 557163e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 557263e10791SSrinivas Kandagatla q6afedai: dais { 557363e10791SSrinivas Kandagatla compatible = "qcom,q6afe-dais"; 557463e10791SSrinivas Kandagatla #address-cells = <1>; 557563e10791SSrinivas Kandagatla #size-cells = <0>; 557663e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 557763e10791SSrinivas Kandagatla }; 557863e10791SSrinivas Kandagatla 5579e0b6c1ffSKrzysztof Kozlowski q6afecc: clock-controller { 558063e10791SSrinivas Kandagatla compatible = "qcom,q6afe-clocks"; 558163e10791SSrinivas Kandagatla #clock-cells = <2>; 558263e10791SSrinivas Kandagatla }; 558363e10791SSrinivas Kandagatla }; 558463e10791SSrinivas Kandagatla 5585a22609bfSKrzysztof Kozlowski q6asm: service@7 { 558663e10791SSrinivas Kandagatla compatible = "qcom,q6asm"; 558763e10791SSrinivas Kandagatla reg = <APR_SVC_ASM>; 558863e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 558963e10791SSrinivas Kandagatla q6asmdai: dais { 559063e10791SSrinivas Kandagatla compatible = "qcom,q6asm-dais"; 559163e10791SSrinivas Kandagatla #address-cells = <1>; 559263e10791SSrinivas Kandagatla #size-cells = <0>; 559363e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 559463e10791SSrinivas Kandagatla iommus = <&apps_smmu 0x1801 0x0>; 559563e10791SSrinivas Kandagatla }; 559663e10791SSrinivas Kandagatla }; 559763e10791SSrinivas Kandagatla 5598a22609bfSKrzysztof Kozlowski q6adm: service@8 { 559963e10791SSrinivas Kandagatla compatible = "qcom,q6adm"; 560063e10791SSrinivas Kandagatla reg = <APR_SVC_ADM>; 560163e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 560263e10791SSrinivas Kandagatla q6routing: routing { 560363e10791SSrinivas Kandagatla compatible = "qcom,q6adm-routing"; 560463e10791SSrinivas Kandagatla #sound-dai-cells = <0>; 560563e10791SSrinivas Kandagatla }; 560663e10791SSrinivas Kandagatla }; 560763e10791SSrinivas Kandagatla }; 560863e10791SSrinivas Kandagatla 560925695808SJonathan Marek fastrpc { 561025695808SJonathan Marek compatible = "qcom,fastrpc"; 561125695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 561225695808SJonathan Marek label = "adsp"; 56138c8ce95bSJeya R qcom,non-secure-domain; 561425695808SJonathan Marek #address-cells = <1>; 561525695808SJonathan Marek #size-cells = <0>; 561625695808SJonathan Marek 561725695808SJonathan Marek compute-cb@3 { 561825695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 561925695808SJonathan Marek reg = <3>; 562025695808SJonathan Marek iommus = <&apps_smmu 0x1803 0x0>; 562125695808SJonathan Marek }; 562225695808SJonathan Marek 562325695808SJonathan Marek compute-cb@4 { 562425695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 562525695808SJonathan Marek reg = <4>; 562625695808SJonathan Marek iommus = <&apps_smmu 0x1804 0x0>; 562725695808SJonathan Marek }; 562825695808SJonathan Marek 562925695808SJonathan Marek compute-cb@5 { 563025695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 563125695808SJonathan Marek reg = <5>; 563225695808SJonathan Marek iommus = <&apps_smmu 0x1805 0x0>; 563325695808SJonathan Marek }; 563425695808SJonathan Marek }; 563523a89037SBjorn Andersson }; 563623a89037SBjorn Andersson }; 563723a89037SBjorn Andersson 5638b9ec8cbcSJonathan Marek intc: interrupt-controller@17a00000 { 5639b9ec8cbcSJonathan Marek compatible = "arm,gic-v3"; 5640b9ec8cbcSJonathan Marek #interrupt-cells = <3>; 5641b9ec8cbcSJonathan Marek interrupt-controller; 5642b9ec8cbcSJonathan Marek reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 5643b9ec8cbcSJonathan Marek <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 5644b9ec8cbcSJonathan Marek interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 5645b9ec8cbcSJonathan Marek }; 5646b9ec8cbcSJonathan Marek 5647e0d9acceSDmitry Baryshkov watchdog@17c10000 { 5648e0d9acceSDmitry Baryshkov compatible = "qcom,apss-wdt-sm8250", "qcom,kpss-wdt"; 5649e0d9acceSDmitry Baryshkov reg = <0 0x17c10000 0 0x1000>; 5650e0d9acceSDmitry Baryshkov clocks = <&sleep_clk>; 5651a52f6d78SDouglas Anderson interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>; 5652e0d9acceSDmitry Baryshkov }; 5653e0d9acceSDmitry Baryshkov 5654b9ec8cbcSJonathan Marek timer@17c20000 { 5655458ebdbbSDavid Heidelberg #address-cells = <1>; 5656458ebdbbSDavid Heidelberg #size-cells = <1>; 5657458ebdbbSDavid Heidelberg ranges = <0 0 0 0x20000000>; 5658b9ec8cbcSJonathan Marek compatible = "arm,armv7-timer-mem"; 5659b9ec8cbcSJonathan Marek reg = <0x0 0x17c20000 0x0 0x1000>; 5660b9ec8cbcSJonathan Marek clock-frequency = <19200000>; 5661b9ec8cbcSJonathan Marek 5662b9ec8cbcSJonathan Marek frame@17c21000 { 5663b9ec8cbcSJonathan Marek frame-number = <0>; 5664b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 5665b9ec8cbcSJonathan Marek <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 5666458ebdbbSDavid Heidelberg reg = <0x17c21000 0x1000>, 5667458ebdbbSDavid Heidelberg <0x17c22000 0x1000>; 5668b9ec8cbcSJonathan Marek }; 5669b9ec8cbcSJonathan Marek 5670b9ec8cbcSJonathan Marek frame@17c23000 { 5671b9ec8cbcSJonathan Marek frame-number = <1>; 5672b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 5673458ebdbbSDavid Heidelberg reg = <0x17c23000 0x1000>; 5674b9ec8cbcSJonathan Marek status = "disabled"; 5675b9ec8cbcSJonathan Marek }; 5676b9ec8cbcSJonathan Marek 5677b9ec8cbcSJonathan Marek frame@17c25000 { 5678b9ec8cbcSJonathan Marek frame-number = <2>; 5679b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 5680458ebdbbSDavid Heidelberg reg = <0x17c25000 0x1000>; 5681b9ec8cbcSJonathan Marek status = "disabled"; 5682b9ec8cbcSJonathan Marek }; 5683b9ec8cbcSJonathan Marek 5684b9ec8cbcSJonathan Marek frame@17c27000 { 5685b9ec8cbcSJonathan Marek frame-number = <3>; 5686b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 5687458ebdbbSDavid Heidelberg reg = <0x17c27000 0x1000>; 5688b9ec8cbcSJonathan Marek status = "disabled"; 5689b9ec8cbcSJonathan Marek }; 5690b9ec8cbcSJonathan Marek 5691b9ec8cbcSJonathan Marek frame@17c29000 { 5692b9ec8cbcSJonathan Marek frame-number = <4>; 5693b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 5694458ebdbbSDavid Heidelberg reg = <0x17c29000 0x1000>; 5695b9ec8cbcSJonathan Marek status = "disabled"; 5696b9ec8cbcSJonathan Marek }; 5697b9ec8cbcSJonathan Marek 5698b9ec8cbcSJonathan Marek frame@17c2b000 { 5699b9ec8cbcSJonathan Marek frame-number = <5>; 5700b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 5701458ebdbbSDavid Heidelberg reg = <0x17c2b000 0x1000>; 5702b9ec8cbcSJonathan Marek status = "disabled"; 5703b9ec8cbcSJonathan Marek }; 5704b9ec8cbcSJonathan Marek 5705b9ec8cbcSJonathan Marek frame@17c2d000 { 5706b9ec8cbcSJonathan Marek frame-number = <6>; 5707b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 5708458ebdbbSDavid Heidelberg reg = <0x17c2d000 0x1000>; 5709b9ec8cbcSJonathan Marek status = "disabled"; 5710b9ec8cbcSJonathan Marek }; 5711b9ec8cbcSJonathan Marek }; 5712b9ec8cbcSJonathan Marek 571360378f1aSVenkata Narendra Kumar Gutta apps_rsc: rsc@18200000 { 571460378f1aSVenkata Narendra Kumar Gutta label = "apps_rsc"; 571560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,rpmh-rsc"; 571660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x18200000 0x0 0x10000>, 571760378f1aSVenkata Narendra Kumar Gutta <0x0 0x18210000 0x0 0x10000>, 571860378f1aSVenkata Narendra Kumar Gutta <0x0 0x18220000 0x0 0x10000>; 571960378f1aSVenkata Narendra Kumar Gutta reg-names = "drv-0", "drv-1", "drv-2"; 572060378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 572160378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 572260378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 572360378f1aSVenkata Narendra Kumar Gutta qcom,tcs-offset = <0xd00>; 572460378f1aSVenkata Narendra Kumar Gutta qcom,drv-id = <2>; 572560378f1aSVenkata Narendra Kumar Gutta qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 572660378f1aSVenkata Narendra Kumar Gutta <WAKE_TCS 3>, <CONTROL_TCS 1>; 57272ffa0ca4SMaulik Shah power-domains = <&CLUSTER_PD>; 572860378f1aSVenkata Narendra Kumar Gutta 572960378f1aSVenkata Narendra Kumar Gutta rpmhcc: clock-controller { 573060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,sm8250-rpmh-clk"; 573160378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 573260378f1aSVenkata Narendra Kumar Gutta clock-names = "xo"; 573360378f1aSVenkata Narendra Kumar Gutta clocks = <&xo_board>; 573460378f1aSVenkata Narendra Kumar Gutta }; 5735b6f78e27SBjorn Andersson 5736b6f78e27SBjorn Andersson rpmhpd: power-controller { 5737b6f78e27SBjorn Andersson compatible = "qcom,sm8250-rpmhpd"; 5738b6f78e27SBjorn Andersson #power-domain-cells = <1>; 5739b6f78e27SBjorn Andersson operating-points-v2 = <&rpmhpd_opp_table>; 5740b6f78e27SBjorn Andersson 5741b6f78e27SBjorn Andersson rpmhpd_opp_table: opp-table { 5742b6f78e27SBjorn Andersson compatible = "operating-points-v2"; 5743b6f78e27SBjorn Andersson 5744b6f78e27SBjorn Andersson rpmhpd_opp_ret: opp1 { 5745b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 5746b6f78e27SBjorn Andersson }; 5747b6f78e27SBjorn Andersson 5748b6f78e27SBjorn Andersson rpmhpd_opp_min_svs: opp2 { 5749b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 5750b6f78e27SBjorn Andersson }; 5751b6f78e27SBjorn Andersson 5752b6f78e27SBjorn Andersson rpmhpd_opp_low_svs: opp3 { 5753b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 5754b6f78e27SBjorn Andersson }; 5755b6f78e27SBjorn Andersson 5756b6f78e27SBjorn Andersson rpmhpd_opp_svs: opp4 { 5757b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 5758b6f78e27SBjorn Andersson }; 5759b6f78e27SBjorn Andersson 5760b6f78e27SBjorn Andersson rpmhpd_opp_svs_l1: opp5 { 5761b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 5762b6f78e27SBjorn Andersson }; 5763b6f78e27SBjorn Andersson 5764b6f78e27SBjorn Andersson rpmhpd_opp_nom: opp6 { 5765b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 5766b6f78e27SBjorn Andersson }; 5767b6f78e27SBjorn Andersson 5768b6f78e27SBjorn Andersson rpmhpd_opp_nom_l1: opp7 { 5769b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 5770b6f78e27SBjorn Andersson }; 5771b6f78e27SBjorn Andersson 5772b6f78e27SBjorn Andersson rpmhpd_opp_nom_l2: opp8 { 5773b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 5774b6f78e27SBjorn Andersson }; 5775b6f78e27SBjorn Andersson 5776b6f78e27SBjorn Andersson rpmhpd_opp_turbo: opp9 { 5777b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 5778b6f78e27SBjorn Andersson }; 5779b6f78e27SBjorn Andersson 5780b6f78e27SBjorn Andersson rpmhpd_opp_turbo_l1: opp10 { 5781b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 5782b6f78e27SBjorn Andersson }; 5783b6f78e27SBjorn Andersson }; 5784b6f78e27SBjorn Andersson }; 5785e7e41a20SJonathan Marek 5786fc0e7dd6SKrzysztof Kozlowski apps_bcm_voter: bcm-voter { 5787e7e41a20SJonathan Marek compatible = "qcom,bcm-voter"; 5788e7e41a20SJonathan Marek }; 578960378f1aSVenkata Narendra Kumar Gutta }; 579079a595bbSSibi Sankar 579177b53d65SGeorgi Djakov epss_l3: interconnect@18590000 { 5792a0289a10SBjorn Andersson compatible = "qcom,sm8250-epss-l3", "qcom,epss-l3"; 579379a595bbSSibi Sankar reg = <0 0x18590000 0 0x1000>; 579479a595bbSSibi Sankar 579579a595bbSSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 579679a595bbSSibi Sankar clock-names = "xo", "alternate"; 579779a595bbSSibi Sankar 57986d526ee4SKrzysztof Kozlowski #interconnect-cells = <1>; 579979a595bbSSibi Sankar }; 580002ae4a0eSBjorn Andersson 580102ae4a0eSBjorn Andersson cpufreq_hw: cpufreq@18591000 { 580202ae4a0eSBjorn Andersson compatible = "qcom,sm8250-cpufreq-epss", "qcom,cpufreq-epss"; 580302ae4a0eSBjorn Andersson reg = <0 0x18591000 0 0x1000>, 580402ae4a0eSBjorn Andersson <0 0x18592000 0 0x1000>, 580502ae4a0eSBjorn Andersson <0 0x18593000 0 0x1000>; 580602ae4a0eSBjorn Andersson reg-names = "freq-domain0", "freq-domain1", 580702ae4a0eSBjorn Andersson "freq-domain2"; 580802ae4a0eSBjorn Andersson 580902ae4a0eSBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 581002ae4a0eSBjorn Andersson clock-names = "xo", "alternate"; 5811ffd6cc92SVladimir Zapolskiy interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 5812ffd6cc92SVladimir Zapolskiy <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 5813ffd6cc92SVladimir Zapolskiy <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 5814ffd6cc92SVladimir Zapolskiy interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; 581502ae4a0eSBjorn Andersson #freq-domain-cells = <1>; 5816d78cb07dSManivannan Sadhasivam #clock-cells = <1>; 581702ae4a0eSBjorn Andersson }; 581860378f1aSVenkata Narendra Kumar Gutta }; 581960378f1aSVenkata Narendra Kumar Gutta 5820e5b8c082SKrzysztof Kozlowski sound: sound { 5821e5b8c082SKrzysztof Kozlowski }; 5822e5b8c082SKrzysztof Kozlowski 582360378f1aSVenkata Narendra Kumar Gutta timer { 582460378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-timer"; 582560378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 13 582660378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 582760378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 14 582860378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 582960378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 11 583060378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 583129a33495SSai Prakash Ranjan <GIC_PPI 10 583260378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 583360378f1aSVenkata Narendra Kumar Gutta }; 5834bac12f25SAmit Kucheria 5835bac12f25SAmit Kucheria thermal-zones { 5836bac12f25SAmit Kucheria cpu0-thermal { 5837bac12f25SAmit Kucheria polling-delay-passive = <250>; 5838bac12f25SAmit Kucheria polling-delay = <1000>; 5839bac12f25SAmit Kucheria 5840bac12f25SAmit Kucheria thermal-sensors = <&tsens0 1>; 5841bac12f25SAmit Kucheria 5842bac12f25SAmit Kucheria trips { 5843bac12f25SAmit Kucheria cpu0_alert0: trip-point0 { 5844bac12f25SAmit Kucheria temperature = <90000>; 5845bac12f25SAmit Kucheria hysteresis = <2000>; 5846bac12f25SAmit Kucheria type = "passive"; 5847bac12f25SAmit Kucheria }; 5848bac12f25SAmit Kucheria 5849bac12f25SAmit Kucheria cpu0_alert1: trip-point1 { 5850bac12f25SAmit Kucheria temperature = <95000>; 5851bac12f25SAmit Kucheria hysteresis = <2000>; 5852bac12f25SAmit Kucheria type = "passive"; 5853bac12f25SAmit Kucheria }; 5854bac12f25SAmit Kucheria 58551364acc3SKrzysztof Kozlowski cpu0_crit: cpu-crit { 5856bac12f25SAmit Kucheria temperature = <110000>; 5857bac12f25SAmit Kucheria hysteresis = <1000>; 5858bac12f25SAmit Kucheria type = "critical"; 5859bac12f25SAmit Kucheria }; 5860bac12f25SAmit Kucheria }; 5861bac12f25SAmit Kucheria 5862bac12f25SAmit Kucheria cooling-maps { 5863bac12f25SAmit Kucheria map0 { 5864bac12f25SAmit Kucheria trip = <&cpu0_alert0>; 5865bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5866bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5867bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5868bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5869bac12f25SAmit Kucheria }; 5870bac12f25SAmit Kucheria map1 { 5871bac12f25SAmit Kucheria trip = <&cpu0_alert1>; 5872bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5873bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5874bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5875bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5876bac12f25SAmit Kucheria }; 5877bac12f25SAmit Kucheria }; 5878bac12f25SAmit Kucheria }; 5879bac12f25SAmit Kucheria 5880bac12f25SAmit Kucheria cpu1-thermal { 5881bac12f25SAmit Kucheria polling-delay-passive = <250>; 5882bac12f25SAmit Kucheria polling-delay = <1000>; 5883bac12f25SAmit Kucheria 5884bac12f25SAmit Kucheria thermal-sensors = <&tsens0 2>; 5885bac12f25SAmit Kucheria 5886bac12f25SAmit Kucheria trips { 5887bac12f25SAmit Kucheria cpu1_alert0: trip-point0 { 5888bac12f25SAmit Kucheria temperature = <90000>; 5889bac12f25SAmit Kucheria hysteresis = <2000>; 5890bac12f25SAmit Kucheria type = "passive"; 5891bac12f25SAmit Kucheria }; 5892bac12f25SAmit Kucheria 5893bac12f25SAmit Kucheria cpu1_alert1: trip-point1 { 5894bac12f25SAmit Kucheria temperature = <95000>; 5895bac12f25SAmit Kucheria hysteresis = <2000>; 5896bac12f25SAmit Kucheria type = "passive"; 5897bac12f25SAmit Kucheria }; 5898bac12f25SAmit Kucheria 58991364acc3SKrzysztof Kozlowski cpu1_crit: cpu-crit { 5900bac12f25SAmit Kucheria temperature = <110000>; 5901bac12f25SAmit Kucheria hysteresis = <1000>; 5902bac12f25SAmit Kucheria type = "critical"; 5903bac12f25SAmit Kucheria }; 5904bac12f25SAmit Kucheria }; 5905bac12f25SAmit Kucheria 5906bac12f25SAmit Kucheria cooling-maps { 5907bac12f25SAmit Kucheria map0 { 5908bac12f25SAmit Kucheria trip = <&cpu1_alert0>; 5909bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5910bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5911bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5912bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5913bac12f25SAmit Kucheria }; 5914bac12f25SAmit Kucheria map1 { 5915bac12f25SAmit Kucheria trip = <&cpu1_alert1>; 5916bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5917bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5918bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5919bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5920bac12f25SAmit Kucheria }; 5921bac12f25SAmit Kucheria }; 5922bac12f25SAmit Kucheria }; 5923bac12f25SAmit Kucheria 5924bac12f25SAmit Kucheria cpu2-thermal { 5925bac12f25SAmit Kucheria polling-delay-passive = <250>; 5926bac12f25SAmit Kucheria polling-delay = <1000>; 5927bac12f25SAmit Kucheria 5928bac12f25SAmit Kucheria thermal-sensors = <&tsens0 3>; 5929bac12f25SAmit Kucheria 5930bac12f25SAmit Kucheria trips { 5931bac12f25SAmit Kucheria cpu2_alert0: trip-point0 { 5932bac12f25SAmit Kucheria temperature = <90000>; 5933bac12f25SAmit Kucheria hysteresis = <2000>; 5934bac12f25SAmit Kucheria type = "passive"; 5935bac12f25SAmit Kucheria }; 5936bac12f25SAmit Kucheria 5937bac12f25SAmit Kucheria cpu2_alert1: trip-point1 { 5938bac12f25SAmit Kucheria temperature = <95000>; 5939bac12f25SAmit Kucheria hysteresis = <2000>; 5940bac12f25SAmit Kucheria type = "passive"; 5941bac12f25SAmit Kucheria }; 5942bac12f25SAmit Kucheria 59431364acc3SKrzysztof Kozlowski cpu2_crit: cpu-crit { 5944bac12f25SAmit Kucheria temperature = <110000>; 5945bac12f25SAmit Kucheria hysteresis = <1000>; 5946bac12f25SAmit Kucheria type = "critical"; 5947bac12f25SAmit Kucheria }; 5948bac12f25SAmit Kucheria }; 5949bac12f25SAmit Kucheria 5950bac12f25SAmit Kucheria cooling-maps { 5951bac12f25SAmit Kucheria map0 { 5952bac12f25SAmit Kucheria trip = <&cpu2_alert0>; 5953bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5954bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5955bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5956bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5957bac12f25SAmit Kucheria }; 5958bac12f25SAmit Kucheria map1 { 5959bac12f25SAmit Kucheria trip = <&cpu2_alert1>; 5960bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5961bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5962bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5963bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5964bac12f25SAmit Kucheria }; 5965bac12f25SAmit Kucheria }; 5966bac12f25SAmit Kucheria }; 5967bac12f25SAmit Kucheria 5968bac12f25SAmit Kucheria cpu3-thermal { 5969bac12f25SAmit Kucheria polling-delay-passive = <250>; 5970bac12f25SAmit Kucheria polling-delay = <1000>; 5971bac12f25SAmit Kucheria 5972bac12f25SAmit Kucheria thermal-sensors = <&tsens0 4>; 5973bac12f25SAmit Kucheria 5974bac12f25SAmit Kucheria trips { 5975bac12f25SAmit Kucheria cpu3_alert0: trip-point0 { 5976bac12f25SAmit Kucheria temperature = <90000>; 5977bac12f25SAmit Kucheria hysteresis = <2000>; 5978bac12f25SAmit Kucheria type = "passive"; 5979bac12f25SAmit Kucheria }; 5980bac12f25SAmit Kucheria 5981bac12f25SAmit Kucheria cpu3_alert1: trip-point1 { 5982bac12f25SAmit Kucheria temperature = <95000>; 5983bac12f25SAmit Kucheria hysteresis = <2000>; 5984bac12f25SAmit Kucheria type = "passive"; 5985bac12f25SAmit Kucheria }; 5986bac12f25SAmit Kucheria 59871364acc3SKrzysztof Kozlowski cpu3_crit: cpu-crit { 5988bac12f25SAmit Kucheria temperature = <110000>; 5989bac12f25SAmit Kucheria hysteresis = <1000>; 5990bac12f25SAmit Kucheria type = "critical"; 5991bac12f25SAmit Kucheria }; 5992bac12f25SAmit Kucheria }; 5993bac12f25SAmit Kucheria 5994bac12f25SAmit Kucheria cooling-maps { 5995bac12f25SAmit Kucheria map0 { 5996bac12f25SAmit Kucheria trip = <&cpu3_alert0>; 5997bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5998bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5999bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6000bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6001bac12f25SAmit Kucheria }; 6002bac12f25SAmit Kucheria map1 { 6003bac12f25SAmit Kucheria trip = <&cpu3_alert1>; 6004bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6005bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6006bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6007bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6008bac12f25SAmit Kucheria }; 6009bac12f25SAmit Kucheria }; 6010bac12f25SAmit Kucheria }; 6011bac12f25SAmit Kucheria 6012bac12f25SAmit Kucheria cpu4-top-thermal { 6013bac12f25SAmit Kucheria polling-delay-passive = <250>; 6014bac12f25SAmit Kucheria polling-delay = <1000>; 6015bac12f25SAmit Kucheria 6016bac12f25SAmit Kucheria thermal-sensors = <&tsens0 7>; 6017bac12f25SAmit Kucheria 6018bac12f25SAmit Kucheria trips { 6019bac12f25SAmit Kucheria cpu4_top_alert0: trip-point0 { 6020bac12f25SAmit Kucheria temperature = <90000>; 6021bac12f25SAmit Kucheria hysteresis = <2000>; 6022bac12f25SAmit Kucheria type = "passive"; 6023bac12f25SAmit Kucheria }; 6024bac12f25SAmit Kucheria 6025bac12f25SAmit Kucheria cpu4_top_alert1: trip-point1 { 6026bac12f25SAmit Kucheria temperature = <95000>; 6027bac12f25SAmit Kucheria hysteresis = <2000>; 6028bac12f25SAmit Kucheria type = "passive"; 6029bac12f25SAmit Kucheria }; 6030bac12f25SAmit Kucheria 60311364acc3SKrzysztof Kozlowski cpu4_top_crit: cpu-crit { 6032bac12f25SAmit Kucheria temperature = <110000>; 6033bac12f25SAmit Kucheria hysteresis = <1000>; 6034bac12f25SAmit Kucheria type = "critical"; 6035bac12f25SAmit Kucheria }; 6036bac12f25SAmit Kucheria }; 6037bac12f25SAmit Kucheria 6038bac12f25SAmit Kucheria cooling-maps { 6039bac12f25SAmit Kucheria map0 { 6040bac12f25SAmit Kucheria trip = <&cpu4_top_alert0>; 6041bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6042bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6043bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6044bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6045bac12f25SAmit Kucheria }; 6046bac12f25SAmit Kucheria map1 { 6047bac12f25SAmit Kucheria trip = <&cpu4_top_alert1>; 6048bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6049bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6050bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6051bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6052bac12f25SAmit Kucheria }; 6053bac12f25SAmit Kucheria }; 6054bac12f25SAmit Kucheria }; 6055bac12f25SAmit Kucheria 6056bac12f25SAmit Kucheria cpu5-top-thermal { 6057bac12f25SAmit Kucheria polling-delay-passive = <250>; 6058bac12f25SAmit Kucheria polling-delay = <1000>; 6059bac12f25SAmit Kucheria 6060bac12f25SAmit Kucheria thermal-sensors = <&tsens0 8>; 6061bac12f25SAmit Kucheria 6062bac12f25SAmit Kucheria trips { 6063bac12f25SAmit Kucheria cpu5_top_alert0: trip-point0 { 6064bac12f25SAmit Kucheria temperature = <90000>; 6065bac12f25SAmit Kucheria hysteresis = <2000>; 6066bac12f25SAmit Kucheria type = "passive"; 6067bac12f25SAmit Kucheria }; 6068bac12f25SAmit Kucheria 6069bac12f25SAmit Kucheria cpu5_top_alert1: trip-point1 { 6070bac12f25SAmit Kucheria temperature = <95000>; 6071bac12f25SAmit Kucheria hysteresis = <2000>; 6072bac12f25SAmit Kucheria type = "passive"; 6073bac12f25SAmit Kucheria }; 6074bac12f25SAmit Kucheria 60751364acc3SKrzysztof Kozlowski cpu5_top_crit: cpu-crit { 6076bac12f25SAmit Kucheria temperature = <110000>; 6077bac12f25SAmit Kucheria hysteresis = <1000>; 6078bac12f25SAmit Kucheria type = "critical"; 6079bac12f25SAmit Kucheria }; 6080bac12f25SAmit Kucheria }; 6081bac12f25SAmit Kucheria 6082bac12f25SAmit Kucheria cooling-maps { 6083bac12f25SAmit Kucheria map0 { 6084bac12f25SAmit Kucheria trip = <&cpu5_top_alert0>; 6085bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6086bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6087bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6088bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6089bac12f25SAmit Kucheria }; 6090bac12f25SAmit Kucheria map1 { 6091bac12f25SAmit Kucheria trip = <&cpu5_top_alert1>; 6092bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6093bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6094bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6095bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6096bac12f25SAmit Kucheria }; 6097bac12f25SAmit Kucheria }; 6098bac12f25SAmit Kucheria }; 6099bac12f25SAmit Kucheria 6100bac12f25SAmit Kucheria cpu6-top-thermal { 6101bac12f25SAmit Kucheria polling-delay-passive = <250>; 6102bac12f25SAmit Kucheria polling-delay = <1000>; 6103bac12f25SAmit Kucheria 6104bac12f25SAmit Kucheria thermal-sensors = <&tsens0 9>; 6105bac12f25SAmit Kucheria 6106bac12f25SAmit Kucheria trips { 6107bac12f25SAmit Kucheria cpu6_top_alert0: trip-point0 { 6108bac12f25SAmit Kucheria temperature = <90000>; 6109bac12f25SAmit Kucheria hysteresis = <2000>; 6110bac12f25SAmit Kucheria type = "passive"; 6111bac12f25SAmit Kucheria }; 6112bac12f25SAmit Kucheria 6113bac12f25SAmit Kucheria cpu6_top_alert1: trip-point1 { 6114bac12f25SAmit Kucheria temperature = <95000>; 6115bac12f25SAmit Kucheria hysteresis = <2000>; 6116bac12f25SAmit Kucheria type = "passive"; 6117bac12f25SAmit Kucheria }; 6118bac12f25SAmit Kucheria 61191364acc3SKrzysztof Kozlowski cpu6_top_crit: cpu-crit { 6120bac12f25SAmit Kucheria temperature = <110000>; 6121bac12f25SAmit Kucheria hysteresis = <1000>; 6122bac12f25SAmit Kucheria type = "critical"; 6123bac12f25SAmit Kucheria }; 6124bac12f25SAmit Kucheria }; 6125bac12f25SAmit Kucheria 6126bac12f25SAmit Kucheria cooling-maps { 6127bac12f25SAmit Kucheria map0 { 6128bac12f25SAmit Kucheria trip = <&cpu6_top_alert0>; 6129bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6130bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6131bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6132bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6133bac12f25SAmit Kucheria }; 6134bac12f25SAmit Kucheria map1 { 6135bac12f25SAmit Kucheria trip = <&cpu6_top_alert1>; 6136bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6137bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6138bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6139bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6140bac12f25SAmit Kucheria }; 6141bac12f25SAmit Kucheria }; 6142bac12f25SAmit Kucheria }; 6143bac12f25SAmit Kucheria 6144bac12f25SAmit Kucheria cpu7-top-thermal { 6145bac12f25SAmit Kucheria polling-delay-passive = <250>; 6146bac12f25SAmit Kucheria polling-delay = <1000>; 6147bac12f25SAmit Kucheria 6148bac12f25SAmit Kucheria thermal-sensors = <&tsens0 10>; 6149bac12f25SAmit Kucheria 6150bac12f25SAmit Kucheria trips { 6151bac12f25SAmit Kucheria cpu7_top_alert0: trip-point0 { 6152bac12f25SAmit Kucheria temperature = <90000>; 6153bac12f25SAmit Kucheria hysteresis = <2000>; 6154bac12f25SAmit Kucheria type = "passive"; 6155bac12f25SAmit Kucheria }; 6156bac12f25SAmit Kucheria 6157bac12f25SAmit Kucheria cpu7_top_alert1: trip-point1 { 6158bac12f25SAmit Kucheria temperature = <95000>; 6159bac12f25SAmit Kucheria hysteresis = <2000>; 6160bac12f25SAmit Kucheria type = "passive"; 6161bac12f25SAmit Kucheria }; 6162bac12f25SAmit Kucheria 61631364acc3SKrzysztof Kozlowski cpu7_top_crit: cpu-crit { 6164bac12f25SAmit Kucheria temperature = <110000>; 6165bac12f25SAmit Kucheria hysteresis = <1000>; 6166bac12f25SAmit Kucheria type = "critical"; 6167bac12f25SAmit Kucheria }; 6168bac12f25SAmit Kucheria }; 6169bac12f25SAmit Kucheria 6170bac12f25SAmit Kucheria cooling-maps { 6171bac12f25SAmit Kucheria map0 { 6172bac12f25SAmit Kucheria trip = <&cpu7_top_alert0>; 6173bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6174bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6175bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6176bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6177bac12f25SAmit Kucheria }; 6178bac12f25SAmit Kucheria map1 { 6179bac12f25SAmit Kucheria trip = <&cpu7_top_alert1>; 6180bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6181bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6182bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6183bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6184bac12f25SAmit Kucheria }; 6185bac12f25SAmit Kucheria }; 6186bac12f25SAmit Kucheria }; 6187bac12f25SAmit Kucheria 6188bac12f25SAmit Kucheria cpu4-bottom-thermal { 6189bac12f25SAmit Kucheria polling-delay-passive = <250>; 6190bac12f25SAmit Kucheria polling-delay = <1000>; 6191bac12f25SAmit Kucheria 6192bac12f25SAmit Kucheria thermal-sensors = <&tsens0 11>; 6193bac12f25SAmit Kucheria 6194bac12f25SAmit Kucheria trips { 6195bac12f25SAmit Kucheria cpu4_bottom_alert0: trip-point0 { 6196bac12f25SAmit Kucheria temperature = <90000>; 6197bac12f25SAmit Kucheria hysteresis = <2000>; 6198bac12f25SAmit Kucheria type = "passive"; 6199bac12f25SAmit Kucheria }; 6200bac12f25SAmit Kucheria 6201bac12f25SAmit Kucheria cpu4_bottom_alert1: trip-point1 { 6202bac12f25SAmit Kucheria temperature = <95000>; 6203bac12f25SAmit Kucheria hysteresis = <2000>; 6204bac12f25SAmit Kucheria type = "passive"; 6205bac12f25SAmit Kucheria }; 6206bac12f25SAmit Kucheria 62071364acc3SKrzysztof Kozlowski cpu4_bottom_crit: cpu-crit { 6208bac12f25SAmit Kucheria temperature = <110000>; 6209bac12f25SAmit Kucheria hysteresis = <1000>; 6210bac12f25SAmit Kucheria type = "critical"; 6211bac12f25SAmit Kucheria }; 6212bac12f25SAmit Kucheria }; 6213bac12f25SAmit Kucheria 6214bac12f25SAmit Kucheria cooling-maps { 6215bac12f25SAmit Kucheria map0 { 6216bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert0>; 6217bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6218bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6219bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6220bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6221bac12f25SAmit Kucheria }; 6222bac12f25SAmit Kucheria map1 { 6223bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert1>; 6224bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6225bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6226bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6227bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6228bac12f25SAmit Kucheria }; 6229bac12f25SAmit Kucheria }; 6230bac12f25SAmit Kucheria }; 6231bac12f25SAmit Kucheria 6232bac12f25SAmit Kucheria cpu5-bottom-thermal { 6233bac12f25SAmit Kucheria polling-delay-passive = <250>; 6234bac12f25SAmit Kucheria polling-delay = <1000>; 6235bac12f25SAmit Kucheria 6236bac12f25SAmit Kucheria thermal-sensors = <&tsens0 12>; 6237bac12f25SAmit Kucheria 6238bac12f25SAmit Kucheria trips { 6239bac12f25SAmit Kucheria cpu5_bottom_alert0: trip-point0 { 6240bac12f25SAmit Kucheria temperature = <90000>; 6241bac12f25SAmit Kucheria hysteresis = <2000>; 6242bac12f25SAmit Kucheria type = "passive"; 6243bac12f25SAmit Kucheria }; 6244bac12f25SAmit Kucheria 6245bac12f25SAmit Kucheria cpu5_bottom_alert1: trip-point1 { 6246bac12f25SAmit Kucheria temperature = <95000>; 6247bac12f25SAmit Kucheria hysteresis = <2000>; 6248bac12f25SAmit Kucheria type = "passive"; 6249bac12f25SAmit Kucheria }; 6250bac12f25SAmit Kucheria 62511364acc3SKrzysztof Kozlowski cpu5_bottom_crit: cpu-crit { 6252bac12f25SAmit Kucheria temperature = <110000>; 6253bac12f25SAmit Kucheria hysteresis = <1000>; 6254bac12f25SAmit Kucheria type = "critical"; 6255bac12f25SAmit Kucheria }; 6256bac12f25SAmit Kucheria }; 6257bac12f25SAmit Kucheria 6258bac12f25SAmit Kucheria cooling-maps { 6259bac12f25SAmit Kucheria map0 { 6260bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert0>; 6261bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6262bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6263bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6264bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6265bac12f25SAmit Kucheria }; 6266bac12f25SAmit Kucheria map1 { 6267bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert1>; 6268bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6269bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6270bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6271bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6272bac12f25SAmit Kucheria }; 6273bac12f25SAmit Kucheria }; 6274bac12f25SAmit Kucheria }; 6275bac12f25SAmit Kucheria 6276bac12f25SAmit Kucheria cpu6-bottom-thermal { 6277bac12f25SAmit Kucheria polling-delay-passive = <250>; 6278bac12f25SAmit Kucheria polling-delay = <1000>; 6279bac12f25SAmit Kucheria 6280bac12f25SAmit Kucheria thermal-sensors = <&tsens0 13>; 6281bac12f25SAmit Kucheria 6282bac12f25SAmit Kucheria trips { 6283bac12f25SAmit Kucheria cpu6_bottom_alert0: trip-point0 { 6284bac12f25SAmit Kucheria temperature = <90000>; 6285bac12f25SAmit Kucheria hysteresis = <2000>; 6286bac12f25SAmit Kucheria type = "passive"; 6287bac12f25SAmit Kucheria }; 6288bac12f25SAmit Kucheria 6289bac12f25SAmit Kucheria cpu6_bottom_alert1: trip-point1 { 6290bac12f25SAmit Kucheria temperature = <95000>; 6291bac12f25SAmit Kucheria hysteresis = <2000>; 6292bac12f25SAmit Kucheria type = "passive"; 6293bac12f25SAmit Kucheria }; 6294bac12f25SAmit Kucheria 62951364acc3SKrzysztof Kozlowski cpu6_bottom_crit: cpu-crit { 6296bac12f25SAmit Kucheria temperature = <110000>; 6297bac12f25SAmit Kucheria hysteresis = <1000>; 6298bac12f25SAmit Kucheria type = "critical"; 6299bac12f25SAmit Kucheria }; 6300bac12f25SAmit Kucheria }; 6301bac12f25SAmit Kucheria 6302bac12f25SAmit Kucheria cooling-maps { 6303bac12f25SAmit Kucheria map0 { 6304bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert0>; 6305bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6306bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6307bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6308bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6309bac12f25SAmit Kucheria }; 6310bac12f25SAmit Kucheria map1 { 6311bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert1>; 6312bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6313bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6314bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6315bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6316bac12f25SAmit Kucheria }; 6317bac12f25SAmit Kucheria }; 6318bac12f25SAmit Kucheria }; 6319bac12f25SAmit Kucheria 6320bac12f25SAmit Kucheria cpu7-bottom-thermal { 6321bac12f25SAmit Kucheria polling-delay-passive = <250>; 6322bac12f25SAmit Kucheria polling-delay = <1000>; 6323bac12f25SAmit Kucheria 6324bac12f25SAmit Kucheria thermal-sensors = <&tsens0 14>; 6325bac12f25SAmit Kucheria 6326bac12f25SAmit Kucheria trips { 6327bac12f25SAmit Kucheria cpu7_bottom_alert0: trip-point0 { 6328bac12f25SAmit Kucheria temperature = <90000>; 6329bac12f25SAmit Kucheria hysteresis = <2000>; 6330bac12f25SAmit Kucheria type = "passive"; 6331bac12f25SAmit Kucheria }; 6332bac12f25SAmit Kucheria 6333bac12f25SAmit Kucheria cpu7_bottom_alert1: trip-point1 { 6334bac12f25SAmit Kucheria temperature = <95000>; 6335bac12f25SAmit Kucheria hysteresis = <2000>; 6336bac12f25SAmit Kucheria type = "passive"; 6337bac12f25SAmit Kucheria }; 6338bac12f25SAmit Kucheria 63391364acc3SKrzysztof Kozlowski cpu7_bottom_crit: cpu-crit { 6340bac12f25SAmit Kucheria temperature = <110000>; 6341bac12f25SAmit Kucheria hysteresis = <1000>; 6342bac12f25SAmit Kucheria type = "critical"; 6343bac12f25SAmit Kucheria }; 6344bac12f25SAmit Kucheria }; 6345bac12f25SAmit Kucheria 6346bac12f25SAmit Kucheria cooling-maps { 6347bac12f25SAmit Kucheria map0 { 6348bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert0>; 6349bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6350bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6351bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6352bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6353bac12f25SAmit Kucheria }; 6354bac12f25SAmit Kucheria map1 { 6355bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert1>; 6356bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6357bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6358bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6359bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6360bac12f25SAmit Kucheria }; 6361bac12f25SAmit Kucheria }; 6362bac12f25SAmit Kucheria }; 6363bac12f25SAmit Kucheria 6364bac12f25SAmit Kucheria aoss0-thermal { 6365bac12f25SAmit Kucheria polling-delay-passive = <250>; 6366bac12f25SAmit Kucheria polling-delay = <1000>; 6367bac12f25SAmit Kucheria 6368bac12f25SAmit Kucheria thermal-sensors = <&tsens0 0>; 6369bac12f25SAmit Kucheria 6370bac12f25SAmit Kucheria trips { 6371bac12f25SAmit Kucheria aoss0_alert0: trip-point0 { 6372bac12f25SAmit Kucheria temperature = <90000>; 6373bac12f25SAmit Kucheria hysteresis = <2000>; 6374bac12f25SAmit Kucheria type = "hot"; 6375bac12f25SAmit Kucheria }; 6376bac12f25SAmit Kucheria }; 6377bac12f25SAmit Kucheria }; 6378bac12f25SAmit Kucheria 6379bac12f25SAmit Kucheria cluster0-thermal { 6380bac12f25SAmit Kucheria polling-delay-passive = <250>; 6381bac12f25SAmit Kucheria polling-delay = <1000>; 6382bac12f25SAmit Kucheria 6383bac12f25SAmit Kucheria thermal-sensors = <&tsens0 5>; 6384bac12f25SAmit Kucheria 6385bac12f25SAmit Kucheria trips { 6386bac12f25SAmit Kucheria cluster0_alert0: trip-point0 { 6387bac12f25SAmit Kucheria temperature = <90000>; 6388bac12f25SAmit Kucheria hysteresis = <2000>; 6389bac12f25SAmit Kucheria type = "hot"; 6390bac12f25SAmit Kucheria }; 6391bac12f25SAmit Kucheria cluster0_crit: cluster0_crit { 6392bac12f25SAmit Kucheria temperature = <110000>; 6393bac12f25SAmit Kucheria hysteresis = <2000>; 6394bac12f25SAmit Kucheria type = "critical"; 6395bac12f25SAmit Kucheria }; 6396bac12f25SAmit Kucheria }; 6397bac12f25SAmit Kucheria }; 6398bac12f25SAmit Kucheria 6399bac12f25SAmit Kucheria cluster1-thermal { 6400bac12f25SAmit Kucheria polling-delay-passive = <250>; 6401bac12f25SAmit Kucheria polling-delay = <1000>; 6402bac12f25SAmit Kucheria 6403bac12f25SAmit Kucheria thermal-sensors = <&tsens0 6>; 6404bac12f25SAmit Kucheria 6405bac12f25SAmit Kucheria trips { 6406bac12f25SAmit Kucheria cluster1_alert0: trip-point0 { 6407bac12f25SAmit Kucheria temperature = <90000>; 6408bac12f25SAmit Kucheria hysteresis = <2000>; 6409bac12f25SAmit Kucheria type = "hot"; 6410bac12f25SAmit Kucheria }; 6411bac12f25SAmit Kucheria cluster1_crit: cluster1_crit { 6412bac12f25SAmit Kucheria temperature = <110000>; 6413bac12f25SAmit Kucheria hysteresis = <2000>; 6414bac12f25SAmit Kucheria type = "critical"; 6415bac12f25SAmit Kucheria }; 6416bac12f25SAmit Kucheria }; 6417bac12f25SAmit Kucheria }; 6418bac12f25SAmit Kucheria 64197be1c395SDavid Heidelberg gpu-top-thermal { 6420bac12f25SAmit Kucheria polling-delay-passive = <250>; 6421bac12f25SAmit Kucheria polling-delay = <1000>; 6422bac12f25SAmit Kucheria 6423bac12f25SAmit Kucheria thermal-sensors = <&tsens0 15>; 6424bac12f25SAmit Kucheria 6425bac12f25SAmit Kucheria trips { 6426bac12f25SAmit Kucheria gpu1_alert0: trip-point0 { 6427bac12f25SAmit Kucheria temperature = <90000>; 6428bac12f25SAmit Kucheria hysteresis = <2000>; 6429bac12f25SAmit Kucheria type = "hot"; 6430bac12f25SAmit Kucheria }; 6431bac12f25SAmit Kucheria }; 6432bac12f25SAmit Kucheria }; 6433bac12f25SAmit Kucheria 6434bac12f25SAmit Kucheria aoss1-thermal { 6435bac12f25SAmit Kucheria polling-delay-passive = <250>; 6436bac12f25SAmit Kucheria polling-delay = <1000>; 6437bac12f25SAmit Kucheria 6438bac12f25SAmit Kucheria thermal-sensors = <&tsens1 0>; 6439bac12f25SAmit Kucheria 6440bac12f25SAmit Kucheria trips { 6441bac12f25SAmit Kucheria aoss1_alert0: trip-point0 { 6442bac12f25SAmit Kucheria temperature = <90000>; 6443bac12f25SAmit Kucheria hysteresis = <2000>; 6444bac12f25SAmit Kucheria type = "hot"; 6445bac12f25SAmit Kucheria }; 6446bac12f25SAmit Kucheria }; 6447bac12f25SAmit Kucheria }; 6448bac12f25SAmit Kucheria 6449bac12f25SAmit Kucheria wlan-thermal { 6450bac12f25SAmit Kucheria polling-delay-passive = <250>; 6451bac12f25SAmit Kucheria polling-delay = <1000>; 6452bac12f25SAmit Kucheria 6453bac12f25SAmit Kucheria thermal-sensors = <&tsens1 1>; 6454bac12f25SAmit Kucheria 6455bac12f25SAmit Kucheria trips { 6456bac12f25SAmit Kucheria wlan_alert0: trip-point0 { 6457bac12f25SAmit Kucheria temperature = <90000>; 6458bac12f25SAmit Kucheria hysteresis = <2000>; 6459bac12f25SAmit Kucheria type = "hot"; 6460bac12f25SAmit Kucheria }; 6461bac12f25SAmit Kucheria }; 6462bac12f25SAmit Kucheria }; 6463bac12f25SAmit Kucheria 6464bac12f25SAmit Kucheria video-thermal { 6465bac12f25SAmit Kucheria polling-delay-passive = <250>; 6466bac12f25SAmit Kucheria polling-delay = <1000>; 6467bac12f25SAmit Kucheria 6468bac12f25SAmit Kucheria thermal-sensors = <&tsens1 2>; 6469bac12f25SAmit Kucheria 6470bac12f25SAmit Kucheria trips { 6471bac12f25SAmit Kucheria video_alert0: trip-point0 { 6472bac12f25SAmit Kucheria temperature = <90000>; 6473bac12f25SAmit Kucheria hysteresis = <2000>; 6474bac12f25SAmit Kucheria type = "hot"; 6475bac12f25SAmit Kucheria }; 6476bac12f25SAmit Kucheria }; 6477bac12f25SAmit Kucheria }; 6478bac12f25SAmit Kucheria 6479bac12f25SAmit Kucheria mem-thermal { 6480bac12f25SAmit Kucheria polling-delay-passive = <250>; 6481bac12f25SAmit Kucheria polling-delay = <1000>; 6482bac12f25SAmit Kucheria 6483bac12f25SAmit Kucheria thermal-sensors = <&tsens1 3>; 6484bac12f25SAmit Kucheria 6485bac12f25SAmit Kucheria trips { 6486bac12f25SAmit Kucheria mem_alert0: trip-point0 { 6487bac12f25SAmit Kucheria temperature = <90000>; 6488bac12f25SAmit Kucheria hysteresis = <2000>; 6489bac12f25SAmit Kucheria type = "hot"; 6490bac12f25SAmit Kucheria }; 6491bac12f25SAmit Kucheria }; 6492bac12f25SAmit Kucheria }; 6493bac12f25SAmit Kucheria 6494bac12f25SAmit Kucheria q6-hvx-thermal { 6495bac12f25SAmit Kucheria polling-delay-passive = <250>; 6496bac12f25SAmit Kucheria polling-delay = <1000>; 6497bac12f25SAmit Kucheria 6498bac12f25SAmit Kucheria thermal-sensors = <&tsens1 4>; 6499bac12f25SAmit Kucheria 6500bac12f25SAmit Kucheria trips { 6501bac12f25SAmit Kucheria q6_hvx_alert0: trip-point0 { 6502bac12f25SAmit Kucheria temperature = <90000>; 6503bac12f25SAmit Kucheria hysteresis = <2000>; 6504bac12f25SAmit Kucheria type = "hot"; 6505bac12f25SAmit Kucheria }; 6506bac12f25SAmit Kucheria }; 6507bac12f25SAmit Kucheria }; 6508bac12f25SAmit Kucheria 6509bac12f25SAmit Kucheria camera-thermal { 6510bac12f25SAmit Kucheria polling-delay-passive = <250>; 6511bac12f25SAmit Kucheria polling-delay = <1000>; 6512bac12f25SAmit Kucheria 6513bac12f25SAmit Kucheria thermal-sensors = <&tsens1 5>; 6514bac12f25SAmit Kucheria 6515bac12f25SAmit Kucheria trips { 6516bac12f25SAmit Kucheria camera_alert0: trip-point0 { 6517bac12f25SAmit Kucheria temperature = <90000>; 6518bac12f25SAmit Kucheria hysteresis = <2000>; 6519bac12f25SAmit Kucheria type = "hot"; 6520bac12f25SAmit Kucheria }; 6521bac12f25SAmit Kucheria }; 6522bac12f25SAmit Kucheria }; 6523bac12f25SAmit Kucheria 6524bac12f25SAmit Kucheria compute-thermal { 6525bac12f25SAmit Kucheria polling-delay-passive = <250>; 6526bac12f25SAmit Kucheria polling-delay = <1000>; 6527bac12f25SAmit Kucheria 6528bac12f25SAmit Kucheria thermal-sensors = <&tsens1 6>; 6529bac12f25SAmit Kucheria 6530bac12f25SAmit Kucheria trips { 6531bac12f25SAmit Kucheria compute_alert0: trip-point0 { 6532bac12f25SAmit Kucheria temperature = <90000>; 6533bac12f25SAmit Kucheria hysteresis = <2000>; 6534bac12f25SAmit Kucheria type = "hot"; 6535bac12f25SAmit Kucheria }; 6536bac12f25SAmit Kucheria }; 6537bac12f25SAmit Kucheria }; 6538bac12f25SAmit Kucheria 6539bac12f25SAmit Kucheria npu-thermal { 6540bac12f25SAmit Kucheria polling-delay-passive = <250>; 6541bac12f25SAmit Kucheria polling-delay = <1000>; 6542bac12f25SAmit Kucheria 6543bac12f25SAmit Kucheria thermal-sensors = <&tsens1 7>; 6544bac12f25SAmit Kucheria 6545bac12f25SAmit Kucheria trips { 6546bac12f25SAmit Kucheria npu_alert0: trip-point0 { 6547bac12f25SAmit Kucheria temperature = <90000>; 6548bac12f25SAmit Kucheria hysteresis = <2000>; 6549bac12f25SAmit Kucheria type = "hot"; 6550bac12f25SAmit Kucheria }; 6551bac12f25SAmit Kucheria }; 6552bac12f25SAmit Kucheria }; 6553bac12f25SAmit Kucheria 65547be1c395SDavid Heidelberg gpu-bottom-thermal { 6555bac12f25SAmit Kucheria polling-delay-passive = <250>; 6556bac12f25SAmit Kucheria polling-delay = <1000>; 6557bac12f25SAmit Kucheria 6558bac12f25SAmit Kucheria thermal-sensors = <&tsens1 8>; 6559bac12f25SAmit Kucheria 6560bac12f25SAmit Kucheria trips { 6561bac12f25SAmit Kucheria gpu2_alert0: trip-point0 { 6562bac12f25SAmit Kucheria temperature = <90000>; 6563bac12f25SAmit Kucheria hysteresis = <2000>; 6564bac12f25SAmit Kucheria type = "hot"; 6565bac12f25SAmit Kucheria }; 6566bac12f25SAmit Kucheria }; 6567bac12f25SAmit Kucheria }; 6568bac12f25SAmit Kucheria }; 656960378f1aSVenkata Narendra Kumar Gutta}; 6570