arm64: dts: qcom: sdm670: fix USB SS wakeup

commit 047b2edc35b8db22354b4fba37818b548fc18896 upstream.

The USB SS PHY interrupt needs to be provided by the PDC interrupt
controller in order to be ab

arm64: dts: qcom: sdm670: fix USB SS wakeup

commit 047b2edc35b8db22354b4fba37818b548fc18896 upstream.

The USB SS PHY interrupt needs to be provided by the PDC interrupt
controller in order to be able to wake the system up from low-power
states.

Fixes: 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Cc: stable@vger.kernel.org # 6.2
Cc: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20231214074319.11023-3-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

show more ...

arm64: dts: qcom: sdm670: fix USB DP/DM HS PHY interrupts

commit c42d12ea105f67b0f137f1e52d5c59d13fe12b1f upstream.

The USB DP/DM HS PHY interrupts need to be provided by the PDC interrupt
controll

arm64: dts: qcom: sdm670: fix USB DP/DM HS PHY interrupts

commit c42d12ea105f67b0f137f1e52d5c59d13fe12b1f upstream.

The USB DP/DM HS PHY interrupts need to be provided by the PDC interrupt
controller in order to be able to wake the system up from low-power
states and to be able to detect disconnect events, which requires
triggering on falling edges.

A recent commit updated the trigger type but failed to change the
interrupt provider as required. This leads to the current Linux driver
failing to probe instead of printing an error during suspend and USB
wakeup not working as intended.

Fixes: de3b3de30999 ("arm64: dts: qcom: sdm670: fix USB wakeup interrupt types")
Fixes: 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Cc: stable@vger.kernel.org # 6.2
Cc: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20231214074319.11023-2-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

show more ...

arm64: dts: qcom: sdm670: fix USB wakeup interrupt types

commit de3b3de30999106549da4df88a7963d0ac02b91e upstream.

The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depend

arm64: dts: qcom: sdm670: fix USB wakeup interrupt types

commit de3b3de30999106549da4df88a7963d0ac02b91e upstream.

The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.

Fixes: 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Cc: stable@vger.kernel.org # 6.2
Cc: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Acked-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20231120164331.8116-8-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

show more ...

arm64: dts: qcom: sdm670: Fix pdc mapping

[ Upstream commit ad75cda991f7b335d3b2417f82db07680f92648a ]

As pointed out by Richard, I missed a non-continuity in one of the ranges.
Fix it.

Reported-b

arm64: dts: qcom: sdm670: Fix pdc mapping

[ Upstream commit ad75cda991f7b335d3b2417f82db07680f92648a ]

As pointed out by Richard, I missed a non-continuity in one of the ranges.
Fix it.

Reported-by: Richard Acayan <mailingradian@gmail.com>
Fixes: b51ee205dc4f ("arm64: dts: qcom: sdm670: Add PDC")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20230818-topic-670_pdc_fix-v1-1-1ba025041de7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

show more ...

arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM

Some TLMM pins are wakeup-capable. Describe the relationship between
these two peripherals to enable this functionality.

Signed-off-by

arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM

Some TLMM pins are wakeup-capable. Describe the relationship between
these two peripherals to enable this functionality.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811-topic-tlmm_wakeup-v1-5-5616a7da1fff@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

show more ...

arm64: dts: qcom: sdm670: Add PDC

Add support for the PDC to enable deep sleep wakeup from external sources.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/

arm64: dts: qcom: sdm670: Add PDC

Add support for the PDC to enable deep sleep wakeup from external sources.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811-topic-tlmm_wakeup-v1-2-5616a7da1fff@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

show more ...

arm64: dts: qcom: sdm670: add frequency profile

Add the coefficients for the CPU frequencies to aid in frequency
scaling.

Profiling setup:
- freqbench (https://github.com/kdrag0n/freqbench)
- Lin

arm64: dts: qcom: sdm670: add frequency profile

Add the coefficients for the CPU frequencies to aid in frequency
scaling.

Profiling setup:
- freqbench (https://github.com/kdrag0n/freqbench)
- LineageOS kernel, android_kernel_google_msm-4.9
- recommended configuration options by freqbench
- disabled options that require clang or 32-bit compilers
- mmc governor switched from simple_ondemand to powersave

Frequency domains: cpu1 cpu6
Offline CPUs: cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7
Sampling power every 1000 ms
Baseline power usage: 445 mW

===== CPU 1 =====
Frequencies: 300 576 748 998 1209 1324 1516 1612 1708

300: 1114 3.7 C/MHz 43 mW 11.6 J 25.8 I/mJ 269.4 s
576: 2138 3.7 C/MHz 51 mW 7.1 J 42.2 I/mJ 140.3 s
748: 2780 3.7 C/MHz 67 mW 7.3 J 41.3 I/mJ 107.9 s
998: 3706 3.7 C/MHz 73 mW 5.9 J 51.1 I/mJ 80.9 s
1209: 4490 3.7 C/MHz 86 mW 5.7 J 52.2 I/mJ 66.8 s
1324: 4918 3.7 C/MHz 90 mW 5.5 J 54.6 I/mJ 61.0 s
1516: 5631 3.7 C/MHz 103 mW 5.5 J 54.9 I/mJ 53.3 s
1612: 5987 3.7 C/MHz 109 mW 5.5 J 55.0 I/mJ 50.1 s
1708: 6344 3.7 C/MHz 126 mW 5.9 J 50.5 I/mJ 47.3 s

===== CPU 6 =====
Frequencies: 300 652 825 979 1132 1363 1536 1747 1843 1996

300: 1868 6.2 C/MHz 53 mW 8.5 J 35.2 I/mJ 160.6 s
652: 4073 6.2 C/MHz 96 mW 7.1 J 42.4 I/mJ 73.7 s
825: 5132 6.2 C/MHz 117 mW 6.9 J 43.7 I/mJ 58.5 s
979: 6099 6.2 C/MHz 151 mW 7.4 J 40.4 I/mJ 49.2 s
1132: 7071 6.2 C/MHz 207 mW 8.8 J 34.1 I/mJ 42.4 s
1363: 8482 6.2 C/MHz 235 mW 8.3 J 36.1 I/mJ 35.4 s
1536: 9578 6.2 C/MHz 287 mW 9.0 J 33.3 I/mJ 31.3 s
1747: 10892 6.2 C/MHz 340 mW 9.4 J 32.0 I/mJ 27.6 s
1843: 11471 6.2 C/MHz 368 mW 9.6 J 31.1 I/mJ 26.2 s
1996: 12425 6.2 C/MHz 438 mW 10.6 J 28.3 I/mJ 24.2 s

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20230802011548.387519-10-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

show more ...

arm64: dts: qcom: sdm670: add cpu frequency scaling

Add CPU frequency scaling, and also add the corresponding memory and
cache bandwidths for each frequency.

Signed-off-by: Richard Acayan <mailingr

arm64: dts: qcom: sdm670: add cpu frequency scaling

Add CPU frequency scaling, and also add the corresponding memory and
cache bandwidths for each frequency.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20230802011548.387519-9-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

show more ...

arm64: dts: qcom: sdm670: add osm l3

Add the interconnect node for L3 cache on SDM670.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

arm64: dts: qcom: sdm670: add osm l3

Add the interconnect node for L3 cache on SDM670.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230802011548.387519-8-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

show more ...

arm64: dts: qcom: sdm670: Flush RSC sleep & wake votes

The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associat

arm64: dts: qcom: sdm670: Flush RSC sleep & wake votes

The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.

Without this, only AMC votes are being commited.

Fixes: 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-5-b4a985f57b8b@linaro.org

show more ...

arm64: dts: qcom: add missing cache properties

Add required cache-level and cache-unified properties to fix warnings
like:

qdu1000-idp.dtb: l3-cache: 'cache-unified' is a required property
qdu1

arm64: dts: qcom: add missing cache properties

Add required cache-level and cache-unified properties to fix warnings
like:

qdu1000-idp.dtb: l3-cache: 'cache-unified' is a required property
qdu1000-idp.dtb: l2-cache: 'cache-level' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416101134.95686-3-krzysztof.kozlowski@linaro.org

show more ...

arm64: dts: qcom: fix indentation

Correct indentation to use only tabs.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Sig

arm64: dts: qcom: fix indentation

Correct indentation to use only tabs.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416101134.95686-1-krzysztof.kozlowski@linaro.org

show more ...

arm64: dts: qcom: sdm670: add opps for peripherals

The interconnects are now in place. Add Operating Performance Points for
them to allow the kernel to properly manage them.

Signed-off-by: Richard

arm64: dts: qcom: sdm670: add opps for peripherals

The interconnects are now in place. Add Operating Performance Points for
them to allow the kernel to properly manage them.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230201010020.84586-3-mailingradian@gmail.com

show more ...

arm64: dts: qcom: sdm670: add interconnects

The interconnects for Snapdragon 670 can be controlled. Add their
corresponding nodes in the device tree.

Signed-off-by: Richard Acayan <mailingradian@gm

arm64: dts: qcom: sdm670: add interconnects

The interconnects for Snapdragon 670 can be controlled. Add their
corresponding nodes in the device tree.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230201010020.84586-2-mailingradian@gmail.com

show more ...

arm64: dts: qcom: sdm670: add missing usb hstx nvmem cell

This nvmem cell is present on SDM670 as well as SDM845. Add it in SDM670
so there is proper tuning.

Signed-off-by: Richard Acayan <mailingr

arm64: dts: qcom: sdm670: add missing usb hstx nvmem cell

This nvmem cell is present on SDM670 as well as SDM845. Add it in SDM670
so there is proper tuning.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221206231729.164453-3-mailingradian@gmail.com

show more ...

arm64: dts: qcom: sdm670: add qfprom node

Some hardware quirks and capabilities can be determined by reading the
fuse-programmable read-only memory. Add the QFPROM node so consumers
know if they nee

arm64: dts: qcom: sdm670: add qfprom node

Some hardware quirks and capabilities can be determined by reading the
fuse-programmable read-only memory. Add the QFPROM node so consumers
know if they need to do anything extra to support the hardware.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221206231729.164453-2-mailingradian@gmail.com

show more ...

arm64: dts: qcom: add sdm670 and pixel 3a device trees

The Qualcomm Snapdragon 670 has been out for a while. Add a device tree
for it and the Google Pixel 3a as the first device.

The Pixel 3a has t

arm64: dts: qcom: add sdm670 and pixel 3a device trees

The Qualcomm Snapdragon 670 has been out for a while. Add a device tree
for it and the Google Pixel 3a as the first device.

The Pixel 3a has the same bootloader issue as the Pixel 3 and will not work
on Android 10 bootloaders or later until it gets fixed for the Pixel 3.

SoC Initial Features:
- power management
- clocks
- pinctrl
- eMMC
- USB 2.0
- GENI I2C
- IOMMU
- RPMh
- interrupts

Device-Specific Initial Features:
- side buttons (keys)
- regulators
- touchscreen

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111001818.124901-5-mailingradian@gmail.com

show more ...