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/openbmc/u-boot/arch/x86/cpu/quark/
H A Dhte.c14 #include "hte.h"
17 * Enable HTE to detect all possible errors for the given training parameters
22 msg_port_write(HTE, 0x000200a2, 0xffffffff); in hte_enable_all_errors()
23 msg_port_write(HTE, 0x000200a3, 0x000000ff); in hte_enable_all_errors()
24 msg_port_write(HTE, 0x000200a4, 0x00000000); in hte_enable_all_errors()
28 * Go and read the HTE register in order to find any error
30 * @return: The errors detected in the HTE status register
34 return msg_port_read(HTE, 0x000200a7); in hte_check_errors()
38 * Wait until HTE finishes
46 do {} while ((msg_port_read(HTE, 0x00020012) & (1 << 30)) != 0); in hte_wait_for_complete()
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H A DMakefile6 obj-y += mrc.o mrc_util.o hte.o smc.o
H A Dmrc_util.h47 #define HTE 0x11 macro
H A Dsmc.c16 #include "hte.h"
1329 * DRAM requests from the MEMORY_MANAGER or HTE.
1695 /* hte reconfiguration request */ in wr_level()
1890 /* request HTE reconfiguration */ in rd_train()
2028 /* request HTE reconfiguration */ in rd_train()
2188 /* request HTE reconfiguration */ in wr_train()
H A Dmrc_util.c16 #include "hte.h"
89 /* Select HTE as the source for PRI interface */
1104 /* select hte and request initial configuration */ in find_rising_edge()
/openbmc/linux/drivers/hte/
H A Dhte-tegra194-test.c10 #include <linux/hte.h>
19 * This sample HTE test driver demonstrates HTE API usage by enabling
29 * compatible = "nvidia,tegra194-hte-test";
34 * timestamp-names = "hte-gpio", "hte-i2c-irq";
41 * HTE for rising edge on gpio_in pin.
48 * - Unloading the driver disables and deallocate the HTE.
59 } hte; variable
84 gpiod_set_value(hte.gpio_out, !gpiod_get_value(hte.gpio_out)); in gpio_timer_cb()
85 mod_timer(&hte.timer, jiffies + msecs_to_jiffies(8000)); in gpio_timer_cb()
97 { .compatible = "nvidia,tegra194-hte-test"},
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H A DKconfig2 menuconfig HTE config
3 bool "Hardware Timestamping Engine (HTE) Support"
5 Hardware Timestamping Engine (HTE) Support.
10 less jitter. This framework provides a generic interface to such HTE
15 if HTE
18 tristate "NVIDIA Tegra194 HTE Support"
27 tristate "NVIDIA Tegra194 HTE Test"
30 The NVIDIA Tegra194 GTE test driver demonstrates how to use HTE
H A Dhte.c15 #include <linux/hte.h>
22 /* Global list of the HTE devices */
36 * @xlated_id: Timestamp ID as understood between HTE subsys and HTE provider,
41 * @line_name: HTE allocated line name.
51 * @gdev: HTE abstract device that this timestamp information belongs to.
73 * struct hte_device - HTE abstract device
79 * @chip: HTE chip providing this HTE device.
100 /* creates /sys/kernel/debug/hte/ */ in hte_subsys_dbgfs_init()
101 hte_root = debugfs_create_dir("hte", NULL); in hte_subsys_dbgfs_init()
482 * @dev: The HTE consumer.
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H A DMakefile1 obj-$(CONFIG_HTE) += hte.o
2 obj-$(CONFIG_HTE_TEGRA194) += hte-tegra194.o
3 obj-$(CONFIG_HTE_TEGRA194_TEST) += hte-tegra194-test.o
H A Dhte-tegra194.c16 #include <linux/hte.h>
23 /* HTE source clock TSC is 31.25MHz */
31 /* AON HTE line map For slice 1 */
35 /* AON HTE line map For slice 2 */
352 static inline u32 tegra_hte_readl(struct tegra_hte_soc *hte, u32 reg) in tegra_hte_readl() argument
354 return readl(hte->regs + reg); in tegra_hte_readl()
357 static inline void tegra_hte_writel(struct tegra_hte_soc *hte, u32 reg, in tegra_hte_writel() argument
360 writel(val, hte->regs + reg); in tegra_hte_writel()
418 * HTE/GTE namespace. in tegra_hte_line_xlate()
789 dev_err(gc->dev, "hte chip register failed"); in tegra_hte_probe()
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/openbmc/linux/Documentation/driver-api/hte/
H A Dhte.rst4 The Linux Hardware Timestamping Engine (HTE)
21 engine (HTE) framework. Both consumers and providers must include
22 ``#include <linux/hte.h>``.
24 The HTE framework APIs for the providers
27 .. kernel-doc:: drivers/hte/hte.c
30 The HTE framework APIs for the consumers
33 .. kernel-doc:: drivers/hte/hte.c
36 The HTE framework public structures
38 .. kernel-doc:: include/linux/hte.h
40 More on the HTE timestamp data
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H A Dtegra-hte.rst3 HTE Kernel provider driver
8 The Nvidia tegra HTE provider also known as GTE (Generic Timestamping Engine)
22 kernel space consumers can directly talk to HTE subsystem while userspace
23 consumers timestamp requests go through GPIOLIB CDEV framework to HTE
24 subsystem. The hte devicetree binding described at
37 This GTE instance timestamps LIC IRQ lines in real time. The hte devicetree
42 this GTE instance in the HTE framework.
45 ``drivers/hte/hte-tegra194.c``. The test driver
46 ``drivers/hte/hte-tegra194-test.c`` demonstrates HTE API usage for both IRQ
H A Dindex.rst4 The Linux Hardware Timestamping Engine (HTE)
7 The HTE Subsystem
13 hte
15 HTE Tegra Provider
21 tegra-hte
/openbmc/linux/include/linux/
H A Dhte.h13 * enum hte_edge - HTE line edge flags.
28 * enum hte_return - HTE subsystem return values used during callback.
32 * HTE subsystem calls secondary callback provided by the consumer where it
41 * struct hte_ts_data - HTE timestamp data.
55 * struct hte_clk_info - Clock source info that HTE provider uses to timestamp.
66 * typedef hte_ts_cb_t - HTE timestamp data processing primary callback.
77 * typedef hte_ts_sec_cb_t - HTE timestamp data processing secondary callback.
94 * hardware timestamping. If null, HTE core will construct the name.
105 * struct hte_ts_desc - HTE timestamp descriptor.
111 * @hte_data: Subsystem's private data, set by HTE subsystem.
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/openbmc/linux/Documentation/devicetree/bindings/timestamp/
H A Dhte-consumer.yaml4 $id: http://devicetree.org/schemas/timestamp/hte-consumer.yaml#
7 title: HTE Consumer
18 The list of HTE provider phandle. The first cell must represent the
21 HTE provider device tree binding document.
38 timestamp-names = "hte-gpio", "hte-i2c";
H A Dnvidia,tegra194-hte.yaml4 $id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
7 title: Tegra on chip generic hardware timestamping engine (HTE) provider
38 HTE device generates its interrupt based on this u32 FIFO threshold
47 HTE lines are arranged in 32 bit slice where each bit represents different
49 property and the value depends on the HTE instance in the chip. The AON
H A Dhardware-timestamps-common.yaml13 Some devices/SoCs have hardware timestamp engines (HTE) which can use
24 Number of cells in a HTE specifier.
/openbmc/linux/Documentation/driver-api/
H A Dindex.rst115 hte/index
/openbmc/linux/Documentation/translations/zh_CN/driver-api/
H A Dindex.rst125 * hte/index
/openbmc/linux/drivers/
H A DKconfig242 source "drivers/hte/Kconfig"
H A DMakefile197 obj-$(CONFIG_HTE) += hte/
/openbmc/u-boot/arch/x86/include/asm/arch-quark/
H A Dmrc.h139 uint32_t hte_setup; /* when set hte reconfiguration requested */
/openbmc/linux/drivers/gpio/
H A Dgpiolib-cdev.c16 #include <linux/hte.h>
486 * @hdesc: the Hardware Timestamp Engine (HTE) descriptor
550 * HTE provider sets line level at the time of event. The valid
555 * when sw_debounce is set on HTE enabled line, this is running
560 * when sw_debounce is set on HTE enabled line, this variable records
H A Dgpio-tegra186.c10 #include <linux/hte.h>
/openbmc/linux/drivers/infiniband/hw/irdma/
H A Dutils.c912 u8 hte = 0; in irdma_terminate_done() local
920 hte = 1; in irdma_terminate_done()
929 irdma_next_iw_state(iwqp, IRDMA_QP_STATE_ERROR, hte, 0, 0); in irdma_terminate_done()

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