1*59cc80a6SDipen Patel.. SPDX-License-Identifier: GPL-2.0+ 2*59cc80a6SDipen Patel 3*59cc80a6SDipen PatelHTE Kernel provider driver 4*59cc80a6SDipen Patel========================== 5*59cc80a6SDipen Patel 6*59cc80a6SDipen PatelDescription 7*59cc80a6SDipen Patel----------- 8*59cc80a6SDipen PatelThe Nvidia tegra HTE provider also known as GTE (Generic Timestamping Engine) 9*59cc80a6SDipen Pateldriver implements two GTE instances: 1) GPIO GTE and 2) LIC 10*59cc80a6SDipen Patel(Legacy Interrupt Controller) IRQ GTE. Both GTE instances get the timestamp 11*59cc80a6SDipen Patelfrom the system counter TSC which has 31.25MHz clock rate, and the driver 12*59cc80a6SDipen Patelconverts clock tick rate to nanoseconds before storing it as timestamp value. 13*59cc80a6SDipen Patel 14*59cc80a6SDipen PatelGPIO GTE 15*59cc80a6SDipen Patel-------- 16*59cc80a6SDipen Patel 17*59cc80a6SDipen PatelThis GTE instance timestamps GPIO in real time. For that to happen GPIO 18*59cc80a6SDipen Patelneeds to be configured as input. Only the always on (AON) GPIO controller 19*59cc80a6SDipen Patelinstance supports timestamping GPIOs in real time as it is tightly coupled with 20*59cc80a6SDipen Patelthe GPIO GTE. To support this, GPIOLIB adds two optional APIs as mentioned 21*59cc80a6SDipen Patelbelow. The GPIO GTE code supports both kernel and userspace consumers. The 22*59cc80a6SDipen Patelkernel space consumers can directly talk to HTE subsystem while userspace 23*59cc80a6SDipen Patelconsumers timestamp requests go through GPIOLIB CDEV framework to HTE 24*59cc80a6SDipen Patelsubsystem. The hte devicetree binding described at 25*59cc80a6SDipen Patel``Documentation/devicetree/bindings/timestamp`` provides an example of how a 26*59cc80a6SDipen Patelconsumer can request an GPIO line. 27*59cc80a6SDipen Patel 28*59cc80a6SDipen PatelSee gpiod_enable_hw_timestamp_ns() and gpiod_disable_hw_timestamp_ns(). 29*59cc80a6SDipen Patel 30*59cc80a6SDipen PatelFor userspace consumers, GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE flag must be 31*59cc80a6SDipen Patelspecified during IOCTL calls. Refer to ``tools/gpio/gpio-event-mon.c``, which 32*59cc80a6SDipen Patelreturns the timestamp in nanoseconds. 33*59cc80a6SDipen Patel 34*59cc80a6SDipen PatelLIC (Legacy Interrupt Controller) IRQ GTE 35*59cc80a6SDipen Patel----------------------------------------- 36*59cc80a6SDipen Patel 37*59cc80a6SDipen PatelThis GTE instance timestamps LIC IRQ lines in real time. The hte devicetree 38*59cc80a6SDipen Patelbinding described at ``Documentation/devicetree/bindings/timestamp`` 39*59cc80a6SDipen Patelprovides an example of how a consumer can request an IRQ line. Since it is a 40*59cc80a6SDipen Patelone-to-one mapping with IRQ GTE provider, consumers can simply specify the IRQ 41*59cc80a6SDipen Patelnumber that they are interested in. There is no userspace consumer support for 42*59cc80a6SDipen Patelthis GTE instance in the HTE framework. 43*59cc80a6SDipen Patel 44*59cc80a6SDipen PatelThe provider source code of both IRQ and GPIO GTE instances is located at 45*59cc80a6SDipen Patel``drivers/hte/hte-tegra194.c``. The test driver 46*59cc80a6SDipen Patel``drivers/hte/hte-tegra194-test.c`` demonstrates HTE API usage for both IRQ 47*59cc80a6SDipen Pateland GPIO GTE. 48