16 #include <linux/hte.h>
23 /* HTE source clock TSC is 31.25MHz */
31 /* AON HTE line map For slice 1 */
35 /* AON HTE line map For slice 2 */
352 static inline u32 tegra_hte_readl(struct tegra_hte_soc *hte, u32 reg)  in tegra_hte_readl()  argument
354 	return readl(hte->regs + reg);  in tegra_hte_readl()
357 static inline void tegra_hte_writel(struct tegra_hte_soc *hte, u32 reg,  in tegra_hte_writel()  argument
360 	writel(val, hte->regs + reg);  in tegra_hte_writel()
418 	 * HTE/GTE namespace.  in tegra_hte_line_xlate()
789 		dev_err(gc->dev, "hte chip register failed");  in tegra_hte_probe()
869 MODULE_DESCRIPTION("NVIDIA Tegra HTE (Hardware Timestamping Engine) driver");