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/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_pm.c27 static void user_forcewake(struct intel_gt *gt, bool suspend) in user_forcewake() argument
29 int count = atomic_read(&gt->user_wakeref); in user_forcewake()
35 intel_gt_pm_get(gt); in user_forcewake()
37 GEM_BUG_ON(count > atomic_read(&gt->wakeref.count)); in user_forcewake()
38 atomic_sub(count, &gt->wakeref.count); in user_forcewake()
40 atomic_add(count, &gt->wakeref.count); in user_forcewake()
42 intel_gt_pm_put(gt); in user_forcewake()
45 static void runtime_begin(struct intel_gt *gt) in runtime_begin() argument
48 write_seqcount_begin(&gt->stats.lock); in runtime_begin()
49 gt->stats.start = ktime_get(); in runtime_begin()
[all …]
H A Dintel_gt.c40 void intel_gt_common_init_early(struct intel_gt *gt) in intel_gt_common_init_early() argument
42 spin_lock_init(gt->irq_lock); in intel_gt_common_init_early()
44 INIT_LIST_HEAD(&gt->closed_vma); in intel_gt_common_init_early()
45 spin_lock_init(&gt->closed_lock); in intel_gt_common_init_early()
47 init_llist_head(&gt->watchdog.list); in intel_gt_common_init_early()
48 INIT_WORK(&gt->watchdog.work, intel_gt_watchdog_work); in intel_gt_common_init_early()
50 intel_gt_init_buffer_pool(gt); in intel_gt_common_init_early()
51 intel_gt_init_reset(gt); in intel_gt_common_init_early()
52 intel_gt_init_requests(gt); in intel_gt_common_init_early()
53 intel_gt_init_timelines(gt); in intel_gt_common_init_early()
[all …]
H A Dintel_gt_irq.c31 gen11_gt_engine_identity(struct intel_gt *gt, in gen11_gt_engine_identity() argument
34 void __iomem * const regs = intel_uncore_regs(gt->uncore); in gen11_gt_engine_identity()
38 lockdep_assert_held(gt->irq_lock); in gen11_gt_engine_identity()
53 gt_err(gt, "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n", in gen11_gt_engine_identity()
65 gen11_other_irq_handler(struct intel_gt *gt, const u8 instance, in gen11_other_irq_handler() argument
68 struct intel_gt *media_gt = gt->i915->media_gt; in gen11_other_irq_handler()
71 return guc_irq_handler(&gt->uc.guc, iir); in gen11_other_irq_handler()
76 return gen11_rps_irq_handler(&gt->rps, iir); in gen11_other_irq_handler()
81 return intel_pxp_irq_handler(gt->i915->pxp, iir); in gen11_other_irq_handler()
84 return intel_gsc_irq_handler(gt, iir); in gen11_other_irq_handler()
[all …]
H A Dintel_gt_pm.h14 static inline bool intel_gt_pm_is_awake(const struct intel_gt *gt) in intel_gt_pm_is_awake() argument
16 return intel_wakeref_is_active(&gt->wakeref); in intel_gt_pm_is_awake()
19 static inline void intel_gt_pm_get(struct intel_gt *gt) in intel_gt_pm_get() argument
21 intel_wakeref_get(&gt->wakeref); in intel_gt_pm_get()
24 static inline void __intel_gt_pm_get(struct intel_gt *gt) in __intel_gt_pm_get() argument
26 __intel_wakeref_get(&gt->wakeref); in __intel_gt_pm_get()
29 static inline bool intel_gt_pm_get_if_awake(struct intel_gt *gt) in intel_gt_pm_get_if_awake() argument
31 return intel_wakeref_get_if_active(&gt->wakeref); in intel_gt_pm_get_if_awake()
34 static inline void intel_gt_pm_might_get(struct intel_gt *gt) in intel_gt_pm_might_get() argument
36 intel_wakeref_might_get(&gt->wakeref); in intel_gt_pm_might_get()
[all …]
H A Dintel_reset.c15 #include "gt/intel_gt_regs.h"
17 #include "gt/uc/intel_gsc_fw.h"
157 static int i915_do_reset(struct intel_gt *gt, in i915_do_reset() argument
161 struct pci_dev *pdev = to_pci_dev(gt->i915->drm.dev); in i915_do_reset()
186 static int g33_do_reset(struct intel_gt *gt, in g33_do_reset() argument
190 struct pci_dev *pdev = to_pci_dev(gt->i915->drm.dev); in g33_do_reset()
196 static int g4x_do_reset(struct intel_gt *gt, in g4x_do_reset() argument
200 struct pci_dev *pdev = to_pci_dev(gt->i915->drm.dev); in g4x_do_reset()
201 struct intel_uncore *uncore = gt->uncore; in g4x_do_reset()
212 GT_TRACE(gt, "Wait for media reset failed\n"); in g4x_do_reset()
[all …]
H A Dintel_gt.h18 * Check that the GT is a graphics GT and has an IP version within the
21 #define IS_GFX_GT_IP_RANGE(gt, from, until) ( \ argument
24 ((gt)->type != GT_MEDIA && \
25 GRAPHICS_VER_FULL((gt)->i915) >= (from) && \
26 GRAPHICS_VER_FULL((gt)->i915) <= (until)))
29 * Check that the GT is a graphics GT with a specific IP version and has
37 * IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0)
38 * IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_B1, STEP_FOREVER)
43 #define IS_GFX_GT_IP_STEP(gt, ipver, from, until) ( \ argument
45 (IS_GFX_GT_IP_RANGE((gt), (ipver), (ipver)) && \
[all …]
H A Dintel_gt_mcr.c12 * DOC: GT Multicast/Replicated (MCR) Register Support
14 * Some GT registers are designed as "multicast" or "replicated" registers:
140 void intel_gt_mcr_init(struct intel_gt *gt) in intel_gt_mcr_init() argument
142 struct drm_i915_private *i915 = gt->i915; in intel_gt_mcr_init()
146 spin_lock_init(&gt->mcr_lock); in intel_gt_mcr_init()
153 gt->info.mslice_mask = in intel_gt_mcr_init()
154 intel_slicemask_from_xehp_dssmask(gt->info.sseu.subslice_mask, in intel_gt_mcr_init()
156 gt->info.mslice_mask |= in intel_gt_mcr_init()
157 (intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3) & in intel_gt_mcr_init()
160 if (!gt->info.mslice_mask) /* should be impossible! */ in intel_gt_mcr_init()
[all …]
H A Dintel_gt_pm_irq.c13 static void write_pm_imr(struct intel_gt *gt) in write_pm_imr() argument
15 struct drm_i915_private *i915 = gt->i915; in write_pm_imr()
16 struct intel_uncore *uncore = gt->uncore; in write_pm_imr()
17 u32 mask = gt->pm_imr; in write_pm_imr()
32 static void gen6_gt_pm_update_irq(struct intel_gt *gt, in gen6_gt_pm_update_irq() argument
40 lockdep_assert_held(gt->irq_lock); in gen6_gt_pm_update_irq()
42 new_val = gt->pm_imr; in gen6_gt_pm_update_irq()
46 if (new_val != gt->pm_imr) { in gen6_gt_pm_update_irq()
47 gt->pm_imr = new_val; in gen6_gt_pm_update_irq()
48 write_pm_imr(gt); in gen6_gt_pm_update_irq()
[all …]
H A Dselftest_reset.c18 __igt_reset_stolen(struct intel_gt *gt, in __igt_reset_stolen() argument
22 struct i915_ggtt *ggtt = gt->ggtt; in __igt_reset_stolen()
23 const struct resource *dsm = &gt->i915->dsm.stolen; in __igt_reset_stolen()
51 igt_global_reset_lock(gt); in __igt_reset_stolen()
52 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in __igt_reset_stolen()
54 err = igt_spinner_init(&spin, gt); in __igt_reset_stolen()
58 for_each_engine(engine, gt, id) { in __igt_reset_stolen()
89 i915_gem_get_pat_index(gt->i915, in __igt_reset_stolen()
98 if (!__drm_mm_interval_first(&gt->i915->mm.stolen, in __igt_reset_stolen()
114 intel_gt_reset(gt, mask, NULL); in __igt_reset_stolen()
[all …]
H A Dintel_gt_sysfs_pm.c29 int (func)(struct intel_gt *gt, u32 val), u32 val) in sysfs_gt_attribute_w_func() argument
31 struct intel_gt *gt; in sysfs_gt_attribute_w_func() local
39 for_each_gt(gt, i915, i) { in sysfs_gt_attribute_w_func()
40 ret = func(gt, val); in sysfs_gt_attribute_w_func()
45 gt = intel_gt_sysfs_get_drvdata(kobj, attr->name); in sysfs_gt_attribute_w_func()
46 ret = func(gt, val); in sysfs_gt_attribute_w_func()
54 u32 (func)(struct intel_gt *gt), in sysfs_gt_attribute_r_func() argument
57 struct intel_gt *gt; in sysfs_gt_attribute_r_func() local
67 for_each_gt(gt, i915, i) { in sysfs_gt_attribute_r_func()
68 u32 val = func(gt); in sysfs_gt_attribute_r_func()
[all …]
H A Dintel_tlb.c32 return intel_gt_mcr_wait_for_reg(engine->gt, in wait_for_invalidate()
39 return __intel_wait_for_register_fw(engine->gt->uncore, in wait_for_invalidate()
48 static void mmio_invalidate_full(struct intel_gt *gt) in mmio_invalidate_full() argument
50 struct drm_i915_private *i915 = gt->i915; in mmio_invalidate_full()
51 struct intel_uncore *uncore = gt->uncore; in mmio_invalidate_full()
62 intel_gt_mcr_lock(gt, &flags); in mmio_invalidate_full()
63 spin_lock(&uncore->lock); /* serialise invalidate with GT reset */ in mmio_invalidate_full()
66 for_each_engine(engine, gt, id) { in mmio_invalidate_full()
71 intel_gt_mcr_multicast_write_fw(gt, in mmio_invalidate_full()
82 GT_TRACE(gt, "invalidated engines %08x\n", awake); in mmio_invalidate_full()
[all …]
H A Dintel_gt_sysfs.c23 return !strncmp(kobj->name, "gt", 2); in is_object_gt()
31 * has been called, whether it's called from gt/ or from in intel_gt_sysfs_get_drvdata()
35 * If the interface is called from gt/ then private data is in intel_gt_sysfs_get_drvdata()
49 static struct kobject *gt_get_parent_obj(struct intel_gt *gt) in gt_get_parent_obj() argument
51 return &gt->i915->drm.primary->kdev->kobj; in gt_get_parent_obj()
58 struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name); in id_show() local
60 return sysfs_emit(buf, "%u\n", gt->info.id); in id_show()
81 void intel_gt_sysfs_register(struct intel_gt *gt) in intel_gt_sysfs_register() argument
88 * We generate the files only for gt 0 in intel_gt_sysfs_register()
91 if (gt_is_root(gt)) in intel_gt_sysfs_register()
[all …]
H A Dintel_reset.h21 void intel_gt_init_reset(struct intel_gt *gt);
22 void intel_gt_fini_reset(struct intel_gt *gt);
25 void intel_gt_handle_error(struct intel_gt *gt,
31 void intel_gt_reset(struct intel_gt *gt,
41 int __must_check intel_gt_reset_trylock(struct intel_gt *gt, int *srcu);
42 int __must_check intel_gt_reset_lock_interruptible(struct intel_gt *gt, int *srcu);
43 void intel_gt_reset_unlock(struct intel_gt *gt, int tag);
45 void intel_gt_set_wedged(struct intel_gt *gt);
46 bool intel_gt_unset_wedged(struct intel_gt *gt);
47 int intel_gt_terminally_wedged(struct intel_gt *gt);
[all …]
H A Dselftest_slpc.c22 struct intel_gt *gt; member
53 static int slpc_set_freq(struct intel_gt *gt, u32 freq) in slpc_set_freq() argument
56 struct intel_guc_slpc *slpc = &gt->uc.guc.slpc; in slpc_set_freq()
98 static u64 measure_power_at_freq(struct intel_gt *gt, int *freq, u64 *power) in measure_power_at_freq() argument
102 err = slpc_set_freq(gt, *freq); in measure_power_at_freq()
105 *freq = intel_rps_read_actual_frequency(&gt->rps); in measure_power_at_freq()
106 *power = measure_power(&gt->rps, freq); in measure_power_at_freq()
183 static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine) in slpc_power() argument
185 struct intel_guc_slpc *slpc = &gt->uc.guc.slpc; in slpc_power()
197 if (!librapl_supported(gt->i915)) in slpc_power()
[all …]
H A Dintel_gt_pm_debugfs.c27 void intel_gt_pm_debugfs_forcewake_user_open(struct intel_gt *gt) in intel_gt_pm_debugfs_forcewake_user_open() argument
29 atomic_inc(&gt->user_wakeref); in intel_gt_pm_debugfs_forcewake_user_open()
30 intel_gt_pm_get(gt); in intel_gt_pm_debugfs_forcewake_user_open()
31 if (GRAPHICS_VER(gt->i915) >= 6) in intel_gt_pm_debugfs_forcewake_user_open()
32 intel_uncore_forcewake_user_get(gt->uncore); in intel_gt_pm_debugfs_forcewake_user_open()
35 void intel_gt_pm_debugfs_forcewake_user_release(struct intel_gt *gt) in intel_gt_pm_debugfs_forcewake_user_release() argument
37 if (GRAPHICS_VER(gt->i915) >= 6) in intel_gt_pm_debugfs_forcewake_user_release()
38 intel_uncore_forcewake_user_put(gt->uncore); in intel_gt_pm_debugfs_forcewake_user_release()
39 intel_gt_pm_put(gt); in intel_gt_pm_debugfs_forcewake_user_release()
40 atomic_dec(&gt->user_wakeref); in intel_gt_pm_debugfs_forcewake_user_release()
[all …]
H A Dintel_gt_clock_utils.c175 void intel_gt_init_clock_frequency(struct intel_gt *gt) in intel_gt_init_clock_frequency() argument
177 gt->clock_frequency = read_clock_frequency(gt->uncore); in intel_gt_init_clock_frequency()
180 if (GRAPHICS_VER(gt->i915) == 11) in intel_gt_init_clock_frequency()
181 gt->clock_period_ns = NSEC_PER_SEC / 13750000; in intel_gt_init_clock_frequency()
182 else if (gt->clock_frequency) in intel_gt_init_clock_frequency()
183 gt->clock_period_ns = intel_gt_clock_interval_to_ns(gt, 1); in intel_gt_init_clock_frequency()
185 GT_TRACE(gt, in intel_gt_init_clock_frequency()
187 gt->clock_frequency / 1000, in intel_gt_init_clock_frequency()
188 gt->clock_period_ns, in intel_gt_init_clock_frequency()
189 div_u64(mul_u32_u32(gt->clock_period_ns, S32_MAX), in intel_gt_init_clock_frequency()
[all …]
H A Dintel_gt_debugfs.c17 int intel_gt_debugfs_reset_show(struct intel_gt *gt, u64 *val) in intel_gt_debugfs_reset_show() argument
19 int ret = intel_gt_terminally_wedged(gt); in intel_gt_debugfs_reset_show()
33 void intel_gt_debugfs_reset_store(struct intel_gt *gt, u64 val) in intel_gt_debugfs_reset_store() argument
36 wait_event(gt->reset.queue, in intel_gt_debugfs_reset_store()
37 !test_bit(I915_RESET_BACKOFF, &gt->reset.flags)); in intel_gt_debugfs_reset_store()
39 intel_gt_handle_error(gt, val, I915_ERROR_CAPTURE, in intel_gt_debugfs_reset_store()
65 struct intel_gt *gt = m->private; in steering_show() local
67 intel_gt_mcr_report_steering(&p, gt, true); in steering_show()
73 static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root) in gt_debugfs_register() argument
80 intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt); in gt_debugfs_register()
[all …]
H A Dselftest_hangcheck.c33 struct intel_gt *gt; member
41 static int hang_init(struct hang *h, struct intel_gt *gt) in hang_init() argument
47 h->gt = gt; in hang_init()
49 h->ctx = kernel_context(gt->i915, NULL); in hang_init()
55 h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
61 h->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
76 intel_gt_coherent_map_type(gt, h->obj, false)); in hang_init()
106 struct intel_gt *gt = h->gt; in hang_create_request() local
116 obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_create_request()
122 vaddr = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, false)); in hang_create_request()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/
H A DMakefile88 gt-y += \
89 gt/gen2_engine_cs.o \
90 gt/gen6_engine_cs.o \
91 gt/gen6_ppgtt.o \
92 gt/gen7_renderclear.o \
93 gt/gen8_engine_cs.o \
94 gt/gen8_ppgtt.o \
95 gt/intel_breadcrumbs.o \
96 gt/intel_context.o \
97 gt/intel_context_sseu.o \
[all …]
H A Di915_gpu_error.c47 #include "gt/intel_engine_regs.h"
48 #include "gt/intel_gt.h"
49 #include "gt/intel_gt_mcr.h"
50 #include "gt/intel_gt_pm.h"
51 #include "gt/intel_gt_regs.h"
52 #include "gt/uc/intel_guc_capture.h"
457 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
462 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
471 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
722 struct intel_gt_coredump *gt) in err_print_gt_info() argument
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dpci.c80 { 0x106b, 0x0605, "GeForce GT 130" },
86 { 0x1043, 0x202d, "GeForce GT 220M" },
92 { 0x152d, 0x0850, "GeForce GT 240M LE" },
98 { 0x1043, 0x14a2, "GeForce GT 320M" },
99 { 0x1043, 0x14d2, "GeForce GT 320M" },
105 { 0x106b, 0x0633, "GeForce GT 120" },
111 { 0x106b, 0x0693, "GeForce GT 120" },
232 { 0x1025, 0x0692, "GeForce GT 620M" },
233 { 0x1025, 0x0725, "GeForce GT 620M" },
234 { 0x1025, 0x0728, "GeForce GT 620M" },
[all …]
/openbmc/linux/drivers/gpu/drm/i915/selftests/
H A Digt_reset.c9 #include "gt/intel_engine.h"
10 #include "gt/intel_gt.h"
14 void igt_global_reset_lock(struct intel_gt *gt) in igt_global_reset_lock() argument
19 pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags); in igt_global_reset_lock()
21 while (test_and_set_bit(I915_RESET_BACKOFF, &gt->reset.flags)) in igt_global_reset_lock()
22 wait_event(gt->reset.queue, in igt_global_reset_lock()
23 !test_bit(I915_RESET_BACKOFF, &gt->reset.flags)); in igt_global_reset_lock()
25 for_each_engine(engine, gt, id) { in igt_global_reset_lock()
27 &gt->reset.flags)) in igt_global_reset_lock()
28 wait_on_bit(&gt->reset.flags, I915_RESET_ENGINE + id, in igt_global_reset_lock()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_irq.c7 #include "gt/intel_gt_irq.h"
8 #include "gt/intel_gt_regs.h"
9 #include "gt/intel_gt_types.h"
27 struct intel_gt *gt; in intel_pxp_irq_handler() local
32 gt = pxp->ctrl_gt; in intel_pxp_irq_handler()
34 lockdep_assert_held(gt->irq_lock); in intel_pxp_irq_handler()
53 static inline void __pxp_set_interrupts(struct intel_gt *gt, u32 interrupts) in __pxp_set_interrupts() argument
55 struct intel_uncore *uncore = gt->uncore; in __pxp_set_interrupts()
62 static inline void pxp_irq_reset(struct intel_gt *gt) in pxp_irq_reset() argument
64 spin_lock_irq(gt->irq_lock); in pxp_irq_reset()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dselftest_guc_hangcheck.c6 #include "gt/intel_gt_print.h"
10 #include "gt/intel_engine_heartbeat.h"
31 struct intel_gt *gt = arg; in intel_hang_guc() local
38 struct i915_gpu_error *global = &gt->i915->gpu_error; in intel_hang_guc()
39 struct intel_engine_cs *engine = intel_selftest_find_any_engine(gt); in intel_hang_guc()
47 ctx = kernel_context(gt->i915, NULL); in intel_hang_guc()
49 gt_err(gt, "Failed get kernel context: %pe\n", ctx); in intel_hang_guc()
53 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in intel_hang_guc()
58 gt_err(gt, "Failed to create spinner request: %pe\n", ce); in intel_hang_guc()
67 gt_err(gt, "Failed to boost heatbeat interval: %pe\n", ERR_PTR(ret)); in intel_hang_guc()
[all …]
H A Dintel_gsc_uc.c8 #include "gt/intel_gt.h"
9 #include "gt/intel_gt_print.h"
19 struct intel_gt *gt = gsc_uc_to_gt(gsc); in gsc_work() local
24 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in gsc_work()
26 spin_lock_irq(gt->irq_lock); in gsc_work()
29 spin_unlock_irq(gt->irq_lock); in gsc_work()
53 if (intel_uc_uses_huc(&gt->uc) && in gsc_work()
54 intel_huc_is_authenticated(&gt->uc.huc, INTEL_HUC_AUTH_BY_GUC)) in gsc_work()
55 intel_huc_auth(&gt->uc.huc, INTEL_HUC_AUTH_BY_GSC); in gsc_work()
60 gt_err(gt, "Proxy request received with GSC not loaded!\n"); in gsc_work()
[all …]

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