Lines Matching full:gt
47 #include "gt/intel_engine_regs.h"
48 #include "gt/intel_gt.h"
49 #include "gt/intel_gt_mcr.h"
50 #include "gt/intel_gt_pm.h"
51 #include "gt/intel_gt_regs.h"
52 #include "gt/uc/intel_guc_capture.h"
457 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
462 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
471 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
722 struct intel_gt_coredump *gt) in err_print_gt_info() argument
726 intel_gt_info_print(>->info, &p); in err_print_gt_info()
727 intel_sseu_print_topology(gt->_gt->i915, >->info.sseu, &p); in err_print_gt_info()
731 struct intel_gt_coredump *gt) in err_print_gt_display() argument
733 err_printf(m, "IER: 0x%08x\n", gt->ier); in err_print_gt_display()
734 err_printf(m, "DERRMR: 0x%08x\n", gt->derrmr); in err_print_gt_display()
738 struct intel_gt_coredump *gt) in err_print_gt_global_nonguc() argument
742 err_printf(m, "GT awake: %s\n", str_yes_no(gt->awake)); in err_print_gt_global_nonguc()
744 gt->clock_frequency, gt->clock_period_ns); in err_print_gt_global_nonguc()
745 err_printf(m, "EIR: 0x%08x\n", gt->eir); in err_print_gt_global_nonguc()
746 err_printf(m, "PGTBL_ER: 0x%08x\n", gt->pgtbl_er); in err_print_gt_global_nonguc()
748 for (i = 0; i < gt->ngtier; i++) in err_print_gt_global_nonguc()
749 err_printf(m, "GTIER[%d]: 0x%08x\n", i, gt->gtier[i]); in err_print_gt_global_nonguc()
753 struct intel_gt_coredump *gt) in err_print_gt_global() argument
755 err_printf(m, "FORCEWAKE: 0x%08x\n", gt->forcewake); in err_print_gt_global()
758 err_printf(m, "ERROR: 0x%08x\n", gt->error); in err_print_gt_global()
759 err_printf(m, "DONE_REG: 0x%08x\n", gt->done_reg); in err_print_gt_global()
764 gt->fault_data1, gt->fault_data0); in err_print_gt_global()
767 err_printf(m, "ERR_INT: 0x%08x\n", gt->err_int); in err_print_gt_global()
770 err_printf(m, "GTT_CACHE_EN: 0x%08x\n", gt->gtt_cache); in err_print_gt_global()
773 err_printf(m, "AUX_ERR_DBG: 0x%08x\n", gt->aux_err); in err_print_gt_global()
784 if ((gt->_gt->info.sfc_mask & BIT(i)) == 0 || in err_print_gt_global()
785 !HAS_ENGINE(gt->_gt, _VCS(i * 2))) in err_print_gt_global()
789 gt->sfc_done[i]); in err_print_gt_global()
792 err_printf(m, " GAM_DONE: 0x%08x\n", gt->gam_done); in err_print_gt_global()
797 struct intel_gt_coredump *gt) in err_print_gt_fences() argument
801 for (i = 0; i < gt->nfence; i++) in err_print_gt_fences()
802 err_printf(m, " fence[%d] = %08llx\n", i, gt->fence[i]); in err_print_gt_fences()
806 struct intel_gt_coredump *gt) in err_print_gt_engines() argument
810 for (ee = gt->engine; ee; ee = ee->next) { in err_print_gt_engines()
813 if (gt->uc && gt->uc->guc.is_guc_capture) { in err_print_gt_engines()
857 for (ee = error->gt ? error->gt->engine : NULL; ee; ee = ee->next) in __err_print_to_sgl()
878 if (error->gt) { in __err_print_to_sgl()
881 if (error->gt->uc && error->gt->uc->guc.is_guc_capture) in __err_print_to_sgl()
884 err_print_gt_display(m, error->gt); in __err_print_to_sgl()
885 err_print_gt_global_nonguc(m, error->gt); in __err_print_to_sgl()
886 err_print_gt_fences(m, error->gt); in __err_print_to_sgl()
893 err_print_gt_global(m, error->gt); in __err_print_to_sgl()
895 err_print_gt_engines(m, error->gt); in __err_print_to_sgl()
897 if (error->gt->uc) in __err_print_to_sgl()
898 err_print_uc(m, error->gt->uc); in __err_print_to_sgl()
900 err_print_gt_info(m, error->gt); in __err_print_to_sgl()
1044 static void cleanup_gt(struct intel_gt_coredump *gt) in cleanup_gt() argument
1046 while (gt->engine) { in cleanup_gt()
1047 struct intel_engine_coredump *ee = gt->engine; in cleanup_gt()
1049 gt->engine = ee->next; in cleanup_gt()
1056 if (gt->uc) in cleanup_gt()
1057 cleanup_uc(gt->uc); in cleanup_gt()
1059 kfree(gt); in cleanup_gt()
1067 while (error->gt) { in __i915_gpu_coredump_free()
1068 struct intel_gt_coredump *gt = error->gt; in __i915_gpu_coredump_free() local
1070 error->gt = gt->next; in __i915_gpu_coredump_free()
1071 cleanup_gt(gt); in __i915_gpu_coredump_free()
1083 i915_vma_coredump_create(const struct intel_gt *gt, in i915_vma_coredump_create() argument
1089 struct i915_ggtt *ggtt = gt->ggtt; in i915_vma_coredump_create()
1127 i915_gem_get_pat_index(gt->i915, in i915_vma_coredump_create()
1132 i915_gem_get_pat_index(gt->i915, in i915_vma_coredump_create()
1205 static void gt_record_fences(struct intel_gt_coredump *gt) in gt_record_fences() argument
1207 struct i915_ggtt *ggtt = gt->_gt->ggtt; in gt_record_fences()
1208 struct intel_uncore *uncore = gt->_gt->uncore; in gt_record_fences()
1213 gt->fence[i] = in gt_record_fences()
1218 gt->fence[i] = in gt_record_fences()
1223 gt->fence[i] = in gt_record_fences()
1226 gt->nfence = i; in gt_record_fences()
1238 ee->fault_reg = intel_gt_mcr_read_any(engine->gt, in engine_record_registers()
1501 create_vma_coredump(const struct intel_gt *gt, struct i915_vma *vma, in create_vma_coredump() argument
1514 ret = i915_vma_coredump_create(gt, vma_res, compress, name); in create_vma_coredump()
1522 const struct intel_gt *gt, in add_vma_coredump() argument
1527 add_vma(ee, create_vma_coredump(gt, vma, name, compress)); in add_vma_coredump()
1609 i915_vma_coredump_create(engine->gt, vma_res, in intel_engine_coredump_add_vma()
1619 add_vma_coredump(ee, engine->gt, engine->status_page.vma, in intel_engine_coredump_add_vma()
1622 add_vma_coredump(ee, engine->gt, engine->wa_ctx.vma, in intel_engine_coredump_add_vma()
1648 drm_info(&engine->gt->i915->drm, in capture_engine()
1652 drm_info(&engine->gt->i915->drm, in capture_engine()
1668 intel_guc_capture_get_matching_node(engine->gt, ee, ce); in capture_engine()
1678 gt_record_engines(struct intel_gt_coredump *gt, in gt_record_engines() argument
1686 for_each_engine(engine, gt->_gt, id) { in gt_record_engines()
1698 gt->simulated |= ee->simulated; in gt_record_engines()
1706 ee->next = gt->engine; in gt_record_engines()
1707 gt->engine = ee; in gt_record_engines()
1729 gt_record_uc(struct intel_gt_coredump *gt, in gt_record_uc() argument
1732 const struct intel_uc *uc = >->_gt->uc; in gt_record_uc()
1750 * gt->clock_frequency fields saved elsewhere). in gt_record_uc()
1752 error_uc->guc.timestamp = intel_uncore_read(gt->_gt->uncore, GUCPMTIMESTAMP); in gt_record_uc()
1753 error_uc->guc.vma_log = create_vma_coredump(gt->_gt, uc->guc.log.vma, in gt_record_uc()
1755 error_uc->guc.vma_ctb = create_vma_coredump(gt->_gt, uc->guc.ct.vma, in gt_record_uc()
1767 static void gt_record_display_regs(struct intel_gt_coredump *gt) in gt_record_display_regs() argument
1769 struct intel_uncore *uncore = gt->_gt->uncore; in gt_record_display_regs()
1773 gt->derrmr = intel_uncore_read(uncore, DERRMR); in gt_record_display_regs()
1776 gt->ier = intel_uncore_read(uncore, GEN8_DE_MISC_IER); in gt_record_display_regs()
1778 gt->ier = intel_uncore_read(uncore, VLV_IER); in gt_record_display_regs()
1780 gt->ier = intel_uncore_read(uncore, DEIER); in gt_record_display_regs()
1782 gt->ier = intel_uncore_read16(uncore, GEN2_IER); in gt_record_display_regs()
1784 gt->ier = intel_uncore_read(uncore, GEN2_IER); in gt_record_display_regs()
1788 static void gt_record_global_nonguc_regs(struct intel_gt_coredump *gt) in gt_record_global_nonguc_regs() argument
1790 struct intel_uncore *uncore = gt->_gt->uncore; in gt_record_global_nonguc_regs()
1795 gt->gtier[0] = intel_uncore_read(uncore, GTIER); in gt_record_global_nonguc_regs()
1796 gt->ngtier = 1; in gt_record_global_nonguc_regs()
1798 gt->gtier[0] = in gt_record_global_nonguc_regs()
1801 gt->gtier[1] = in gt_record_global_nonguc_regs()
1803 gt->gtier[2] = in gt_record_global_nonguc_regs()
1805 gt->gtier[3] = in gt_record_global_nonguc_regs()
1808 gt->gtier[4] = in gt_record_global_nonguc_regs()
1811 gt->gtier[5] = in gt_record_global_nonguc_regs()
1814 gt->ngtier = 6; in gt_record_global_nonguc_regs()
1817 gt->gtier[i] = in gt_record_global_nonguc_regs()
1819 gt->ngtier = 4; in gt_record_global_nonguc_regs()
1821 gt->gtier[0] = intel_uncore_read(uncore, GTIER); in gt_record_global_nonguc_regs()
1822 gt->ngtier = 1; in gt_record_global_nonguc_regs()
1825 gt->eir = intel_uncore_read(uncore, EIR); in gt_record_global_nonguc_regs()
1826 gt->pgtbl_er = intel_uncore_read(uncore, PGTBL_ER); in gt_record_global_nonguc_regs()
1833 static void gt_record_global_regs(struct intel_gt_coredump *gt) in gt_record_global_regs() argument
1835 struct intel_uncore *uncore = gt->_gt->uncore; in gt_record_global_regs()
1850 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_VLV); in gt_record_global_regs()
1853 gt->err_int = intel_uncore_read(uncore, GEN7_ERR_INT); in gt_record_global_regs()
1856 gt->fault_data0 = intel_gt_mcr_read_any((struct intel_gt *)gt->_gt, in gt_record_global_regs()
1858 gt->fault_data1 = intel_gt_mcr_read_any((struct intel_gt *)gt->_gt, in gt_record_global_regs()
1861 gt->fault_data0 = intel_uncore_read(uncore, in gt_record_global_regs()
1863 gt->fault_data1 = intel_uncore_read(uncore, in gt_record_global_regs()
1866 gt->fault_data0 = intel_uncore_read(uncore, in gt_record_global_regs()
1868 gt->fault_data1 = intel_uncore_read(uncore, in gt_record_global_regs()
1873 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE); in gt_record_global_regs()
1874 gt->gab_ctl = intel_uncore_read(uncore, GAB_CTL); in gt_record_global_regs()
1875 gt->gfx_mode = intel_uncore_read(uncore, GFX_MODE); in gt_record_global_regs()
1880 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in gt_record_global_regs()
1884 gt->error = intel_uncore_read(uncore, ERROR_GEN6); in gt_record_global_regs()
1885 gt->done_reg = intel_uncore_read(uncore, DONE_REG); in gt_record_global_regs()
1891 gt->gam_ecochk = intel_uncore_read(uncore, GAM_ECOCHK); in gt_record_global_regs()
1892 gt->gac_eco = intel_uncore_read(uncore, GAC_ECO_BITS); in gt_record_global_regs()
1896 gt->gtt_cache = intel_uncore_read(uncore, HSW_GTT_CACHE_EN); in gt_record_global_regs()
1899 gt->aux_err = intel_uncore_read(uncore, GEN12_AUX_ERR_DBG); in gt_record_global_regs()
1908 if ((gt->_gt->info.sfc_mask & BIT(i)) == 0 || in gt_record_global_regs()
1909 !HAS_ENGINE(gt->_gt, _VCS(i * 2))) in gt_record_global_regs()
1912 gt->sfc_done[i] = in gt_record_global_regs()
1916 gt->gam_done = intel_uncore_read(uncore, GEN12_GAM_DONE); in gt_record_global_regs()
1920 static void gt_record_info(struct intel_gt_coredump *gt) in gt_record_info() argument
1922 memcpy(>->info, >->_gt->info, sizeof(struct intel_gt_info)); in gt_record_info()
1923 gt->clock_frequency = gt->_gt->clock_frequency; in gt_record_info()
1924 gt->clock_period_ns = gt->_gt->clock_period_ns; in gt_record_info()
1952 struct intel_gt_coredump *gt; in error_msg() local
1955 for (gt = error->gt; gt; gt = gt->next) { in error_msg()
1958 for (cs = gt->engine; cs; cs = cs->next) { in error_msg()
2035 intel_gt_coredump_alloc(struct intel_gt *gt, gfp_t gfp, u32 dump_flags) in intel_gt_coredump_alloc() argument
2043 gc->_gt = gt; in intel_gt_coredump_alloc()
2044 gc->awake = intel_gt_pm_is_awake(gt); in intel_gt_coredump_alloc()
2067 i915_vma_capture_prepare(struct intel_gt_coredump *gt) in i915_vma_capture_prepare() argument
2083 void i915_vma_capture_finish(struct intel_gt_coredump *gt, in i915_vma_capture_finish() argument
2094 __i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in __i915_gpu_coredump() argument
2096 struct drm_i915_private *i915 = gt->i915; in __i915_gpu_coredump()
2108 error->gt = intel_gt_coredump_alloc(gt, ALLOW_FAIL, dump_flags); in __i915_gpu_coredump()
2109 if (error->gt) { in __i915_gpu_coredump()
2112 compress = i915_vma_capture_prepare(error->gt); in __i915_gpu_coredump()
2114 kfree(error->gt); in __i915_gpu_coredump()
2120 error->gt->uc = gt_record_uc(error->gt, compress); in __i915_gpu_coredump()
2121 if (error->gt->uc) { in __i915_gpu_coredump()
2123 error->gt->uc->guc.is_guc_capture = true; in __i915_gpu_coredump()
2125 GEM_BUG_ON(error->gt->uc->guc.is_guc_capture); in __i915_gpu_coredump()
2129 gt_record_info(error->gt); in __i915_gpu_coredump()
2130 gt_record_engines(error->gt, engine_mask, compress, dump_flags); in __i915_gpu_coredump()
2133 i915_vma_capture_finish(error->gt, compress); in __i915_gpu_coredump()
2135 error->simulated |= error->gt->simulated; in __i915_gpu_coredump()
2144 i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in i915_gpu_coredump() argument
2153 dump = __i915_gpu_coredump(gt, engine_mask, dump_flags); in i915_gpu_coredump()
2190 * @gt: intel_gt which originated the hang
2199 void i915_capture_error_state(struct intel_gt *gt, in i915_capture_error_state() argument
2204 error = i915_gpu_coredump(gt, engine_mask, dump_flags); in i915_capture_error_state()
2206 cmpxchg(>->i915->gpu_error.first_error, NULL, error); in i915_capture_error_state()
2251 void intel_klog_error_capture(struct intel_gt *gt, in intel_klog_error_capture() argument
2255 struct drm_i915_private *i915 = gt->i915; in intel_klog_error_capture()
2265 if (test_bit(I915_RESET_BACKOFF, >->reset.flags)) { in intel_klog_error_capture()
2266 drm_err(>->i915->drm, "[Capture/%d.%d] Inside GT reset, skipping error capture :(\n", in intel_klog_error_capture()
2279 error = i915_gpu_coredump(gt, engine_mask, CORE_DUMP_FLAG_NONE); in intel_klog_error_capture()