124635c51STvrtko Ursulin /* SPDX-License-Identifier: MIT */
224635c51STvrtko Ursulin /*
324635c51STvrtko Ursulin * Copyright © 2019 Intel Corporation
424635c51STvrtko Ursulin */
524635c51STvrtko Ursulin
624635c51STvrtko Ursulin #ifndef __INTEL_GT__
724635c51STvrtko Ursulin #define __INTEL_GT__
824635c51STvrtko Ursulin
9f1530f91SJonathan Cavitt #include "i915_drv.h"
10eaf522f6STvrtko Ursulin #include "intel_engine_types.h"
1124635c51STvrtko Ursulin #include "intel_gt_types.h"
12cb823ed9SChris Wilson #include "intel_reset.h"
1324635c51STvrtko Ursulin
14724e9564STvrtko Ursulin struct drm_i915_private;
15792592e7SDaniele Ceraolo Spurio struct drm_printer;
16724e9564STvrtko Ursulin
1718e77951SMatt Roper /*
1818e77951SMatt Roper * Check that the GT is a graphics GT and has an IP version within the
1918e77951SMatt Roper * specified range (inclusive).
2018e77951SMatt Roper */
2118e77951SMatt Roper #define IS_GFX_GT_IP_RANGE(gt, from, until) ( \
2218e77951SMatt Roper BUILD_BUG_ON_ZERO((from) < IP_VER(2, 0)) + \
2318e77951SMatt Roper BUILD_BUG_ON_ZERO((until) < (from)) + \
2418e77951SMatt Roper ((gt)->type != GT_MEDIA && \
2518e77951SMatt Roper GRAPHICS_VER_FULL((gt)->i915) >= (from) && \
2618e77951SMatt Roper GRAPHICS_VER_FULL((gt)->i915) <= (until)))
2718e77951SMatt Roper
28*b3749611SMatt Roper /*
29*b3749611SMatt Roper * Check that the GT is a graphics GT with a specific IP version and has
30*b3749611SMatt Roper * a stepping in the range [from, until). The lower stepping bound is
31*b3749611SMatt Roper * inclusive, the upper bound is exclusive. The most common use-case of this
32*b3749611SMatt Roper * macro is for checking bounds for workarounds, which usually have a stepping
33*b3749611SMatt Roper * ("from") at which the hardware issue is first present and another stepping
34*b3749611SMatt Roper * ("until") at which a hardware fix is present and the software workaround is
35*b3749611SMatt Roper * no longer necessary. E.g.,
36*b3749611SMatt Roper *
37*b3749611SMatt Roper * IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0)
38*b3749611SMatt Roper * IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_B1, STEP_FOREVER)
39*b3749611SMatt Roper *
40*b3749611SMatt Roper * "STEP_FOREVER" can be passed as "until" for workarounds that have no upper
41*b3749611SMatt Roper * stepping bound for the specified IP version.
42*b3749611SMatt Roper */
43*b3749611SMatt Roper #define IS_GFX_GT_IP_STEP(gt, ipver, from, until) ( \
44*b3749611SMatt Roper BUILD_BUG_ON_ZERO((until) <= (from)) + \
45*b3749611SMatt Roper (IS_GFX_GT_IP_RANGE((gt), (ipver), (ipver)) && \
46*b3749611SMatt Roper IS_GRAPHICS_STEP((gt)->i915, (from), (until))))
47*b3749611SMatt Roper
4888405440SVenkata Sandeep Dhanalakota #define GT_TRACE(gt, fmt, ...) do { \
4988405440SVenkata Sandeep Dhanalakota const struct intel_gt *gt__ __maybe_unused = (gt); \
5088405440SVenkata Sandeep Dhanalakota GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \
51639f2f24SVenkata Sandeep Dhanalakota ##__VA_ARGS__); \
52639f2f24SVenkata Sandeep Dhanalakota } while (0)
53639f2f24SVenkata Sandeep Dhanalakota
gt_is_root(struct intel_gt * gt)54b9741faaSAndi Shyti static inline bool gt_is_root(struct intel_gt *gt)
55b9741faaSAndi Shyti {
56b9741faaSAndi Shyti return !gt->info.id;
57b9741faaSAndi Shyti }
58b9741faaSAndi Shyti
intel_gt_needs_wa_22016122933(struct intel_gt * gt)59f1530f91SJonathan Cavitt static inline bool intel_gt_needs_wa_22016122933(struct intel_gt *gt)
60f1530f91SJonathan Cavitt {
61f1530f91SJonathan Cavitt return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type == GT_MEDIA;
62f1530f91SJonathan Cavitt }
63f1530f91SJonathan Cavitt
uc_to_gt(struct intel_uc * uc)64ca7b2c1bSDaniele Ceraolo Spurio static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
65ca7b2c1bSDaniele Ceraolo Spurio {
66ca7b2c1bSDaniele Ceraolo Spurio return container_of(uc, struct intel_gt, uc);
67ca7b2c1bSDaniele Ceraolo Spurio }
68ca7b2c1bSDaniele Ceraolo Spurio
guc_to_gt(struct intel_guc * guc)6984b1ca2fSDaniele Ceraolo Spurio static inline struct intel_gt *guc_to_gt(struct intel_guc *guc)
7084b1ca2fSDaniele Ceraolo Spurio {
7184b1ca2fSDaniele Ceraolo Spurio return container_of(guc, struct intel_gt, uc.guc);
7284b1ca2fSDaniele Ceraolo Spurio }
7384b1ca2fSDaniele Ceraolo Spurio
huc_to_gt(struct intel_huc * huc)7484b1ca2fSDaniele Ceraolo Spurio static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
7584b1ca2fSDaniele Ceraolo Spurio {
7684b1ca2fSDaniele Ceraolo Spurio return container_of(huc, struct intel_gt, uc.huc);
7784b1ca2fSDaniele Ceraolo Spurio }
7884b1ca2fSDaniele Ceraolo Spurio
gsc_uc_to_gt(struct intel_gsc_uc * gsc_uc)79242c4b91SDaniele Ceraolo Spurio static inline struct intel_gt *gsc_uc_to_gt(struct intel_gsc_uc *gsc_uc)
80242c4b91SDaniele Ceraolo Spurio {
81242c4b91SDaniele Ceraolo Spurio return container_of(gsc_uc, struct intel_gt, uc.gsc);
82242c4b91SDaniele Ceraolo Spurio }
83242c4b91SDaniele Ceraolo Spurio
gsc_to_gt(struct intel_gsc * gsc)841e3dc1d8STomas Winkler static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc)
851e3dc1d8STomas Winkler {
861e3dc1d8STomas Winkler return container_of(gsc, struct intel_gt, gsc);
871e3dc1d8STomas Winkler }
881e3dc1d8STomas Winkler
894ecd56fdSMatt Roper void intel_gt_common_init_early(struct intel_gt *gt);
9003d2c54dSMatt Roper int intel_root_gt_init_early(struct drm_i915_private *i915);
91cdeea858SAndi Shyti int intel_gt_assign_ggtt(struct intel_gt *gt);
92d0eb6866SDaniele Ceraolo Spurio int intel_gt_init_mmio(struct intel_gt *gt);
9361fa60ffSTvrtko Ursulin int __must_check intel_gt_init_hw(struct intel_gt *gt);
9442014f69SAndi Shyti int intel_gt_init(struct intel_gt *gt);
9542014f69SAndi Shyti void intel_gt_driver_register(struct intel_gt *gt);
9642014f69SAndi Shyti
9742014f69SAndi Shyti void intel_gt_driver_unregister(struct intel_gt *gt);
9842014f69SAndi Shyti void intel_gt_driver_remove(struct intel_gt *gt);
9942014f69SAndi Shyti void intel_gt_driver_release(struct intel_gt *gt);
100bec68cc9STvrtko Ursulin void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
101cb823ed9SChris Wilson
102b97060a9SMatthew Brost int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
103b97060a9SMatthew Brost
104eaf522f6STvrtko Ursulin void intel_gt_check_and_clear_faults(struct intel_gt *gt);
1051551b916SAshutosh Dixit i915_reg_t intel_gt_perf_limit_reasons_reg(struct intel_gt *gt);
106eaf522f6STvrtko Ursulin void intel_gt_clear_error_registers(struct intel_gt *gt,
107eaf522f6STvrtko Ursulin intel_engine_mask_t engine_mask);
108eaf522f6STvrtko Ursulin
109a1c8a09eSTvrtko Ursulin void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
110baea429dSTvrtko Ursulin void intel_gt_chipset_flush(struct intel_gt *gt);
111a1c8a09eSTvrtko Ursulin
intel_gt_scratch_offset(const struct intel_gt * gt,enum intel_gt_scratch_field field)11246c5847eSLionel Landwerlin static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
11346c5847eSLionel Landwerlin enum intel_gt_scratch_field field)
114db56f974STvrtko Ursulin {
11546c5847eSLionel Landwerlin return i915_ggtt_offset(gt->scratch) + field;
116db56f974STvrtko Ursulin }
117db56f974STvrtko Ursulin
intel_gt_has_unrecoverable_error(const struct intel_gt * gt)1183f04bdceSMichał Winiarski static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt)
119cb823ed9SChris Wilson {
1203f04bdceSMichał Winiarski return test_bit(I915_WEDGED_ON_INIT, >->reset.flags) ||
1213f04bdceSMichał Winiarski test_bit(I915_WEDGED_ON_FINI, >->reset.flags);
122cb823ed9SChris Wilson }
123cb823ed9SChris Wilson
intel_gt_is_wedged(const struct intel_gt * gt)1243f04bdceSMichał Winiarski static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
125b761a7b4SChris Wilson {
1263f04bdceSMichał Winiarski GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) &&
1273f04bdceSMichał Winiarski !test_bit(I915_WEDGED, >->reset.flags));
1283f04bdceSMichał Winiarski
1293f04bdceSMichał Winiarski return unlikely(test_bit(I915_WEDGED, >->reset.flags));
130b761a7b4SChris Wilson }
131b761a7b4SChris Wilson
132bec68cc9STvrtko Ursulin int intel_gt_probe_all(struct drm_i915_private *i915);
133bec68cc9STvrtko Ursulin int intel_gt_tiles_init(struct drm_i915_private *i915);
134bec68cc9STvrtko Ursulin void intel_gt_release_all(struct drm_i915_private *i915);
135bec68cc9STvrtko Ursulin
136bec68cc9STvrtko Ursulin #define for_each_gt(gt__, i915__, id__) \
137bec68cc9STvrtko Ursulin for ((id__) = 0; \
138bec68cc9STvrtko Ursulin (id__) < I915_MAX_GT; \
139bec68cc9STvrtko Ursulin (id__)++) \
140bec68cc9STvrtko Ursulin for_each_if(((gt__) = (i915__)->gt[(id__)]))
141bec68cc9STvrtko Ursulin
142792592e7SDaniele Ceraolo Spurio void intel_gt_info_print(const struct intel_gt_info *info,
143792592e7SDaniele Ceraolo Spurio struct drm_printer *p);
144792592e7SDaniele Ceraolo Spurio
1459b4d0598STvrtko Ursulin void intel_gt_watchdog_work(struct work_struct *work);
1469b4d0598STvrtko Ursulin
147115cdccaSJonathan Cavitt enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
148115cdccaSJonathan Cavitt struct drm_i915_gem_object *obj,
149115cdccaSJonathan Cavitt bool always_coherent);
150115cdccaSJonathan Cavitt
15124635c51STvrtko Ursulin #endif /* __INTEL_GT_H__ */
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