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/openbmc/qemu/hw/ppc/
H A Dppc405_uc.c753 static void ppc405ep_compute_clocks(Ppc405CpcState *cpc) in ppc405ep_compute_clocks() argument
761 if ((cpc->pllmr[1] & 0x80000000) && !(cpc->pllmr[1] & 0x40000000)) { in ppc405ep_compute_clocks()
762 M = (((cpc->pllmr[1] >> 20) - 1) & 0xF) + 1; /* FBMUL */ in ppc405ep_compute_clocks()
763 trace_ppc405ep_clocks_compute("FBMUL", (cpc->pllmr[1] >> 20) & 0xF, M); in ppc405ep_compute_clocks()
764 D = 8 - ((cpc->pllmr[1] >> 16) & 0x7); /* FWDA */ in ppc405ep_compute_clocks()
765 trace_ppc405ep_clocks_compute("FWDA", (cpc->pllmr[1] >> 16) & 0x7, D); in ppc405ep_compute_clocks()
766 VCO_out = (uint64_t)cpc->sysclk * M * D; in ppc405ep_compute_clocks()
772 cpc->pllmr[1] &= ~0x80000000; in ppc405ep_compute_clocks()
778 cpc->boot |= 0x00000001; in ppc405ep_compute_clocks()
783 PLL_out = cpc->sysclk; in ppc405ep_compute_clocks()
[all …]
/openbmc/linux/arch/mips/include/asm/
H A Dmips-cpc.h8 # error Please include asm/mips-cps.h rather than asm/mips-cpc.h
17 /* The base address of the CPC registers */
22 * the CPC
34 * a CPC is successfully detected, else -errno.
48 * Returns true if a CPC is present in the system, else false.
59 /* Offsets from the CPC base address to various control blocks */
65 CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_GCB_OFS + off, name) \
66 CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_COCB_OFS + off, redir_##name)
69 CPS_ACCESSOR_RW(cpc, sz, MIPS_CPC_GCB_OFS + off, name) \
70 CPS_ACCESSOR_RW(cpc, sz, MIPS_CPC_COCB_OFS + off, redir_##name)
[all …]
H A Dmips-cps.h106 #include <asm/mips-cpc.h>
123 * mips_cps_cluster_config - return (GCR|CPC)_CONFIG from a cluster
145 * GCR_CONFIG via the redirect region, since the CPC is always in mips_cps_cluster_config()
219 * From CM 3.5 onwards we read CPC_Cx_CONFIG because the CPC is in mips_cps_numvps()
H A Dpm-cps.h11 * The CM & CPC can only handle coherence & power control on a per-core basis,
13 * enter or exit states requiring CM or CPC assistance in unison.
/openbmc/qemu/hw/misc/
H A Dmips_cpc.c31 static inline uint64_t cpc_vp_run_mask(MIPSCPCState *cpc) in cpc_vp_run_mask() argument
33 return (1ULL << cpc->num_vp) - 1; in cpc_vp_run_mask()
38 MIPSCPCState *cpc = (MIPSCPCState *) data.host_ptr; in mips_cpu_reset_async_work() local
42 cpc->vp_running |= 1ULL << cs->cpu_index; in mips_cpu_reset_async_work()
45 static void cpc_run_vp(MIPSCPCState *cpc, uint64_t vp_run) in cpc_run_vp() argument
51 if (i & vp_run & ~cpc->vp_running) { in cpc_run_vp()
58 RUN_ON_CPU_HOST_PTR(cpc)); in cpc_run_vp()
63 static void cpc_stop_vp(MIPSCPCState *cpc, uint64_t vp_stop) in cpc_stop_vp() argument
69 if (i & vp_stop & cpc->vp_running) { in cpc_stop_vp()
71 cpc->vp_running &= ~i; in cpc_stop_vp()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/
H A Dmti,mips-cpc.yaml4 $id: http://devicetree.org/schemas/power/mti,mips-cpc.yaml#
17 const: mti,mips-cpc
22 used to map the MIPS CPC registers block.
33 cpc@1bde0000 {
34 compatible = "mti,mips-cpc";
/openbmc/linux/drivers/net/can/sja1000/
H A DKconfig10 tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card"
13 This driver is for the one, two or four channel CPC-PCI,
14 CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche
18 tristate "EMS CPC-CARD Card"
21 This driver is for the one or two channel CPC-CARD cards from
H A Dems_pci.c25 MODULE_DESCRIPTION("Socket-CAN driver for EMS CPC-PCI/PCIe/104P CAN cards");
114 /* CPC-PCI v1 */
116 /* CPC-PCI v2 */
118 /* CPC-104P v2 */
120 /* CPC-PCIe v3 */
276 card->version = 3; /* CPC-PCI v3 */ in ems_pci_add_card()
282 card->version = 2; /* CPC-PCI v2 */ in ems_pci_add_card()
288 card->version = 1; /* CPC-PCI v1 */ in ems_pci_add_card()
/openbmc/qemu/hw/mips/
H A Dcps.c44 * constraints for the base address of CPC and GIC. in mips_cps_init()
83 /* All VPs are halted on reset. Leave powering up to CPC. */ in mips_cps_realize()
122 object_initialize_child(OBJECT(dev), "cpc", &s->cpc, TYPE_MIPS_CPC); in mips_cps_realize()
123 object_property_set_uint(OBJECT(&s->cpc), "num-vp", s->num_vp, in mips_cps_realize()
125 object_property_set_int(OBJECT(&s->cpc), "vp-start-running", 1, in mips_cps_realize()
127 if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpc), errp)) { in mips_cps_realize()
132 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cpc), 0)); in mips_cps_realize()
159 object_property_set_link(OBJECT(&s->gcr), "cpc", OBJECT(&s->cpc.mr), in mips_cps_realize()
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dp4080si-pre.dtsi101 next-level-cache = <&cpc>;
111 next-level-cache = <&cpc>;
121 next-level-cache = <&cpc>;
131 next-level-cache = <&cpc>;
141 next-level-cache = <&cpc>;
151 next-level-cache = <&cpc>;
161 next-level-cache = <&cpc>;
171 next-level-cache = <&cpc>;
H A Dt104xsi-pre.dtsi81 next-level-cache = <&cpc>;
91 next-level-cache = <&cpc>;
101 next-level-cache = <&cpc>;
111 next-level-cache = <&cpc>;
H A Dp3041si-pre.dtsi97 next-level-cache = <&cpc>;
107 next-level-cache = <&cpc>;
117 next-level-cache = <&cpc>;
127 next-level-cache = <&cpc>;
H A Dp2041si-pre.dtsi96 next-level-cache = <&cpc>;
106 next-level-cache = <&cpc>;
116 next-level-cache = <&cpc>;
126 next-level-cache = <&cpc>;
H A Dp5040si-pre.dtsi109 next-level-cache = <&cpc>;
119 next-level-cache = <&cpc>;
129 next-level-cache = <&cpc>;
139 next-level-cache = <&cpc>;
H A Dt102xsi-pre.dtsi81 next-level-cache = <&cpc>;
91 next-level-cache = <&cpc>;
/openbmc/linux/arch/mips/kernel/
H A Dmips-cpc.c28 cpc_node = of_find_compatible_node(of_root, NULL, "mti,mips-cpc"); in mips_cpc_default_phys_base()
40 * mips_cpc_phys_base - retrieve the physical base address of the CPC
56 /* If the CPC is already enabled, leave it so */ in mips_cpc_phys_base()
66 /* Enable the CPC, mapped at the default address */ in mips_cpc_phys_base()
95 /* Systems with CM >= 3 lock the CPC via mips_cm_lock_other */ in mips_cpc_lock_other()
116 /* Systems with CM >= 3 lock the CPC via mips_cm_lock_other */ in mips_cpc_unlock_other()
H A Dpm-cps.c273 * of a prefetch, since if it is then the CPC sequencer may become in cps_gen_flush_fsb()
392 * Load addresses of required CM & CPC registers. This is done early in cps_gen_entry_code()
444 /* Halt the VP via the CPC VP_STOP register */ in cps_gen_entry_code()
504 /* Determine the CPC command to issue */ in cps_gen_entry_code()
517 /* Issue the CPC command */ in cps_gen_entry_code()
536 /* Barrier to ensure write to CPC command is complete */ in cps_gen_entry_code()
602 * power-up command to the CPC in order to resume operation. in cps_gen_entry_code()
680 * of the cores, the JTAG detect bit indicates that the CPC will in cps_pm_power_notifier()
716 /* Detect whether a CPC is present */ in cps_pm_init()
722 pr_warn("pm-cps: CPC does not support clock gating\n"); in cps_pm_init()
[all …]
/openbmc/linux/drivers/s390/char/
H A Dsclp_ocf.c42 /* Handler for OCF event. Look for the CPC image name. */
46 struct gds_subvector *sv, *netid, *cpc; in sclp_ocf_handler() local
65 cpc = sclp_find_gds_subvector(sv + 1, (void *) sv + sv->length, 2); in sclp_ocf_handler()
66 /* Copy network name and cpc name. */ in sclp_ocf_handler()
74 if (cpc) { in sclp_ocf_handler()
75 size = min(OCF_LENGTH_CPC_NAME, (size_t) cpc->length); in sclp_ocf_handler()
77 memcpy(cpc_name, cpc + 1, size); in sclp_ocf_handler()
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu_init.c221 cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR; in disable_cpc_sram() local
223 for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) { in disable_cpc_sram()
224 if (in_be32(&cpc->cpcsrcr0) & CPC_SRCR0_SRAMEN) { in disable_cpc_sram()
234 clrbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_CDQ_SPEC_DIS); in disable_cpc_sram()
235 out_be32(&cpc->cpccsr0, 0); in disable_cpc_sram()
236 out_be32(&cpc->cpcsrcr0, 0); in disable_cpc_sram()
278 cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR; in enable_cpc() local
293 for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) { in enable_cpc()
295 sprintf(cpc_subarg, "cpc%u", i + 1); in enable_cpc()
300 cpccfg0 = in_be32(&cpc->cpccfg0); in enable_cpc()
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/openbmc/linux/sound/soc/sof/
H A Dipc4-loader.c427 * sof_ipc4_update_cpc_from_manifest - Update the cpc in base config from manifest
443 msg = "No mod_cfg available for CPC lookup in the firmware file's manifest"; in sof_ipc4_update_cpc_from_manifest()
448 * Find the best matching (highest) CPC value based on the module's in sof_ipc4_update_cpc_from_manifest()
451 * The CPC value in each module config entry has been measured and in sof_ipc4_update_cpc_from_manifest()
452 * recorded as a IBS/OBS/CPC triplet and stored in the firmware file's in sof_ipc4_update_cpc_from_manifest()
459 cpc_pick < fw_mod_cfg[i].cpc) in sof_ipc4_update_cpc_from_manifest()
460 cpc_pick = fw_mod_cfg[i].cpc; in sof_ipc4_update_cpc_from_manifest()
462 if (max_cpc < fw_mod_cfg[i].cpc) in sof_ipc4_update_cpc_from_manifest()
463 max_cpc = fw_mod_cfg[i].cpc; in sof_ipc4_update_cpc_from_manifest()
466 basecfg->cpc = cpc_pick; in sof_ipc4_update_cpc_from_manifest()
[all …]
/openbmc/linux/fs/f2fs/
H A Dcheckpoint.c1324 static void update_ckpt_flags(struct f2fs_sb_info *sbi, struct cp_control *cpc) in update_ckpt_flags() argument
1330 if (cpc->reason & CP_UMOUNT) { in update_ckpt_flags()
1345 if (cpc->reason & CP_TRIMMED) in update_ckpt_flags()
1350 if (cpc->reason & CP_UMOUNT) in update_ckpt_flags()
1355 if (cpc->reason & CP_FASTBOOT) in update_ckpt_flags()
1455 static int do_checkpoint(struct f2fs_sb_info *sbi, struct cp_control *cpc) in do_checkpoint() argument
1503 if (__remain_node_summaries(cpc->reason)) in do_checkpoint()
1513 update_ckpt_flags(sbi, cpc); in do_checkpoint()
1527 if ((cpc->reason & CP_UMOUNT) && in do_checkpoint()
1562 if (__remain_node_summaries(cpc->reason)) { in do_checkpoint()
[all …]
/openbmc/linux/drivers/acpi/
H A Dcppc_acpi.c9 * information from a per CPU table called CPC. This table is described in
101 /* Check if a CPC register is in PCC */
102 #define CPC_IN_PCC(cpc) ((cpc)->type == ACPI_TYPE_BUFFER && \ argument
103 (cpc)->cpc_entry.reg.space_id == \
106 /* Check if a CPC register is in FFH */
107 #define CPC_IN_FFH(cpc) ((cpc)->type == ACPI_TYPE_BUFFER && \ argument
108 (cpc)->cpc_entry.reg.space_id == \
111 /* Check if a CPC register is in SystemMemory */
112 #define CPC_IN_SYSTEM_MEMORY(cpc) ((cpc)->type == ACPI_TYPE_BUFFER && \ argument
113 (cpc)->cpc_entry.reg.space_id == \
[all …]
/openbmc/linux/sound/soc/intel/avs/
H A Dpath.c245 cfg->base.cpc = t->cfg_base->cpc; in avs_copier_create()
310 cfg->base.cpc = t->cfg_base->cpc; in avs_peakvol_create()
333 cfg.base.cpc = t->cfg_base->cpc; in avs_updown_mix_create()
354 cfg.base.cpc = t->cfg_base->cpc; in avs_src_create()
372 cfg.base.cpc = t->cfg_base->cpc; in avs_asrc_create()
391 cfg.base.cpc = t->cfg_base->cpc; in avs_aec_create()
410 cfg.base.cpc = t->cfg_base->cpc; in avs_mux_create()
428 cfg.base.cpc = t->cfg_base->cpc; in avs_wov_create()
445 cfg.base.cpc = t->cfg_base->cpc; in avs_micsel_create()
462 cfg.cpc = t->cfg_base->cpc; in avs_modbase_create()
[all …]
/openbmc/qemu/include/hw/misc/
H A Dmips_cpc.h28 /* CPC blocks offsets relative to base address */
32 /* CPC register offsets relative to block offsets */
37 #define TYPE_MIPS_CPC "mips-cpc"
/openbmc/linux/drivers/net/can/usb/
H A Dems_usb.c3 * CAN driver for EMS Dr. Thomas Wuensche CPC-USB/ARM7
32 /* Messages from CPC to PC */
45 /* Messages from the PC to the CPC interface */
212 * NOTE: This driver supports only CPC-USB/ARM7 (LPC2119) yet.
537 * Send the given CPC command synchronously
664 /* CPC-USB will transfer received message to host */ in ems_usb_start()
669 /* CPC-USB will transfer CAN state changes to host */ in ems_usb_start()
674 /* CPC-USB will transfer bus errors to host */ in ems_usb_start()
978 * probe function for new CPC-USB devices

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