| /openbmc/linux/drivers/clk/qcom/ |
| H A D | dispcc-sm8250.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2020, 2022, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
11 #include <linux/reset-controller.h>
13 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
15 #include "clk-alpha-pll.h"
16 #include "clk-branch.h"
17 #include "clk-rcg.h"
18 #include "clk-regmap-divider.h"
75 .clkr.hw.init = &disp_cc_pll0_init
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| H A D | dispcc-sc8280xp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
18 #include "clk-alpha-pll.h"
19 #include "clk-branch.h"
20 #include "clk-rcg.h"
21 #include "clk-regmap-divider.h"
91 .clkr = {
106 .clkr = {
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| H A D | gcc-msm8974.c | 1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
18 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
21 #include "clk-regmap.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
43 .clkr.hw.init = &(struct clk_init_data){
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| H A D | dispcc-sm8450.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
8 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
20 #include "clk-alpha-pll.h"
21 #include "clk-branch.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-regmap.h"
25 #include "clk-regmap-divider.h"
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| H A D | dispcc-sm8550.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
20 #include "clk-alpha-pll.h"
21 #include "clk-branch.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-regmap.h"
25 #include "clk-regmap-divider.h"
26 #include "clk-regmap-mux.h"
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| H A D | gcc-msm8917.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on gcc-msm8953.c:
7 * with parts taken from gcc-qcs404.c:
9 * and gcc-msm8939.c:
11 * adapted with data from clock-gcc-8952.c in Qualcomm's msm-4.9 release:
12 * Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.
16 #include <linux/clk-provider.h>
23 #include <linux/reset-controller.h>
25 #include <dt-bindings/clock/qcom,gcc-msm8917.h>
27 #include "clk-alpha-pll.h"
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| H A D | gcc-msm8916.c | 1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
17 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
20 #include "clk-regmap.h"
21 #include "clk-pll.h"
22 #include "clk-rcg.h"
23 #include "clk-branch.h"
52 .clkr.hw.init = &(struct clk_init_data){
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| H A D | gcc-msm8909.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on gcc-msm8916.c:
7 * adapted with data from clock-gcc-8909.c in Qualcomm's msm-3.18 release:
8 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
12 #include <linux/clk-provider.h>
19 #include <linux/reset-controller.h>
21 #include <dt-bindings/clock/qcom,gcc-msm8909.h>
23 #include "clk-alpha-pll.h"
24 #include "clk-branch.h"
25 #include "clk-pll.h"
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| H A D | dispcc-sc7280.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2021-2022, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
13 #include "clk-alpha-pll.h"
14 #include "clk-branch.h"
15 #include "clk-rcg.h"
16 #include "clk-regmap-divider.h"
54 .clkr = {
117 { .hw = &disp_cc_pll0.clkr.hw },
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| H A D | gcc-qcs404.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
12 #include <linux/reset-controller.h>
14 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
16 #include "clk-alpha-pll.h"
17 #include "clk-branch.h"
18 #include "clk-pll.h"
19 #include "clk-rcg.h"
20 #include "clk-regmap.h"
53 { .index = DT_XO, .name = "xo-board" },
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| H A D | gcc-qdu1000.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
6 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-rcg.h"
17 #include "clk-regmap.h"
18 #include "clk-regmap-divider.h"
19 #include "clk-regmap-mux.h"
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| H A D | gcc-sdm845.c | 1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
19 #include "clk-regmap.h"
20 #include "clk-pll.h"
21 #include "clk-rcg.h"
22 #include "clk-branch.h"
23 #include "clk-alpha-pll.h"
40 .clkr = {
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| H A D | gcc-mdm9607.c | 1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/clock/qcom,gcc-mdm9607.h>
19 #include "clk-regmap.h"
20 #include "clk-alpha-pll.h"
21 #include "clk-pll.h"
22 #include "clk-rcg.h"
23 #include "clk-branch.h"
39 .clkr = {
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| H A D | camcc-sc7180.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/qcom,camcc-sc7180.h>
17 #include "clk-alpha-pll.h"
18 #include "clk-branch.h"
19 #include "clk-rcg.h"
20 #include "clk-regmap.h"
58 .clkr = {
85 .clkr = {
112 .clkr = {
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| H A D | mmcc-sdm660.c | 1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
21 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
24 #include "clk-regmap.h"
25 #include "clk-regmap-divider.h"
26 #include "clk-alpha-pll.h"
27 #include "clk-rcg.h"
28 #include "clk-branch.h"
67 .clkr = {
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| H A D | gcc-sdx65.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
16 #include "clk-alpha-pll.h"
17 #include "clk-branch.h"
18 #include "clk-rcg.h"
19 #include "clk-regmap.h"
20 #include "clk-regmap-divider.h"
21 #include "clk-regmap-mux.h"
38 .clkr = {
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| H A D | gcc-sm8450.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
15 #include "clk-alpha-pll.h"
16 #include "clk-branch.h"
17 #include "clk-rcg.h"
18 #include "clk-regmap.h"
19 #include "clk-regmap-divider.h"
20 #include "clk-regmap-mux.h"
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| H A D | gcc-ipq4019.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
13 #include <linux/reset-controller.h>
18 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
21 #include "clk-regmap.h"
22 #include "clk-rcg.h"
23 #include "clk-branch.h"
25 #include "clk-regmap-divider.h"
28 struct clk_regmap_div, clkr)
45 * struct clk_fepll_vco - vco feedback divider corresponds for FEPLL clocks
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| H A D | mmcc-msm8960.c | 1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
19 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
20 #include <dt-bindings/reset/qcom,mmcc-msm8960.h>
23 #include "clk-regmap.h"
24 #include "clk-pll.h"
25 #include "clk-rcg.h"
26 #include "clk-branch.h"
52 .clkr.hw.init = &(struct clk_init_data){
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| H A D | gcc-sm6350.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-rcg.h"
17 #include "clk-regmap.h"
18 #include "clk-regmap-divider.h"
19 #include "clk-regmap-mux.h"
37 .clkr = {
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| H A D | mmcc-msm8974.c | 1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
17 #include <dt-bindings/reset/qcom,mmcc-msm8974.h>
20 #include "clk-regmap.h"
21 #include "clk-pll.h"
22 #include "clk-rcg.h"
23 #include "clk-branch.h"
52 .clkr.hw.init = &(struct clk_init_data){
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| H A D | mmcc-apq8084.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
11 #include <linux/reset-controller.h>
13 #include <dt-bindings/clock/qcom,mmcc-apq8084.h>
14 #include <dt-bindings/reset/qcom,mmcc-apq8084.h>
17 #include "clk-regmap.h"
18 #include "clk-pll.h"
19 #include "clk-rcg.h"
20 #include "clk-branch.h"
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| H A D | dispcc-sdm845.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
10 #include <linux/reset-controller.h>
12 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-rcg.h"
17 #include "clk-regmap-divider.h"
38 .clkr = {
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| H A D | gcc-sdx75.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
6 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-rcg.h"
17 #include "clk-regmap.h"
18 #include "clk-regmap-divider.h"
19 #include "clk-regmap-mux.h"
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| H A D | gcc-msm8994.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
19 #include "clk-regmap.h"
20 #include "clk-alpha-pll.h"
21 #include "clk-rcg.h"
22 #include "clk-branch.h"
35 .clkr = {
52 .clkr.hw.init = &(struct clk_init_data){
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