Lines Matching +full:clkr +full:- +full:- +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/qcom,camcc-sc7180.h>
17 #include "clk-alpha-pll.h"
18 #include "clk-branch.h"
19 #include "clk-rcg.h"
20 #include "clk-regmap.h"
58 .clkr = {
85 .clkr = {
112 .clkr = {
130 &cam_cc_pll2.clkr.hw,
149 .clkr.hw.init = &(struct clk_init_data){
152 &cam_cc_pll2.clkr.hw,
175 .clkr = {
195 { .hw = &cam_cc_pll1.clkr.hw },
196 { .hw = &cam_cc_pll0.clkr.hw },
206 { .hw = &cam_cc_pll2_out_aux.clkr.hw },
219 { .hw = &cam_cc_pll3.clkr.hw },
220 { .hw = &cam_cc_pll0.clkr.hw },
233 { .hw = &cam_cc_pll1.clkr.hw },
235 { .hw = &cam_cc_pll3.clkr.hw },
236 { .hw = &cam_cc_pll0.clkr.hw },
247 { .hw = &cam_cc_pll3.clkr.hw },
248 { .hw = &cam_cc_pll0.clkr.hw },
258 { .hw = &cam_cc_pll0.clkr.hw },
270 { .hw = &cam_cc_pll1.clkr.hw },
271 { .hw = &cam_cc_pll3.clkr.hw },
272 { .hw = &cam_cc_pll0.clkr.hw },
290 .clkr.hw.init = &(struct clk_init_data){
311 .clkr.hw.init = &(struct clk_init_data){
325 .clkr.hw.init = &(struct clk_init_data){
346 .clkr.hw.init = &(struct clk_init_data){
365 .clkr.hw.init = &(struct clk_init_data){
379 .clkr.hw.init = &(struct clk_init_data){
393 .clkr.hw.init = &(struct clk_init_data){
407 .clkr.hw.init = &(struct clk_init_data){
429 .clkr.hw.init = &(struct clk_init_data){
452 .clkr.hw.init = &(struct clk_init_data){
474 .clkr.hw.init = &(struct clk_init_data){
496 .clkr.hw.init = &(struct clk_init_data){
510 .clkr.hw.init = &(struct clk_init_data){
524 .clkr.hw.init = &(struct clk_init_data){
538 .clkr.hw.init = &(struct clk_init_data){
553 .clkr.hw.init = &(struct clk_init_data){
576 .clkr.hw.init = &(struct clk_init_data){
599 .clkr.hw.init = &(struct clk_init_data){
621 .clkr.hw.init = &(struct clk_init_data){
642 .clkr.hw.init = &(struct clk_init_data){
656 .clkr.hw.init = &(struct clk_init_data){
670 .clkr.hw.init = &(struct clk_init_data){
684 .clkr.hw.init = &(struct clk_init_data){
698 .clkr.hw.init = &(struct clk_init_data){
717 .clkr.hw.init = &(struct clk_init_data){
729 .clkr = {
735 &cam_cc_slow_ahb_clk_src.clkr.hw,
747 .clkr = {
753 &cam_cc_fast_ahb_clk_src.clkr.hw,
765 .clkr = {
778 .clkr = {
784 &cam_cc_bps_clk_src.clkr.hw,
796 .clkr = {
809 .clkr = {
815 &cam_cc_cci_0_clk_src.clkr.hw,
827 .clkr = {
833 &cam_cc_cci_1_clk_src.clkr.hw,
845 .clkr = {
851 &cam_cc_slow_ahb_clk_src.clkr.hw,
863 .clkr = {
869 &cam_cc_slow_ahb_clk_src.clkr.hw,
881 .clkr = {
887 &cam_cc_csi0phytimer_clk_src.clkr.hw,
899 .clkr = {
905 &cam_cc_csi1phytimer_clk_src.clkr.hw,
917 .clkr = {
923 &cam_cc_csi2phytimer_clk_src.clkr.hw,
935 .clkr = {
941 &cam_cc_csi3phytimer_clk_src.clkr.hw,
953 .clkr = {
959 &cam_cc_cphy_rx_clk_src.clkr.hw,
971 .clkr = {
977 &cam_cc_cphy_rx_clk_src.clkr.hw,
989 .clkr = {
995 &cam_cc_cphy_rx_clk_src.clkr.hw,
1007 .clkr = {
1013 &cam_cc_cphy_rx_clk_src.clkr.hw,
1025 .clkr = {
1031 &cam_cc_icp_clk_src.clkr.hw,
1043 .clkr = {
1056 .clkr = {
1062 &cam_cc_ife_0_clk_src.clkr.hw,
1074 .clkr = {
1080 &cam_cc_cphy_rx_clk_src.clkr.hw,
1092 .clkr = {
1098 &cam_cc_ife_0_csid_clk_src.clkr.hw,
1110 .clkr = {
1116 &cam_cc_ife_0_clk_src.clkr.hw,
1128 .clkr = {
1141 .clkr = {
1147 &cam_cc_ife_1_clk_src.clkr.hw,
1159 .clkr = {
1165 &cam_cc_cphy_rx_clk_src.clkr.hw,
1177 .clkr = {
1183 &cam_cc_ife_1_csid_clk_src.clkr.hw,
1195 .clkr = {
1201 &cam_cc_ife_1_clk_src.clkr.hw,
1213 .clkr = {
1219 &cam_cc_ife_lite_clk_src.clkr.hw,
1231 .clkr = {
1237 &cam_cc_cphy_rx_clk_src.clkr.hw,
1249 .clkr = {
1255 &cam_cc_ife_lite_csid_clk_src.clkr.hw,
1267 .clkr = {
1273 &cam_cc_slow_ahb_clk_src.clkr.hw,
1285 .clkr = {
1291 &cam_cc_fast_ahb_clk_src.clkr.hw,
1303 .clkr = {
1316 .clkr = {
1322 &cam_cc_ipe_0_clk_src.clkr.hw,
1334 .clkr = {
1340 &cam_cc_jpeg_clk_src.clkr.hw,
1352 .clkr = {
1358 &cam_cc_lrme_clk_src.clkr.hw,
1370 .clkr = {
1376 &cam_cc_mclk0_clk_src.clkr.hw,
1388 .clkr = {
1394 &cam_cc_mclk1_clk_src.clkr.hw,
1406 .clkr = {
1412 &cam_cc_mclk2_clk_src.clkr.hw,
1424 .clkr = {
1430 &cam_cc_mclk3_clk_src.clkr.hw,
1442 .clkr = {
1448 &cam_cc_mclk4_clk_src.clkr.hw,
1460 .clkr = {
1473 .clkr = {
1535 [CAM_CC_BPS_AHB_CLK] = &cam_cc_bps_ahb_clk.clkr,
1536 [CAM_CC_BPS_AREG_CLK] = &cam_cc_bps_areg_clk.clkr,
1537 [CAM_CC_BPS_AXI_CLK] = &cam_cc_bps_axi_clk.clkr,
1538 [CAM_CC_BPS_CLK] = &cam_cc_bps_clk.clkr,
1539 [CAM_CC_BPS_CLK_SRC] = &cam_cc_bps_clk_src.clkr,
1540 [CAM_CC_CAMNOC_AXI_CLK] = &cam_cc_camnoc_axi_clk.clkr,
1541 [CAM_CC_CCI_0_CLK] = &cam_cc_cci_0_clk.clkr,
1542 [CAM_CC_CCI_0_CLK_SRC] = &cam_cc_cci_0_clk_src.clkr,
1543 [CAM_CC_CCI_1_CLK] = &cam_cc_cci_1_clk.clkr,
1544 [CAM_CC_CCI_1_CLK_SRC] = &cam_cc_cci_1_clk_src.clkr,
1545 [CAM_CC_CORE_AHB_CLK] = &cam_cc_core_ahb_clk.clkr,
1546 [CAM_CC_CPAS_AHB_CLK] = &cam_cc_cpas_ahb_clk.clkr,
1547 [CAM_CC_CPHY_RX_CLK_SRC] = &cam_cc_cphy_rx_clk_src.clkr,
1548 [CAM_CC_CSI0PHYTIMER_CLK] = &cam_cc_csi0phytimer_clk.clkr,
1549 [CAM_CC_CSI0PHYTIMER_CLK_SRC] = &cam_cc_csi0phytimer_clk_src.clkr,
1550 [CAM_CC_CSI1PHYTIMER_CLK] = &cam_cc_csi1phytimer_clk.clkr,
1551 [CAM_CC_CSI1PHYTIMER_CLK_SRC] = &cam_cc_csi1phytimer_clk_src.clkr,
1552 [CAM_CC_CSI2PHYTIMER_CLK] = &cam_cc_csi2phytimer_clk.clkr,
1553 [CAM_CC_CSI2PHYTIMER_CLK_SRC] = &cam_cc_csi2phytimer_clk_src.clkr,
1554 [CAM_CC_CSI3PHYTIMER_CLK] = &cam_cc_csi3phytimer_clk.clkr,
1555 [CAM_CC_CSI3PHYTIMER_CLK_SRC] = &cam_cc_csi3phytimer_clk_src.clkr,
1556 [CAM_CC_CSIPHY0_CLK] = &cam_cc_csiphy0_clk.clkr,
1557 [CAM_CC_CSIPHY1_CLK] = &cam_cc_csiphy1_clk.clkr,
1558 [CAM_CC_CSIPHY2_CLK] = &cam_cc_csiphy2_clk.clkr,
1559 [CAM_CC_CSIPHY3_CLK] = &cam_cc_csiphy3_clk.clkr,
1560 [CAM_CC_FAST_AHB_CLK_SRC] = &cam_cc_fast_ahb_clk_src.clkr,
1561 [CAM_CC_ICP_CLK] = &cam_cc_icp_clk.clkr,
1562 [CAM_CC_ICP_CLK_SRC] = &cam_cc_icp_clk_src.clkr,
1563 [CAM_CC_IFE_0_AXI_CLK] = &cam_cc_ife_0_axi_clk.clkr,
1564 [CAM_CC_IFE_0_CLK] = &cam_cc_ife_0_clk.clkr,
1565 [CAM_CC_IFE_0_CLK_SRC] = &cam_cc_ife_0_clk_src.clkr,
1566 [CAM_CC_IFE_0_CPHY_RX_CLK] = &cam_cc_ife_0_cphy_rx_clk.clkr,
1567 [CAM_CC_IFE_0_CSID_CLK] = &cam_cc_ife_0_csid_clk.clkr,
1568 [CAM_CC_IFE_0_CSID_CLK_SRC] = &cam_cc_ife_0_csid_clk_src.clkr,
1569 [CAM_CC_IFE_0_DSP_CLK] = &cam_cc_ife_0_dsp_clk.clkr,
1570 [CAM_CC_IFE_1_AXI_CLK] = &cam_cc_ife_1_axi_clk.clkr,
1571 [CAM_CC_IFE_1_CLK] = &cam_cc_ife_1_clk.clkr,
1572 [CAM_CC_IFE_1_CLK_SRC] = &cam_cc_ife_1_clk_src.clkr,
1573 [CAM_CC_IFE_1_CPHY_RX_CLK] = &cam_cc_ife_1_cphy_rx_clk.clkr,
1574 [CAM_CC_IFE_1_CSID_CLK] = &cam_cc_ife_1_csid_clk.clkr,
1575 [CAM_CC_IFE_1_CSID_CLK_SRC] = &cam_cc_ife_1_csid_clk_src.clkr,
1576 [CAM_CC_IFE_1_DSP_CLK] = &cam_cc_ife_1_dsp_clk.clkr,
1577 [CAM_CC_IFE_LITE_CLK] = &cam_cc_ife_lite_clk.clkr,
1578 [CAM_CC_IFE_LITE_CLK_SRC] = &cam_cc_ife_lite_clk_src.clkr,
1579 [CAM_CC_IFE_LITE_CPHY_RX_CLK] = &cam_cc_ife_lite_cphy_rx_clk.clkr,
1580 [CAM_CC_IFE_LITE_CSID_CLK] = &cam_cc_ife_lite_csid_clk.clkr,
1581 [CAM_CC_IFE_LITE_CSID_CLK_SRC] = &cam_cc_ife_lite_csid_clk_src.clkr,
1582 [CAM_CC_IPE_0_AHB_CLK] = &cam_cc_ipe_0_ahb_clk.clkr,
1583 [CAM_CC_IPE_0_AREG_CLK] = &cam_cc_ipe_0_areg_clk.clkr,
1584 [CAM_CC_IPE_0_AXI_CLK] = &cam_cc_ipe_0_axi_clk.clkr,
1585 [CAM_CC_IPE_0_CLK] = &cam_cc_ipe_0_clk.clkr,
1586 [CAM_CC_IPE_0_CLK_SRC] = &cam_cc_ipe_0_clk_src.clkr,
1587 [CAM_CC_JPEG_CLK] = &cam_cc_jpeg_clk.clkr,
1588 [CAM_CC_JPEG_CLK_SRC] = &cam_cc_jpeg_clk_src.clkr,
1589 [CAM_CC_LRME_CLK] = &cam_cc_lrme_clk.clkr,
1590 [CAM_CC_LRME_CLK_SRC] = &cam_cc_lrme_clk_src.clkr,
1591 [CAM_CC_MCLK0_CLK] = &cam_cc_mclk0_clk.clkr,
1592 [CAM_CC_MCLK0_CLK_SRC] = &cam_cc_mclk0_clk_src.clkr,
1593 [CAM_CC_MCLK1_CLK] = &cam_cc_mclk1_clk.clkr,
1594 [CAM_CC_MCLK1_CLK_SRC] = &cam_cc_mclk1_clk_src.clkr,
1595 [CAM_CC_MCLK2_CLK] = &cam_cc_mclk2_clk.clkr,
1596 [CAM_CC_MCLK2_CLK_SRC] = &cam_cc_mclk2_clk_src.clkr,
1597 [CAM_CC_MCLK3_CLK] = &cam_cc_mclk3_clk.clkr,
1598 [CAM_CC_MCLK3_CLK_SRC] = &cam_cc_mclk3_clk_src.clkr,
1599 [CAM_CC_MCLK4_CLK] = &cam_cc_mclk4_clk.clkr,
1600 [CAM_CC_MCLK4_CLK_SRC] = &cam_cc_mclk4_clk_src.clkr,
1601 [CAM_CC_PLL0] = &cam_cc_pll0.clkr,
1602 [CAM_CC_PLL1] = &cam_cc_pll1.clkr,
1603 [CAM_CC_PLL2] = &cam_cc_pll2.clkr,
1604 [CAM_CC_PLL2_OUT_AUX] = &cam_cc_pll2_out_aux.clkr,
1605 [CAM_CC_PLL3] = &cam_cc_pll3.clkr,
1606 [CAM_CC_SLOW_AHB_CLK_SRC] = &cam_cc_slow_ahb_clk_src.clkr,
1607 [CAM_CC_SOC_AHB_CLK] = &cam_cc_soc_ahb_clk.clkr,
1608 [CAM_CC_SYS_TMR_CLK] = &cam_cc_sys_tmr_clk.clkr,
1637 { .compatible = "qcom,sc7180-camcc" },
1647 ret = devm_pm_runtime_enable(&pdev->dev); in cam_cc_sc7180_probe()
1651 ret = devm_pm_clk_create(&pdev->dev); in cam_cc_sc7180_probe()
1655 ret = pm_clk_add(&pdev->dev, "xo"); in cam_cc_sc7180_probe()
1657 dev_err(&pdev->dev, "Failed to acquire XO clock\n"); in cam_cc_sc7180_probe()
1661 ret = pm_clk_add(&pdev->dev, "iface"); in cam_cc_sc7180_probe()
1663 dev_err(&pdev->dev, "Failed to acquire iface clock\n"); in cam_cc_sc7180_probe()
1667 ret = pm_runtime_resume_and_get(&pdev->dev); in cam_cc_sc7180_probe()
1674 pm_runtime_put(&pdev->dev); in cam_cc_sc7180_probe()
1684 pm_runtime_put(&pdev->dev); in cam_cc_sc7180_probe()
1686 dev_err(&pdev->dev, "Failed to register CAM CC clocks\n"); in cam_cc_sc7180_probe()
1700 .name = "cam_cc-sc7180",