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/openbmc/linux/arch/m68k/fpsp040/
H A Dstan.S27 | k = N mod 2, so in particular, k = 0 or 1.
62 BOUNDS1: .long 0x3FD78000,0x4004BC7E
63 TWOBYPI: .long 0x3FE45F30,0x6DC9C883
65 TANQ4: .long 0x3EA0B759,0xF50F8688
66 TANP3: .long 0xBEF2BAA5,0xA8924F04
68 TANQ3: .long 0xBF346F59,0xB39BA65F,0x00000000,0x00000000
70 TANP2: .long 0x3FF60000,0xE073D3FC,0x199C4A00,0x00000000
72 TANQ2: .long 0x3FF90000,0xD23CD684,0x15D95FA1,0x00000000
74 TANP1: .long 0xBFFC0000,0x8895A6C5,0xFB423BCA,0x00000000
76 TANQ1: .long 0xBFFD0000,0xEEF57E0D,0xA84BC8CE,0x00000000
[all …]
/openbmc/u-boot/include/configs/
H A Dstv0991.h13 #define PHYS_SDRAM_1 0x00000000
15 #define PHYS_SDRAM_1_SIZE 0x00198000
17 #define CONFIG_ENV_SIZE 0x10000
19 #define CONFIG_ENV_OFFSET 0x30000
28 #define CONFIG_SYS_LOAD_ADDR 0x00000000
29 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000
30 #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000
44 #define CONFIG_SYS_MEMTEST_START 0x0000
49 #define CONFIG_BOOTCOMMAND "go 0x40040000"
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Drenesas,rcar-rproc.yaml54 reg = <0x0 0x40040000 0x0 0x1fc0000>;
/openbmc/u-boot/board/freescale/m54418twr/
H A Dm54418twr.c24 return 0; in checkboard()
36 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; in dram_init()
44 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; in dram_init()
46 for (i = 0x13; i < 0x20; i++) { in dram_init()
51 out_8(&pm->pmcr0, 0x2E); in dram_init()
57 out_be32(&sdram->rcrcr, 0x40000000); in dram_init()
58 out_be32(&sdram->padcr, 0x01030203); in dram_init()
60 out_be32(&sdram->cr00, 0x01010101); in dram_init()
61 out_be32(&sdram->cr01, 0x00000101); in dram_init()
62 out_be32(&sdram->cr02, 0x01010100); in dram_init()
[all …]
H A Dsbf_dram_init.S12 move.l #0xFC04002D, %a1
16 move.l #0xEC094060, %a1
17 move.b #0, (%a1)
20 move.l #0xEC09001A, %a1
21 move.w #0xE01D, (%a1)
24 move.l #0xFC0B8180, %a1
25 move.l #0x00000000, (%a1)
26 move.l #0x40000000, (%a1)
28 move.l #0xFC0B81AC, %a1
29 move.l #0x01030203, (%a1)
[all …]
/openbmc/u-boot/board/sysam/stmark2/
H A Dsbf_dram_init.S8 .equ PPMCR0, 0xfc04002d
9 .equ MSCR_SDRAMC, 0xec094060
10 .equ MISCCR2, 0xec09001a
11 .equ DDR_RCR, 0xfc0b8180
12 .equ DDR_PADCR, 0xfc0b81ac
13 .equ DDR_CR00, 0xfc0b8000
14 .equ DDR_CR06, 0xfc0b8018
15 .equ DDR_CR09, 0xfc0b8024
16 .equ DDR_CR40, 0xfc0b80a0
17 .equ DDR_CR45, 0xfc0b80b4
[all …]
/openbmc/u-boot/board/gdsys/a38x/
H A Dcontrolcenterdc.c25 #define DB_GP_88F68XX_GPP_OUT_ENA_LOW 0x7fffffff
26 #define DB_GP_88F68XX_GPP_OUT_ENA_MID 0xffffefff
28 #define DB_GP_88F68XX_GPP_OUT_VAL_LOW 0x0
29 #define DB_GP_88F68XX_GPP_OUT_VAL_MID 0x00001000
30 #define DB_GP_88F68XX_GPP_POL_LOW 0x0
31 #define DB_GP_88F68XX_GPP_POL_MID 0x0
43 return 0; in get_tpm()
53 0x1, /* active interfaces */
55 { { { {0x1, 0, 0, 0},
56 {0x1, 0, 0, 0},
[all …]
/openbmc/qemu/hw/arm/
H A Dstm32f405_soc.c33 #define RCC_ADDR 0x40023800
34 #define SYSCFG_ADD 0x40013800
35 static const uint32_t usart_addr[] = { 0x40011000, 0x40004400, 0x40004800,
36 0x40004C00, 0x40005000, 0x40011400,
37 0x40007800, 0x40007C00 };
39 static const uint32_t timer_addr[] = { 0x40000000, 0x40000400,
40 0x40000800, 0x40000C00 };
41 static const uint32_t adc_addr[] = { 0x40012000, 0x40012100, 0x40012200,
42 0x40012300, 0x40012400, 0x40012500 };
43 static const uint32_t spi_addr[] = { 0x40013000, 0x40003800, 0x40003C00,
[all …]
/openbmc/linux/arch/m68k/ifpsp060/
H A Dfpsp.sa1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000
2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000
3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930
[all …]
/openbmc/qemu/hw/riscv/
H A Dopentitan.c41 [IBEX_DEV_ROM] = { 0x00008000, 0x8000 },
42 [IBEX_DEV_RAM] = { 0x10000000, 0x20000 },
43 [IBEX_DEV_FLASH] = { 0x20000000, 0x100000 },
44 [IBEX_DEV_UART] = { 0x40000000, 0x40 },
45 [IBEX_DEV_GPIO] = { 0x40040000, 0x40 },
46 [IBEX_DEV_SPI_DEVICE] = { 0x40050000, 0x2000 },
47 [IBEX_DEV_I2C] = { 0x40080000, 0x80 },
48 [IBEX_DEV_PATTGEN] = { 0x400e0000, 0x40 },
49 [IBEX_DEV_TIMER] = { 0x40100000, 0x200 },
50 [IBEX_DEV_OTP_CTRL] = { 0x40130000, 0x2000 },
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32f746.dtsi53 #clock-cells = <0>;
55 clock-frequency = <0>;
59 #clock-cells = <0>;
65 #clock-cells = <0>;
71 #clock-cells = <0>;
80 #size-cells = <0>;
82 reg = <0x40000000 0x400>;
83 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
102 #size-cells = <0>;
104 reg = <0x40000400 0x400>;
[all …]
H A Dstm32f429.dtsi58 #clock-cells = <0>;
60 clock-frequency = <0>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
76 #clock-cells = <0>;
78 clock-frequency = <0>;
85 reg = <0x1fff7800 0x400>;
89 reg = <0x22c 0x2>;
92 reg = <0x22e 0x2>;
98 #size-cells = <0>;
[all …]
H A Dstm32h743.dtsi54 #clock-cells = <0>;
56 clock-frequency = <0>;
60 #clock-cells = <0>;
66 #clock-cells = <0>;
68 clock-frequency = <0>;
75 reg = <0x40000c00 0x400>;
82 #size-cells = <0>;
84 reg = <0x40002400 0x400>;
95 trigger@0 {
97 reg = <0>;
[all …]
/openbmc/linux/arch/arm/mach-lpc32xx/
H A Dlpc32xx.h17 * AHB 0 physical base addresses
19 #define LPC32XX_SLC_BASE 0x20020000
20 #define LPC32XX_SSP0_BASE 0x20084000
21 #define LPC32XX_SPI1_BASE 0x20088000
22 #define LPC32XX_SSP1_BASE 0x2008C000
23 #define LPC32XX_SPI2_BASE 0x20090000
24 #define LPC32XX_I2S0_BASE 0x20094000
25 #define LPC32XX_SD_BASE 0x20098000
26 #define LPC32XX_I2S1_BASE 0x2009C000
27 #define LPC32XX_MLC_BASE 0x200A8000
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dstm32f429.dtsi52 #clock-cells = <0>;
54 clock-frequency = <0>;
58 #clock-cells = <0>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
72 clock-frequency = <0>;
79 reg = <0x40000000 0x400>;
81 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
87 #size-cells = <0>;
89 reg = <0x40000000 0x400>;
[all …]
/openbmc/linux/arch/m68k/ifpsp060/src/
H A Dfplsp.S37 short 0x0000
39 short 0x0000
41 short 0x0000
44 short 0x0000
46 short 0x0000
48 short 0x0000
51 short 0x0000
53 short 0x0000
55 short 0x0000
58 short 0x0000
[all …]
H A Dfpsp.S43 set _off_bsun, 0x00
44 set _off_snan, 0x04
45 set _off_operr, 0x08
46 set _off_ovfl, 0x0c
47 set _off_unfl, 0x10
48 set _off_dz, 0x14
49 set _off_inex, 0x18
50 set _off_fline, 0x1c
51 set _off_fpu_dis, 0x20
52 set _off_trap, 0x24
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8821c.c57 efuse->rfe_option = map->rfe_option & 0x1f; in rtw8821c_read_efuse()
62 efuse->lna_type_2g = map->lna_type_2g[0]; in rtw8821c_read_efuse()
63 efuse->lna_type_5g = map->lna_type_5g[0]; in rtw8821c_read_efuse()
65 efuse->country_code[0] = map->country_code[0]; in rtw8821c_read_efuse()
68 efuse->regd = map->rf_board_option & 0x7; in rtw8821c_read_efuse()
69 efuse->thermal_meter[0] = map->thermal_meter; in rtw8821c_read_efuse()
74 hal->pkg_type = map->rfe_option & BIT(5) ? 1 : 0; in rtw8821c_read_efuse()
77 case 0x2: in rtw8821c_read_efuse()
78 case 0x4: in rtw8821c_read_efuse()
79 case 0x7: in rtw8821c_read_efuse()
[all …]
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]
/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_type.h12 #define IXGBE_DEV_ID_82598 0x10B6
13 #define IXGBE_DEV_ID_82598_BX 0x1508
14 #define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6
15 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7
16 #define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB
17 #define IXGBE_DEV_ID_82598AT 0x10C8
18 #define IXGBE_DEV_ID_82598AT2 0x150B
19 #define IXGBE_DEV_ID_82598EB_CX4 0x10DD
20 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT 0x10EC
21 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT 0x10F1
[all …]