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/openbmc/linux/arch/mips/include/asm/
H A Dbmips.h19 /* NOTE: the CBR register returns a PA, and it can be above 0xff00_0000 */
24 #define BMIPS_RAC_CONFIG 0x00000000
25 #define BMIPS_RAC_ADDRESS_RANGE 0x00000004
26 #define BMIPS_RAC_CONFIG_1 0x00000008
27 #define BMIPS_L2_CONFIG 0x0000000c
28 #define BMIPS_LMB_CONTROL 0x0000001c
29 #define BMIPS_SYSTEM_BASE 0x00000020
30 #define BMIPS_PERF_GLOBAL_CONTROL 0x00020000
31 #define BMIPS_PERF_CONTROL_0 0x00020004
32 #define BMIPS_PERF_CONTROL_1 0x00020008
[all …]
/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dqoriq-thermal.yaml16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
/openbmc/qemu/hw/audio/
H A Dhda-codec-common.h28 #define QEMU_HDA_ID_OUTPUT ((QEMU_HDA_ID_VENDOR << 16) | 0x12)
29 #define QEMU_HDA_ID_DUPLEX ((QEMU_HDA_ID_VENDOR << 16) | 0x22)
30 #define QEMU_HDA_ID_MICRO ((QEMU_HDA_ID_VENDOR << 16) | 0x32)
37 #define QEMU_HDA_ID_OUTPUT ((QEMU_HDA_ID_VENDOR << 16) | 0x11)
38 #define QEMU_HDA_ID_DUPLEX ((QEMU_HDA_ID_VENDOR << 16) | 0x21)
39 #define QEMU_HDA_ID_MICRO ((QEMU_HDA_ID_VENDOR << 16) | 0x31)
146 .val = 0x00100101,
149 .val = 0x00010001,
163 .val = 0x00020002,
178 .val = 0,
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-imx8mq.dtsi47 reg = <0x00000000 0x40000000 0 0xc0000000>;
52 reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
53 <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
82 reg = <0x0 0x30670000 0x0 0x10000>;
93 reg = <0x0 0x30200000 0x0 0x10000>;
104 reg = <0x0 0x30210000 0x0 0x10000>;
115 reg = <0x0 0x30220000 0x0 0x10000>;
126 reg = <0x0 0x30230000 0x0 0x10000>;
137 reg = <0x0 0x30240000 0x0 0x10000>;
148 reg = <0x0 0x30260000 0x0 0x10000>;
[all …]
/openbmc/linux/fs/smb/server/
H A Dndr.c27 memset(n->data + n->offset, 0, 1024); in try_to_realloc_ndr_blob()
28 return 0; in try_to_realloc_ndr_blob()
43 return 0; in ndr_write_int16()
58 return 0; in ndr_write_int32()
73 return 0; in ndr_write_int64()
88 return 0; in ndr_write_bytes()
107 return 0; in ndr_write_string()
123 return 0; in ndr_read_string()
134 return 0; in ndr_read_bytes()
145 return 0; in ndr_read_int16()
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dt1023si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
H A Dt1040si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1012a.dtsi32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0>;
38 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
54 arm,psci-suspend-param = <0x0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
85 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
93 <0x0 0x1402000 0 0x2000>, /* GICC */
[all …]
H A Dfsl-ls1046a.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0>;
44 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
53 reg = <0x1>;
54 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
63 reg = <0x2>;
64 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
73 reg = <0x3>;
74 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1043a.dtsi37 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0>;
49 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
58 reg = <0x1>;
59 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
68 reg = <0x2>;
69 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
78 reg = <0x3>;
79 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1088a.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
42 reg = <0x1>;
43 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
51 reg = <0x2>;
52 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
60 reg = <0x3>;
61 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls208xa.dtsi33 #size-cells = <0>;
38 reg = <0x00000000 0x80000000 0 0x80000000>;
44 #clock-cells = <0>;
51 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
52 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
53 <0x0 0x0c0c0000 0 0x2000>, /* GICC */
54 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
55 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
61 interrupts = <1 9 0x4>;
66 reg = <0x0 0x6020000 0 0x20000>;
[all …]
H A Dfsl-ls1028a.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
31 i-cache-size = <0xc000>;
34 d-cache-size = <0x8000>;
45 reg = <0x1>;
47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
48 i-cache-size = <0xc000>;
51 d-cache-size = <0x8000>;
[all …]
H A Dimx8mq.dtsi47 #clock-cells = <0>;
54 #clock-cells = <0>;
61 #clock-cells = <0>;
68 #clock-cells = <0>;
75 #clock-cells = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
103 #size-cells = <0>;
105 A53_0: cpu@0 {
[all …]
/openbmc/linux/include/uapi/scsi/fc/
H A Dfc_els.h20 * ELS Command codes - byte 0 of the frame payload
23 ELS_LS_RJT = 0x01, /* ESL reject */
24 ELS_LS_ACC = 0x02, /* ESL Accept */
25 ELS_PLOGI = 0x03, /* N_Port login */
26 ELS_FLOGI = 0x04, /* F_Port login */
27 ELS_LOGO = 0x05, /* Logout */
28 ELS_ABTX = 0x06, /* Abort exchange - obsolete */
29 ELS_RCS = 0x07, /* read connection status */
30 ELS_RES = 0x08, /* read exchange status block */
31 ELS_RSS = 0x09, /* read sequence status block */
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-tf201.dts67 reg = <0x4d>;
82 mount-matrix = "-1", "0", "0",
83 "0", "-1", "0",
84 "0", "0", "-1";
88 mount-matrix = "0", "-1", "0",
89 "-1", "0", "0",
90 "0", "0", "-1";
95 mount-matrix = "1", "0", "0",
96 "0", "-1", "0",
97 "0", "0", "1";
[all …]
H A Dtegra30-pegatron-chagall.dts49 reg = <0x80000000 0x40000000>;
59 alloc-ranges = <0x80000000 0x30000000>;
60 size = <0x10000000>; /* 256MiB */
67 reg = <0xbeb00000 0x10000>; /* 64kB */
68 console-size = <0x8000>; /* 32kB */
69 record-size = <0x400>; /* 1kB */
74 reg = <0xbfe00000 0x200000>; /* 2MB */
100 pinctrl-0 = <&state_default>;
144 nvidia,lock = <0>;
145 nvidia,io-reset = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a.dtsi31 #size-cells = <0>;
36 reg = <0xf00>;
37 clocks = <&clockgen 1 0>;
44 reg = <0xf01>;
45 clocks = <&clockgen 1 0>;
50 memory@0 {
52 reg = <0x0 0x0 0x0 0x0>;
57 #clock-cells = <0>;
80 offset = <0xb0>;
81 mask = <0x02>;
[all …]
/openbmc/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4.xml.h57 VG1 = 0,
67 MIXER0 = 0,
73 INTF_LCDC_DTV = 0,
85 FRAME_LINEAR = 0,
91 SCALE_FIR = 0,
97 DMA_P = 0,
102 #define MDP4_IRQ_OVERLAY0_DONE 0x00000001
103 #define MDP4_IRQ_OVERLAY1_DONE 0x00000002
104 #define MDP4_IRQ_DMA_S_DONE 0x00000004
105 #define MDP4_IRQ_DMA_E_DONE 0x00000008
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dtable.c7 0x800, 0x8020D010,
8 0x804, 0x080112E0,
9 0x808, 0x0E028233,
10 0x80C, 0x12131113,
11 0x810, 0x20101263,
12 0x814, 0x020C3D10,
13 0x818, 0x03A00385,
14 0x820, 0x00000000,
15 0x824, 0x00030FE0,
16 0x828, 0x00000000,
[all …]