arm64: dts: ti: k3-j784s4-evm: Remove Pinmux for CTS and RTS in wkup_uart0

[ Upstream commit d29a6cf980572d8cf7b63935716fca663e2610f0 ]

Only Tx and Rx Signal lines for wkup_uart0 are brought out on

arm64: dts: ti: k3-j784s4-evm: Remove Pinmux for CTS and RTS in wkup_uart0

[ Upstream commit d29a6cf980572d8cf7b63935716fca663e2610f0 ]

Only Tx and Rx Signal lines for wkup_uart0 are brought out on
the J784S4 EVM from SoC, but CTS and RTS signal lines are not
brought on the EVM. Thus, remove pinmux for CTS and RTS signal
lines for wkup_uart0 in J784S4.

Fixes: 6fa5d37a2f34 ("arm64: dts: ti: k3-j784s4-evm: Add mcu and wakeup uarts")
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Link: https://lore.kernel.org/r/20240214105846.1096733-5-b-kapoor@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

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arm64: dts: ti: k3-j784s4-evm: Add phase tags marking

bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to cover U-Boot challenges with DT.
That's why add it also to Linu

arm64: dts: ti: k3-j784s4-evm: Add phase tags marking

bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to cover U-Boot challenges with DT.
That's why add it also to Linux to be aligned with bootloader requirement.

wkup_i2c0, mcu_uart0, main_uart8, fss, ospi0, ospi1, main_sdhci0 and
main_sdhci1 are required for bootloader operation on TI K3 J784S4 EVM.
These IPs along with pinmuxes need to be marked for all bootloader phases,
hence add bootph-all to these nodes in kernel dts.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230811192030.3480616-3-a-nandan@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ADC

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for ADC nodes were not updated to align with new
regions,

arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ADC

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for ADC nodes were not updated to align with new
regions, due to this while probing ADC driver out of range
error was seen.

Pin mux offsets for ADC nodes are corrected in this patch.

Fixes: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230809050108.751164-1-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ospi

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for OSPI nodes were not updated to align with new
regions

arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ospi

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for OSPI nodes were not updated to align with new
regions, due to this while setting ospi pin muxes out of range
error was seen.

Pin mux offsets for OSPI nodes are corrected in this patch.

Fixes: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230802114126.162445-1-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Add Support for UFS peripheral

J784S4 EVM board has 32GB Non-Volatile UFS Memory.
So enabling UFS at board level.

UFS flash details are documented in board data sheet

arm64: dts: ti: k3-j784s4-evm: Add Support for UFS peripheral

J784S4 EVM board has 32GB Non-Volatile UFS Memory.
So enabling UFS at board level.

UFS flash details are documented in board data sheet[1]
Section 1.2 Key Features and Interfaces.

[1] https://www.ti.com/lit/pdf/spruj62

Cc: Chai Wenle <Wenle.Chai@windriver.com>
Tested-by: Chai Wenle <Wenle.Chai@windriver.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230725133607.2021379-3-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: add missing space before {

Add missing whitespace between node name/label and opening {.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Lechn

arm64: dts: ti: add missing space before {

Add missing whitespace between node name/label and opening {.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Lechner <david@lechnology.com>
Link: https://lore.kernel.org/r/20230705145755.292927-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: Unify pin group node names for make dtbs checks

Prepare for pinctrl-single yaml binding and unify pin group node names.

Let's standardize on pin group node naming ending in -pins. A

arm64: dts: ti: Unify pin group node names for make dtbs checks

Prepare for pinctrl-single yaml binding and unify pin group node names.

Let's standardize on pin group node naming ending in -pins. As we don't
necessarily have a SoC specific compatible property for pinctrl-single.
I'd rather not add a pattern match for pins somewhere in the name for all
the users.

Trying to add matches for pins-default will be futile as on the earlier
SoCs we've already seen names like pins-sleep, pins-idle, pins-off and so
on that would need to be matched.

And as the node is a pin group, let's prefer to use naming -pins rather
than -pin as more pins may need to be added to the pin group later on.

Signed-off-by: Tony Lindgren <tony@atomide.com>
[vigneshr@ti.com: Rebase onto latest ti/next and extend to new nodes]
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Enable wakeup_i2c0 and eeprom

Enable wakeup_i2c and use un-used pinmux. While at it, describe the
board detection eeprom present on the board.

Signed-off-by: Nishanth

arm64: dts: ti: k3-j784s4-evm: Enable wakeup_i2c0 and eeprom

Enable wakeup_i2c and use un-used pinmux. While at it, describe the
board detection eeprom present on the board.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Add mcu and wakeup uarts

Add wakeup and MCU uart. This allows the device tree usage in
bootloader and firmwares that can configure the same appropriately.

Signed-off-

arm64: dts: ti: k3-j784s4-evm: Add mcu and wakeup uarts

Add wakeup and MCU uart. This allows the device tree usage in
bootloader and firmwares that can configure the same appropriately.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

The wkup_pmx register region in j784s4 has multiple non-addressable
regions, hence the existing wkup_pmx region is split a

arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

The wkup_pmx register region in j784s4 has multiple non-addressable
regions, hence the existing wkup_pmx region is split as follows to
avoid the non-addressable regions. The pinctrl node offsets are
also corrected as per the newly split wkup_pmx* nodes.

wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)

Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230503083143.32369-1-t-konduru@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Fix main_i2c0 alias

main_i2c0 is aliased as i2c0 which creates a problem for u-boot R5
SPL attempting to reuse the same definition in the common board
detection logic

arm64: dts: ti: k3-j784s4-evm: Fix main_i2c0 alias

main_i2c0 is aliased as i2c0 which creates a problem for u-boot R5
SPL attempting to reuse the same definition in the common board
detection logic as it looks for the first i2c instance as the bus on
which to detect the eeprom to understand the board variant involved.
Switch main_i2c0 to i2c3 alias allowing us to introduce wkup_i2c0
and potentially space for mcu_i2c instances in the gap for follow on
patches.

Fixes: e20a06aca5c9 ("arm64: dts: ti: Add support for J784S4 EVM board")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Add support for OSPI and QSPI flashes

J784S4 has S28HS512T OSPI flash connected to OSPI0 and MT25QU512A QSPI
flash connected to OSPI1, enable support for the same. Als

arm64: dts: ti: k3-j784s4-evm: Add support for OSPI and QSPI flashes

J784S4 has S28HS512T OSPI flash connected to OSPI0 and MT25QU512A QSPI
flash connected to OSPI1, enable support for the same. Also describe
the partition information according to the offsets in the bootloader.

Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Link: https://lore.kernel.org/r/20230504080305.38986-3-a-nandan@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Add pinmux information for ADC

J784S4 has two instances of 8 channel ADCs in MCU domain. Add pinmux
information for both ADC nodes.

Signed-off-by: Bhavya Kapoor <b-ka

arm64: dts: ti: k3-j784s4-evm: Add pinmux information for ADC

J784S4 has two instances of 8 channel ADCs in MCU domain. Add pinmux
information for both ADC nodes.

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Link: https://lore.kernel.org/r/20230502081117.21431-3-b-kapoor@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Reserve memory for remote proc IPC

Reserve memory for remote processors. Two memory regions are reserved
for each remote processor. The first 1Mb region is used for vi

arm64: dts: ti: k3-j784s4-evm: Reserve memory for remote proc IPC

Reserve memory for remote processors. Two memory regions are reserved
for each remote processor. The first 1Mb region is used for virtio
Vring buffers for IPC and the second region is used for holding
resource table, trace buffer and as external memory to the remote
processor. The mailboxes are also assigned for each remote processor.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Link: https://lore.kernel.org/r/20230502231527.25879-4-hnagalla@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Add eMMC mmc0 support

Add support for eMMC connected to main sdhci0 instance.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Bhavya Kapoor <b-kapoor@ti.c

arm64: dts: ti: k3-j784s4-evm: Add eMMC mmc0 support

Add support for eMMC connected to main sdhci0 instance.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Bhavya Kapoor <b-kapoor@ti.com>
Link: https://lore.kernel.org/r/20230327083100.12587-1-a-nandan@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G

Add device tree support to enable MCU CPSW with J784S4 EVM.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Andrew Davis <afd@t

arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G

Add device tree support to enable MCU CPSW with J784S4 EVM.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230315042548.1500528-1-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: Add support for J784S4 EVM board

J784S4 EVM board is designed for TI J784S4 SoC. It supports the following
interfaces:
* 32 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of wo

arm64: dts: ti: Add support for J784S4 EVM board

J784S4 EVM board is designed for TI J784S4 SoC. It supports the following
interfaces:
* 32 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
* x1 Input Audio Jack, x1 Output Audio Jack
* x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port
* x2 4L PCIe connector
* x1 UHS-1 capable micro-SD card slot
* 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash,
UFS flash.
* x6 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin User Expansion Connector
* x2 ENET Expansion Connector, x1 GESI expander, x2 Display connector
* x1 15-pin CSI header
* x6 MCAN instances

Add basic support for J784S4-EVM.

Schematics: https://www.ti.com/lit/zip/sprr458

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Tested-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230112142725.77785-5-a-nandan@ti.com

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