arm64: dts: uniphier: use SPDX-License-Identifier

Follow the recent trend for the license description, and fix the wrongly
stated X11 to MIT.

The X11 license text [1] is explicitly for the X Consor

arm64: dts: uniphier: use SPDX-License-Identifier

Follow the recent trend for the license description, and fix the wrongly
stated X11 to MIT.

The X11 license text [1] is explicitly for the X Consortium and has a
couple of extra clauses. The MIT license text [2] is actually what the
current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: reserve more memory for LD11/LD20

Reserve enough space below the kernel base.
The assumed address map is:
80000000 - 80ffffff : for IPP
81000000 - 81ffffff : for ARM secure

arm64: dts: uniphier: reserve more memory for LD11/LD20

Reserve enough space below the kernel base.
The assumed address map is:
80000000 - 80ffffff : for IPP
81000000 - 81ffffff : for ARM secure
82000000 - : for Linux

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: fix simple-bus unit address format error

Compiling the UniPhier DT files with W=1, DTC warns like follows:

Warning (simple_bus_reg): Node /soc/smpctrl@59800000 simple-bus unit

arm64: dts: uniphier: fix simple-bus unit address format error

Compiling the UniPhier DT files with W=1, DTC warns like follows:

Warning (simple_bus_reg): Node /soc/smpctrl@59800000 simple-bus unit address format error, expected "59801000"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: Use - instead of @ for DT OPP entries

Compiling the DT file with W=1, DTC warns like follows:

Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, b

arm64: dts: uniphier: Use - instead of @ for DT OPP entries

Compiling the DT file with W=1, DTC warns like follows:

Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property

Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add cdns, phy-dll-delay-sdclk(-hsmmc) for eMMC

Adjust the PHY parameters for more stable access to the eMMC device.
Set the SDCLK output delay value to 21 (including HS200/400

arm64: dts: uniphier: add cdns, phy-dll-delay-sdclk(-hsmmc) for eMMC

Adjust the PHY parameters for more stable access to the eMMC device.
Set the SDCLK output delay value to 21 (including HS200/400 modes).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add input-delay properties to Cadence eMMC node

Since commit a89c472d8b55 ("mmc: sdhci-cadence: Update PHY delay
configuration"), PHY parameters must be specified by DT.

The h

arm64: dts: uniphier: add input-delay properties to Cadence eMMC node

Since commit a89c472d8b55 ("mmc: sdhci-cadence: Update PHY delay
configuration"), PHY parameters must be specified by DT.

The hard-coded settings have been converted as follows:
- SDHCI_CDNS_PHY_DLY_SD_DEFAULT -> cdns,phy-input-delay-legacy
- SDHCI_CDNS_PHY_DLY_EMMC_SDR -> cdns,phy-input-delay-mmc-highspeed
- SDHCI_CDNS_PHY_DLY_EMMC_DDR -> cdns,phy-input-delay-mmc-ddr

The following have not been moved:
- SDHCI_CDNS_PHY_DLY_SD_HS
this is unneeded in the eMMC configuration
- SDHCI_CDNS_PHY_DLY_EMMC_LEGACY
this is never enabled by the driver as it is covered by
SDHCI_CDNS_PHY_DLY_SD_DEFAULT

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add pinctrl property to eMMC node for LD11/LD20

Now everything is ready to enable this pinctrl.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm64: dts: uniphier: fix no unit name warnings

Fix warnings reported when built with W=1:
Node /memory has a reg or ranges property, but no unit name

Signed-off-by: Masahiro Yamada <yamada.masah

arm64: dts: uniphier: fix no unit name warnings

Fix warnings reported when built with W=1:
Node /memory has a reg or ranges property, but no unit name

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add eMMC controller node for LD11/LD20

Add Cadence's eMMC controller node for LD11/LD20.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm64: dts: uniphier: make compatible of syscon nodes SoC-specific

These hardware blocks are SoC-specific, so their compatible strings
should be SoC-specific as well. This change has no impact on t

arm64: dts: uniphier: make compatible of syscon nodes SoC-specific

These hardware blocks are SoC-specific, so their compatible strings
should be SoC-specific as well. This change has no impact on the
actual behavior since it is controlled by the generic "simple-mfd",
"syscon" compatible strings.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add CPU clocks and OPP tables for LD20 SoC

Add a CPU clock to every CPU node and CPU OPP tables to use the
generic cpufreq driver. All the CPUs in each cluster share the
same

arm64: dts: uniphier: add CPU clocks and OPP tables for LD20 SoC

Add a CPU clock to every CPU node and CPU OPP tables to use the
generic cpufreq driver. All the CPUs in each cluster share the
same OPP table.

Note:
clock-latency-ns (300ns) was calculated based on the CPU-gear switch
sequencer spec; it takes 12 clock cycles on the sequencer running
at 50 MHz, plus a bit additional latency.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

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arm64: dts: uniphier: increase register region size of sysctrl node

The System Control node has 0x10000 byte of registers. The current
reg size must be expanded to use the cpufreq driver because th

arm64: dts: uniphier: increase register region size of sysctrl node

The System Control node has 0x10000 byte of registers. The current
reg size must be expanded to use the cpufreq driver because the
registers controlling CPU frequency are located at offset 0x8000.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: switch over to PSCI enable method

At the first system bring-up, I chose to use spin-table because ARM
Trusted Firmware was not ready for this platform at that moment.

Actually

arm64: dts: uniphier: switch over to PSCI enable method

At the first system bring-up, I chose to use spin-table because ARM
Trusted Firmware was not ready for this platform at that moment.

Actually, these SoCs are equipped with EL3 and able to provide PSCI.
Now I finished porting the ATF BL31 for the UniPhier platform, so it
is ready to migrate to PSCI enable method.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: change MIO node to SD control node

I made a mistake bacuse the Media I/O block is not implemented in
this SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm64: dts: uniphier: add specific compatible to SoC-Glue node

This is a simple MFD, but add a specific compatible just in case.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm64: dts: uniphier: use clock/reset controllers

The UniPhier reset controller driver has been merged. Enable it.
Also, replace the fixed-rate clocks with the dedicated clock
drivers.

Signed-off-

arm64: dts: uniphier: use clock/reset controllers

The UniPhier reset controller driver has been merged. Enable it.
Also, replace the fixed-rate clocks with the dedicated clock
drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add pinctrl property to System Bus node

This pinctrl is needed to get access to the UniPhier System Bus.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm64: dts: uniphier: match DT names to other projects and documents

All UniPhier device trees have the common prefix "uniphier-", so
"ph1-" is just making names longer. Recent documents and other

arm64: dts: uniphier: match DT names to other projects and documents

All UniPhier device trees have the common prefix "uniphier-", so
"ph1-" is just making names longer. Recent documents and other
projects are not using PH1- prefixes any more.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E

[ Upstream commit dcabb06bf127b3e0d3fbc94a2b65dd56c2725851 ]

UniPhier LD20 and PXs3 boards have R

arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E

[ Upstream commit dcabb06bf127b3e0d3fbc94a2b65dd56c2725851 ]

UniPhier LD20 and PXs3 boards have RTL8211E ethernet phy, and the phy have
the RX/TX delays of RGMII interface using pull-ups on the RXDLY and TXDLY
pins.

After the commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), the delays are working correctly, however, "rgmii" means
no delay and the phy doesn't work. So need to set the phy-mode to
"rgmii-id" to show that RX/TX delays are enabled.

Fixes: c73730ee4c9a ("arm64: dts: uniphier: add AVE ethernet node")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>

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arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy

This adds missing clock-names and reset-names to pcie-phy node according to
Documentation/devicetree/bindings/ph

arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy

This adds missing clock-names and reset-names to pcie-phy node according to
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add #address-cells and #size-cells to SPI nodes

Documentation/devicetree/bindings/spi/spi-uniphier.txt requires
#address-cells and #size-cells, but they are missing

arm64: dts: uniphier: add #address-cells and #size-cells to SPI nodes

Documentation/devicetree/bindings/spi/spi-uniphier.txt requires
#address-cells and #size-cells, but they are missing in actual DT files.

Also, 'make ARCH=arm64 dtbs_check' is really noisy.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: Add XDMAC node

Add external DMA controller support implemented in UniPhier SoCs.
This supports for LD11, LD20 and PXs3.

Signed-off-by: Kunihiko Hayashi <ha

arm64: dts: uniphier: Add XDMAC node

Add external DMA controller support implemented in UniPhier SoCs.
This supports for LD11, LD20 and PXs3.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel

Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.

arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel

Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.

Fixes: 925c5c32f31d ("arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: rename NAND node names to follow json-schema

Follow the standard nodename pattern "^nand-controller(@.*)?" defined
in Documentation/devicetree/bindings/mtd/nand-con

arm64: dts: uniphier: rename NAND node names to follow json-schema

Follow the standard nodename pattern "^nand-controller(@.*)?" defined
in Documentation/devicetree/bindings/mtd/nand-controller.yaml

Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm64 dtbs_check' will show warnings like this:

nand@68000000: $nodename:0: 'nand@68000000' does not match '^nand-controller(@.*)?'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: rename aidet node names to follow json-schema

Follow the standard nodename pattern "^interrupt-controller(@[0-9a-f,]+)*$"
defined in schemas/interrupt-controller.ya

arm64: dts: uniphier: rename aidet node names to follow json-schema

Follow the standard nodename pattern "^interrupt-controller(@[0-9a-f,]+)*$"
defined in schemas/interrupt-controller.yaml of dt-schema.

Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm64 dtbs_check' will show warnings like this:

aidet@5fc20000: $nodename:0: 'aidet@5fc20000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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