Revision tags: v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3 |
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8e3e791d |
| 25-Jul-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Use generic bulk clock function Remove the homebrewed bulk clock get function and replace it with devm_clk_bulk_get_all(). Signed-off-by: Jordan Crouse <jcrouse@codeaur
drm/msm: Use generic bulk clock function Remove the homebrewed bulk clock get function and replace it with devm_clk_bulk_get_all(). Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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Revision tags: v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14 |
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03b7af1e |
| 07-May-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm/adreno: Call pm_runtime_force_suspend() during unbind The GPU specific pm_suspend code assumes that the hardware is active when the function is called, which it usually is when c
drm/msm/adreno: Call pm_runtime_force_suspend() during unbind The GPU specific pm_suspend code assumes that the hardware is active when the function is called, which it usually is when called as part of pm_runtime. But during unbind, the pm_suspend functions are called blindly resulting in a bit of a when the hardware wasn't already active (or booted, in the case of the GMU). Instead of calling the pm_suspend function directly, use pm_runtime_force_suspend() which should check the correct state of runtime and call the functions on our behalf or skip them if they are not needed. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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981f2aab |
| 23-May-2019 |
Sean Paul <seanpaul@chromium.org> |
drm/msm/a6xx: Rename a6xx_gmu_probe to a6xx_gmu_init This rename makes it more clear that everything initialized in the _init function must be cleaned up in a6xx_gmu_remove. This will ho
drm/msm/a6xx: Rename a6xx_gmu_probe to a6xx_gmu_init This rename makes it more clear that everything initialized in the _init function must be cleaned up in a6xx_gmu_remove. This will hopefully dissuade people from using device managed resources (for reasons laid out in the previous patch). Changes in v2: - None Cc: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190523171653.138678-6-sean@poorly.run
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998efc74 |
| 23-May-2019 |
Sean Paul <seanpaul@chromium.org> |
drm/msm/a6xx: Drop the device reference in gmu of_find_device_by_node() grabs a dev reference, so make sure we clear it on error and remove. Changes in v2: - Added to the se
drm/msm/a6xx: Drop the device reference in gmu of_find_device_by_node() grabs a dev reference, so make sure we clear it on error and remove. Changes in v2: - Added to the set (Jordan) Cc: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190523171653.138678-5-sean@poorly.run
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a62fb211 |
| 23-May-2019 |
Sean Paul <seanpaul@chromium.org> |
drm/msm/a6xx: Remove devm calls from gmu driver The gmu driver is initialized and cleaned up with calls from the gpu driver. As such, the platform device stays valid after a6xx_gmu_remov
drm/msm/a6xx: Remove devm calls from gmu driver The gmu driver is initialized and cleaned up with calls from the gpu driver. As such, the platform device stays valid after a6xx_gmu_remove is called and the device managed resources are not freed. In the case of gpu probe failures or unbind, these resources will remain managed. If the gpu bind is run again (eg: if there's a probe defer somewhere in msm), these resources will be initialized again for the same device, creating multiple references. In the case of irqs, this causes failures since the irqs are not shared (nor should they be). This patch removes all devm_* calls and manually cleans things up in gmu_remove. Changes in v2: - Add iounmap and free_irq to gmu_probe error paths Cc: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190523171653.138678-4-sean@poorly.run
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5ca4a094 |
| 23-May-2019 |
Sean Paul <seanpaul@chromium.org> |
drm/msm/a6xx: Check for ERR or NULL before iounmap pdcptr and seqptr aren't necessarily valid, check them before trying to unmap them. Changes in v2: - None Cc: Jor
drm/msm/a6xx: Check for ERR or NULL before iounmap pdcptr and seqptr aren't necessarily valid, check them before trying to unmap them. Changes in v2: - None Cc: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190523171653.138678-3-sean@poorly.run
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cfcb3658 |
| 23-May-2019 |
Sean Paul <seanpaul@chromium.org> |
drm/msm/a6xx: Remove duplicate irq disable from remove a6xx_gmu_stop() already calls this function via shutdown or force_stop, so it's not necessary to call it twice. Previously this wou
drm/msm/a6xx: Remove duplicate irq disable from remove a6xx_gmu_stop() already calls this function via shutdown or force_stop, so it's not necessary to call it twice. Previously this would have knocked the irq refcount out of sync, but now with the irqs_enabled flag it's just housekeeping. Changes in v2: - None Cc: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190523171653.138678-2-sean@poorly.run
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606ec90f |
| 23-May-2019 |
Sean Paul <seanpaul@chromium.org> |
drm/msm/a6xx: Avoid freeing gmu resources multiple times The driver checks for gmu->mmio as a sign that the device has been initialized, however there are failures in probe below the mmi
drm/msm/a6xx: Avoid freeing gmu resources multiple times The driver checks for gmu->mmio as a sign that the device has been initialized, however there are failures in probe below the mmio init. If one of those is hit, mmio will be non-null but freed. In that case, a6xx_gmu_probe will return an error to a6xx_gpu_init which will in turn call a6xx_gmu_remove which checks gmu->mmio and tries to free resources for a second time. This causes a great boom. Fix this by adding an initialized member to gmu which is set on successful probe and cleared on removal. Changes in v2: - None Cc: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190523171653.138678-1-sean@poorly.run
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2b117451 |
| 15-May-2019 |
Sean Paul <seanpaul@chromium.org> |
drm/msm: Upgrade gxpd checks to IS_ERR_OR_NULL dev_pm_domain_attach_by_name() can return NULL, so we should check for that case when we're about to dereference gxpd. Fixes: 9325
drm/msm: Upgrade gxpd checks to IS_ERR_OR_NULL dev_pm_domain_attach_by_name() can return NULL, so we should check for that case when we're about to dereference gxpd. Fixes: 9325d4266afd ("drm/msm/gpu: Attach to the GPU GX power domain") Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeauorora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190515170104.155525-1-sean@poorly.run
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Revision tags: v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20 |
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41570b74 |
| 04-Feb-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
msm/drm/a6xx: Turn off the GMU if resume fails Currently if the GMU resume function fails all we try to do is clear the BOOT_SLUMBER oob which usually times out and ends up in a cycle of
msm/drm/a6xx: Turn off the GMU if resume fails Currently if the GMU resume function fails all we try to do is clear the BOOT_SLUMBER oob which usually times out and ends up in a cycle of death. If the resume function fails at any point remove any RPMh votes that might have been added and try to shut down the GMU hardware cleanly. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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e31fdb74 |
| 04-Feb-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm/a6xx: Make GMU reset useful Now that the GX domain is sorted we can wire up a working GMU reset. IF a GMU hang was detected then try to forcefully shut down the GMU in the po
drm/msm/a6xx: Make GMU reset useful Now that the GX domain is sorted we can wire up a working GMU reset. IF a GMU hang was detected then try to forcefully shut down the GMU in the power down sequence which should ensure that it can recover normally on the next power up. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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9325d426 |
| 04-Feb-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm/gpu: Attach to the GPU GX power domain 99.999% of the time during normal operation the GMU is responsible for power and clock control on the GX domain and the CPU remains bli
drm/msm/gpu: Attach to the GPU GX power domain 99.999% of the time during normal operation the GMU is responsible for power and clock control on the GX domain and the CPU remains blissfully unaware. However, there is one situation where the CPU needs to get involved: The power sequencing rules dictate that the GX needs to be turned off before the CX so that the CX can be turned on before the GX during power up. During normal operation when the CPU is taking down the CX domain a stop command is sent to the GMU which turns off the GX domain and then the CPU handles the CX domain. But if the GMU happened to be unresponsive while the GX domain was left then the CPU will need to step in and turn off the GX domain before resetting the CX and rebooting the GMU. This unfortunately means that the CPU needs to be marginally aware of the GX domain even though it is expected to usually keep its hands off. To support this we create a semi-disabled GX power domain that does nothing to the hardware on power up but tries to shut it down normally on power down. In this method the reference counting is correct and we can step in with the pm_runtime_put() at the right time during the failure path. This patch sets up the connection to the GX power domain and does the magic to "enable" and disable it at the right points. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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b94a6e37 |
| 04-Feb-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm/a6xx: Remove unwanted regulator code The GMU code currently has some misguided code to try to work around a hardware quirk that requires the power domains on the GPU be colla
drm/msm/a6xx: Remove unwanted regulator code The GMU code currently has some misguided code to try to work around a hardware quirk that requires the power domains on the GPU be collapsed in a certain order. Upcoming patches will do this the right way so get rid of the unused and unwanted regulator code. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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Revision tags: v4.19.19, v4.19.18, v4.19.17, v4.19.16 |
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e1505f62 |
| 16-Jan-2019 |
Douglas Anderson <dianders@chromium.org> |
drm/msm: Cleanup A6XX opp-level reading The patch ("OPP: Add support for parsing the 'opp-level' property") adds an API enabling a cleaner way to read the opp-level. Let's use the n
drm/msm: Cleanup A6XX opp-level reading The patch ("OPP: Add support for parsing the 'opp-level' property") adds an API enabling a cleaner way to read the opp-level. Let's use the new API. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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fcf9d0b7 |
| 12-Feb-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm/a6xx: Add support for an interconnect path Try to get the interconnect path for the GPU and vote for the maximum bandwidth to support all frequencies. This is needed for performa
drm/msm/a6xx: Add support for an interconnect path Try to get the interconnect path for the GPU and vote for the maximum bandwidth to support all frequencies. This is needed for performance. Later we will want to scale the bandwidth based on the frequency to also optimize for power but that will require some device tree infrastructure that does not yet exist. v6: use icc_set_bw() instead of icc_set() v5: Remove hardcoded interconnect name and just use the default v4: Don't use a port string at all to skip the need for names in the DT v3: Use macros and change port string per Georgi Djakov Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Acked-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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f0e7ce1e |
| 24-Jan-2019 |
Dave Airlie <airlied@redhat.com> |
Merge tag 'drm-msm-fixes-2019-01-24' of git://people.freedesktop.org/~robclark/linux into drm-fixes A few fixes for v5.0.. the opp-level fix and removal of hard-coded irq name is partial
Merge tag 'drm-msm-fixes-2019-01-24' of git://people.freedesktop.org/~robclark/linux into drm-fixes A few fixes for v5.0.. the opp-level fix and removal of hard-coded irq name is partially to make things smoother in v5.1 merge window to avoid dependency on drm vs dt trees, but are otherwise sane changes. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsAEHd2tGRQxRTs+A-8y_tthPs2iUgCCCEwR5vDMXab4A@mail.gmail.com
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a3c5e2cd |
| 16-Jan-2019 |
Douglas Anderson <dianders@chromium.org> |
drm/msm: Fix A6XX support for opp-level The bindings for Qualcomm opp levels changed after being Acked but before landing. Thus the code in the GPU driver that was relying on the ol
drm/msm: Fix A6XX support for opp-level The bindings for Qualcomm opp levels changed after being Acked but before landing. Thus the code in the GPU driver that was relying on the old bindings is now broken. Let's change the code to match the new bindings by adjusting the old string 'qcom,level' to the new string 'opp-level'. See the patch ("dt-bindings: opp: Introduce opp-level bindings"). NOTE: we will do additional cleanup to totally remove the string from the code and use the new dev_pm_opp_get_level() but we'll do it in a future patch. This will facilitate getting the important code fix in sooner without having to deal with cross-maintainer dependencies. This patch needs to land before the patch ("arm64: dts: sdm845: Add gpu and gmu device nodes") since if a tree contains the device tree patch but not this one you'll get a crash at bootup. Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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d36377c6 |
| 31-Dec-2018 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "Misc driver updates for platforms, many of them
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "Misc driver updates for platforms, many of them power related. - Rockchip adds power domain support for rk3066 and rk3188 - Amlogic adds a power measurement driver - Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1) - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7 - Broadcom fixes suspend/resume with Thumb2 kernels, and improves stability of a handful of firmware/platform interfaces - PXA completes their conversion to dmaengine framework - Renesas does a bunch of PM cleanups across many platforms - Tegra adds support for suspend/resume on T186/T194, which includes some driver cleanups and addition of wake events - Tegra also adds a driver for memory controller (EMC) on Tegra2 - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60 and misc cleanups across several platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits) ARM: at91: add support in soc driver for new SAM9X60 ARM: at91: add support in soc driver for LPDDR2 SiP memory: omap-gpmc: Use of_node_name_eq for node name comparisons bus: ti-sysc: Check for no-reset and no-idle flags at the child level ARM: OMAP2+: Check also the first dts child for hwmod flags soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency soc: imx: gpc: Increase GPC_CLK_MAX to 7 soc: renesas: rcar-sysc: Fix power domain control after system resume soc: renesas: rcar-sysc: Merge PM Domain registration and linking soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B} dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1 dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1 dt-bindings: sram: Add Allwinner suniv F1C100s soc: sunxi: sram: Add support for the H5 SoC system control soc: sunxi: sram: Enable EMAC clock access for H3 variant soc: imx: gpcv2: add support for i.MX8MQ SoC soc: imx: gpcv2: move register access table to domain data soc: imx: gpcv2: prefix i.MX7 specific defines dmaengine: pxa: make the filter function internal ...
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Revision tags: v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1 |
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1707add8 |
| 02-Nov-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm/a6xx: Add a6xx gpu state Add support for gathering and dumping the a6xx GPU state including registers, GMU registers, indexed registers, shader blocks, context clusters and d
drm/msm/a6xx: Add a6xx gpu state Add support for gathering and dumping the a6xx GPU state including registers, GMU registers, indexed registers, shader blocks, context clusters and debugbus. v2: Fix bugs discovered by Sharat Masetty Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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56869210 |
| 02-Nov-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm/gpu: Add per-submission statistics Add infrastructure to track statistics for GPU submissions by sampling certain perfcounters before and after a submission. To store th
drm/msm/gpu: Add per-submission statistics Add infrastructure to track statistics for GPU submissions by sampling certain perfcounters before and after a submission. To store the statistics, the per-ring memptrs region is expanded to include room for up to 64 entries - this should cover a reasonable amount of inflight submissions without worrying about losing data. The target specific code inserts PM4 commands to sample the counters before and after submission and store them in the data region. The CPU can access the data after the submission retires to make sense of the statistics and communicate them to the user. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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Revision tags: v4.19 |
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6a41da17 |
| 20-Oct-2018 |
Mamta Shukla <mamtashukla555@gmail.com> |
drm: msm: Use DRM_DEV_* instead of dev_* Use DRM_DEV_INFO/ERROR/WARN instead of dev_info/err/debug to generate drm-formatted specific log messages so that it will be easy to differen
drm: msm: Use DRM_DEV_* instead of dev_* Use DRM_DEV_INFO/ERROR/WARN instead of dev_info/err/debug to generate drm-formatted specific log messages so that it will be easy to differentiate in case of multiple instances of driver. Signed-off-by: Mamta Shukla <mamtashukla555@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
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b601f731 |
| 29-Nov-2018 |
Stephen Boyd <swboyd@chromium.org> |
drm: msm: Check cmd_db_read_aux_data() for failure We need to check the call to cmd_db_read_aux_data() for the error case, so that we don't continue and use potentially uninitialized val
drm: msm: Check cmd_db_read_aux_data() for failure We need to check the call to cmd_db_read_aux_data() for the error case, so that we don't continue and use potentially uninitialized values for 'pri_count' and 'sec_count'. Otherwise, we get the following compiler warnings: drivers/gpu/drm/msm/adreno/a6xx_gmu.c: In function 'a6xx_gmu_rpmh_arc_votes_init.isra.12': drivers/gpu/drm/msm/adreno/a6xx_gmu.c:943:12: warning: 'pri_count' is used uninitialized in this function [-Wuninitialized] pri_count >>= 1; ^~~ drivers/gpu/drm/msm/adreno/a6xx_gmu.c:948:12: warning: 'sec_count' may be used uninitialized in this function [-Wmaybe-uninitialized] sec_count >>= 1; ^~~ Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: kbuild test robot <lkp@intel.com> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Evan Green <evgreen@chromium.org> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Rob Clark <robdclark@gmail.com> Fixes: ed3cafa79ea7 ("soc: qcom: cmd-db: Stop memcpy()ing in cmd_db_read_aux_data()") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Acked-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Revision tags: v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11 |
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ed3cafa7 |
| 26-Sep-2018 |
Stephen Boyd <swboyd@chromium.org> |
soc: qcom: cmd-db: Stop memcpy()ing in cmd_db_read_aux_data() Let's change the function signature to return the pointer to memory or an error pointer on failure, and take an argument tha
soc: qcom: cmd-db: Stop memcpy()ing in cmd_db_read_aux_data() Let's change the function signature to return the pointer to memory or an error pointer on failure, and take an argument that lets us return the size of the aux data read. This way we can remove the cmd_db_read_aux_data_len() API entirely and also get rid of the memcpy operation from cmd_db to the caller. Updating the only user of this code shows that making this change allows us to remove a function and put the lookup where the user is. Cc: Mahesh Sivasubramanian <msivasub@codeaurora.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Evan Green <evgreen@chromium.org> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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a2c3c0a5 |
| 04-Oct-2018 |
Sharat Masetty <smasetty@codeaurora.org> |
drm/msm/a6xx: Add devfreq support for a6xx Implement routines to estimate GPU busy time and fetching the current frequency for the polling interval. This is required by the devfreq f
drm/msm/a6xx: Add devfreq support for a6xx Implement routines to estimate GPU busy time and fetching the current frequency for the polling interval. This is required by the devfreq framework which recommends a frequency change if needed. The driver code then tries to set this new frequency on the GPU by sending an Out Of Band(OOB) request to the GMU. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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Revision tags: v4.18.10 |
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df0dff13 |
| 20-Sep-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm/a6xx: Poll for HFI responses The only HFI communication with the GMU on sdm845 happens during initialization and all commands are synchronous. A fancy interrupt tasklet and a
drm/msm/a6xx: Poll for HFI responses The only HFI communication with the GMU on sdm845 happens during initialization and all commands are synchronous. A fancy interrupt tasklet and associated infrastructure is entirely not eeded and puts us at the mercy of the scheduler. Instead poll for the message signal and handle the response immediately and go on our way. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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