[ARM] 4450/1: pxa: add pxa25x_init_irq() and pxa27x_init_irq()

/* should be ok this time, I aligned this patch to your arm:pxa2.mbox */

1. move pxa25x specific IRQ initialization code to pxa25x_ini

[ARM] 4450/1: pxa: add pxa25x_init_irq() and pxa27x_init_irq()

/* should be ok this time, I aligned this patch to your arm:pxa2.mbox */

1. move pxa25x specific IRQ initialization code to pxa25x_init_irq()
and pxa27x code to pxa27x_init_irq(), remove pxa_init_irq()

2. replace all pxa_init_irq() with their PXA25x or PXA27x specific
functions

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] 4438/1: PXA: remove #ifdef .. #endif from pxa_gpio_demux_handler()

1. use GPIO_IRQ_mask[] to select those bits of interest, actually
only those "unmasked" GPIO IRQs with their corresponding

[ARM] 4438/1: PXA: remove #ifdef .. #endif from pxa_gpio_demux_handler()

1. use GPIO_IRQ_mask[] to select those bits of interest, actually
only those "unmasked" GPIO IRQs with their corresponding bits
in GPIO_IRQ_mask[] set to "1" should be checked

2. remove #ifdef PXA_LAST_GPIO > 96 .. #endif, GPIO_IRQ_mask[]
is used to mask out the irrelevant bits, so that even though
the GEDR3 on PXA25x is reserved, it will be masked, and the
following code will never run. Another point is that GPIO85-
GPIO95 bits within GEDR2 will also be masked out on PXA25x

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] 4437/1: PXA: move the GPIO IRQ initialization code to pxa_init_irq_gpio()

move the GPIO IRQ initialization code to pxa_init_irq_gpio()

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-

[ARM] 4437/1: PXA: move the GPIO IRQ initialization code to pxa_init_irq_gpio()

move the GPIO IRQ initialization code to pxa_init_irq_gpio()

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low()

1. move low IRQ initialization code to pxa_init_irq_low()

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: R

[ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low()

1. move low IRQ initialization code to pxa_init_irq_low()

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS

1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs,
and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants

2. make the code specif

[ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS

1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs,
and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants

2. make the code specific to the high IRQ numbers (32..64) to be
PXA27x specific

3. add a function pxa_init_irq_high() to initialize the internal
high IRQ chip, the invoke of this function could be moved to
PXA27x specific initialization code

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] 4434/1: PXA: remove PXA_IRQ_SKIP

1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ
starts from zero. This makes IRQ numbering inconsistent between
PXA25x and PXA27x. Rem

[ARM] 4434/1: PXA: remove PXA_IRQ_SKIP

1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ
starts from zero. This makes IRQ numbering inconsistent between
PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX
definition has the same value on both PXA25x and PXA27x.

2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this
avoids unintentional use of these macros on PXA25x

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] 4236/2: basic {enable,disable}_irq_wake() support for PXA

pxa_set_gpio_wake handles GPIOs > 1, so IRQ_TO_GPIO has to be used
instead of just substracting IRQ_GPIO0 from the irq number.

[ARM] Remove needless linux/ptrace.h includes

Lots of places in arch/arm were needlessly including linux/ptrace.h,
resumably because we used to pass a struct pt_regs to interrupt
handlers. Now that

[ARM] Remove needless linux/ptrace.h includes

Lots of places in arch/arm were needlessly including linux/ptrace.h,
resumably because we used to pass a struct pt_regs to interrupt
handlers. Now that we don't, all these ptrace.h includes are
redundant.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] Remove compatibility layer for ARM irqs

set_irq_chipdata -> set_irq_chip_data
get_irq_chipdata -> get_irq_chip_data
do_level_IRQ -> handle_level_irq
do_edge_IRQ -> handle_edge_irq
do_simple_IR

[ARM] Remove compatibility layer for ARM irqs

set_irq_chipdata -> set_irq_chip_data
get_irq_chipdata -> get_irq_chip_data
do_level_IRQ -> handle_level_irq
do_edge_IRQ -> handle_edge_irq
do_simple_IRQ -> handle_simple_irq
irqdesc -> irq_desc
irqchip -> irq_chip

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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Initial blind fixup for arm for irq changes

Untested, but this should fix up the bulk of the totally mechanical
issues, and should make the actual detail fixing easier.

Signed-off-by: Linus Torvald

Initial blind fixup for arm for irq changes

Untested, but this should fix up the bulk of the totally mechanical
issues, and should make the actual detail fixing easier.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>

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[ARM] 3739/1: genirq updates: irq_chip, add and use irq_chip.name

Patch from David Brownell

ARM genirq cleanups/updates:

- Start switching platforms to newer APIs
* use "irq_chip" nam

[ARM] 3739/1: genirq updates: irq_chip, add and use irq_chip.name

Patch from David Brownell

ARM genirq cleanups/updates:

- Start switching platforms to newer APIs
* use "irq_chip" name, not "irqchip"
* providing irq_chip.name

- Show irq_chip.name in /proc/interrupts, like on x86.

This update a bit more than half of the ARM code. The irq_chip.name
values were chosen to match docs (if I have them) or be otherwise
obvious ("FPGA", "CPLD", or matching the code).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] 3672/1: PXA: don't probe output GPIOs for interrupt

Patch from Guennadi Liakhovetski

Currently probe_irq_on() on PXA will silently reconfigure all output GPIOs, that are not configured as alt

[ARM] 3672/1: PXA: don't probe output GPIOs for interrupt

Patch from Guennadi Liakhovetski

Currently probe_irq_on() on PXA will silently reconfigure all output GPIOs, that are not configured as alternate functions, for input. Avoid that. Upon CPU reset all GPIOs are configured as inputs, so, if a GPIO is configured as output, it has been done so intentionally.

Signed-off-by: G. Liakhovetski <gl@dsa-ac.de>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] Wrap calls to descriptor handlers

This is part of Thomas Gleixner's generic IRQ patch, which converts
ARM to use the generic IRQ subsystem. Here, we wrap calls to
desc->handler() in an inline

[ARM] Wrap calls to descriptor handlers

This is part of Thomas Gleixner's generic IRQ patch, which converts
ARM to use the generic IRQ subsystem. Here, we wrap calls to
desc->handler() in an inline function, desc_handle_irq(). This
reduces the size of Thomas' patch since the changes become more
localised.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] Change irq_chip wake/type methods to set_wake/set_type

This is part of Thomas Gleixner's generic IRQ patch, which converts
ARM to use the generic IRQ subsystem. Here, we rename two of the
irq

[ARM] Change irq_chip wake/type methods to set_wake/set_type

This is part of Thomas Gleixner's generic IRQ patch, which converts
ARM to use the generic IRQ subsystem. Here, we rename two of the
irq_chip methods - wake becomes set_wake, and type becomes set_type.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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Linux-2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in

Linux-2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it u

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

PXA3xx platforms have 56 interrupts that are stored in two ICMR
registers. The code in pxa_irq_suspend() and pxa_irq_resum

ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

PXA3xx platforms have 56 interrupts that are stored in two ICMR
registers. The code in pxa_irq_suspend() and pxa_irq_resume() however
does a simple division by 32 which only leads to one register being
saved at suspend and restored at resume time. The NAND interrupt
setting, for instance, is lost.

Fix this by using DIV_ROUND_UP() instead.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

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ARM: kill off set_irq_flags usage

set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill

ARM: kill off set_irq_flags usage

set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:

IRQF_VALID -> !IRQ_NOREQUEST
IRQF_PROBE -> !IRQ_NOPROBE
IRQF_NOAUTOEN -> IRQ_NOAUTOEN

For IRQs managed by an irqdomain, the irqdomain core code handles clearing
and setting IRQ_NOREQUEST already, so there is no need to do this in
.map() functions and we can simply remove the set_irq_flags calls. Some
users also modify IRQ_NOPROBE and this has been maintained although it
is not clear that is really needed. There appears to be a great deal of
blind copy and paste of this code.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Imre Kaloz <kaloz@openwrt.org>
Acked-by: Krzysztof Halasa <khalasa@piap.pl>
Cc: Greg Ungerer <gerg@uclinux.org>
Cc: Roland Stigge <stigge@antcom.de>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Simtec Linux Team <linux@simtec.co.uk>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Wan ZongShun <mcuos.com@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-omap@vger.kernel.org
Cc: linux-samsung-soc@vger.kernel.org
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

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ARM: pxa: Constify irq_domain_ops

The irq_domain_ops are not modified by the driver and the irqdomain core
code accepts pointer to a const data.

Signed-off-by: Krzysztof Kozlows

ARM: pxa: Constify irq_domain_ops

The irq_domain_ops are not modified by the driver and the irqdomain core
code accepts pointer to a const data.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

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ARM: pxa: fix pxa interrupts handling in DT

The commit "ARM: pxa: arbitrarily set first interrupt number" changed
the first pxa interrupt to 16.

As a consequence, device-tree bu

ARM: pxa: fix pxa interrupts handling in DT

The commit "ARM: pxa: arbitrarily set first interrupt number" changed
the first pxa interrupt to 16.

As a consequence, device-tree builds got broken, because :
- pxa_mask_irq() and pxa_unmask_irq() are using IRQ_BIT()
- IRQ_BIT(x) calculates the interrupts as : x - PXA_IRQ(0)

Before the commit, the first interrupt shift, PXA_IRQ(0) was 0,
therefore IRQ_BIT(x) was x. After the change, it is necessary that the
same shift of 16 is applied between the virtual interrupt number and the
hardware irq number.

This situation comes from the common irq_chip shared between legacy
platform builds and device-tree builds.

Fix the broken interrupts in DT case by adding this shift in the DT case
too.

As a consequence of the IRQ_BIT() is removed alltogether from interrupts
handling, even in the platform data types of platforms :
- a legacy irq domain is used
- the irq_chip handles hardware interrupts
- the virtual to hardware interrupt conversion is fully handled by irq
domain mechanics

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

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ARM: pxa: Remove unused variables

The conf and of_id variables are assigned but never used, so they may as
well just be removed.

Signed-off-by: Thierry Reding <thierry.reding@gm

ARM: pxa: Remove unused variables

The conf and of_id variables are assigned but never used, so they may as
well just be removed.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

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ARM: pxa: add devicetree code for irq handling

Properly register on-chip interrupt using the irqdomain logic. The
number of interrupts is taken from the devicetree node. That includes

ARM: pxa: add devicetree code for irq handling

Properly register on-chip interrupt using the irqdomain logic. The
number of interrupts is taken from the devicetree node. That includes
the following changes:

- cpu_has_ipr() was converted from an inline function to a static bool
variable, so it can be set using the "marvell,intc-priority" property
inside the device node of the tree.

- IRQ_BASE was converted from a macro to a runtime variable so that it
can be initialized dynamically from the DT init code.

- irq_base() now uses pxa_irq_base and just adds an offset.

Hence, there are now no compile-time fixed values used in case of DT
initialization.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>

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ARM: pxa: change gpio to platform device

Remove most gpio macros and change gpio driver to platform driver.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>

ARM: pxa: use chained interrupt for GPIO0 and GPIO1

GPIO0 and GPIO1 are linked to unique interrupt line in PXA series,
others are linked to another interrupt line. All GPIO are linked to

ARM: pxa: use chained interrupt for GPIO0 and GPIO1

GPIO0 and GPIO1 are linked to unique interrupt line in PXA series,
others are linked to another interrupt line. All GPIO are linked to one
interrupt line in MMP series.

Since gpio driver is shared between PXA series and MMP series, define
GPIO0 and GPIO1 as chained interrupt chip. So we can move out gpio code
from irq.c to gpio-pxa.c.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>

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Merge branch 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc

* 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc: (28 commits)
ARM: pxa/cm-x300: properly set bt_reset p

Merge branch 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc

* 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc: (28 commits)
ARM: pxa/cm-x300: properly set bt_reset pin
ARM: mmp: rename SHEEVAD to GPLUGD
ARM: imx: Fix typo 'MACH_MX31_3DS_MXC_NAND_USE_BBT'
ARM: i.MX28: shift frac value in _CLK_SET_RATE
plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desired
ARM: mx5: fix clock usage for suspend
ARM: pxa: use correct __iomem annotations
ARM: pxa: sharpsl pm needs SPI
ARM: pxa: centro and treo680 need palm27x
ARM: pxa: make pxafb_smart_*() empty when not enabled
ARM: pxa: select POWER_SUPPLY on raumfeld
ARM: pxa: pxa95x is incompatible with earlier pxa
ARM: pxa: CPU_FREQ_TABLE is needed for CPU_FREQ
ARM: pxa: pxa95x/saarb depends on pxa3xx code
ARM: pxa: allow selecting just one of TREO680/CENTRO
ARM: pxa: export symbols from pxa3xx-ulpi
ARM: pxa: make zylonite_pxa*_init declaration match code
ARM: pxa/z2: fix building error of pxa27x_cpu_suspend() no longer available
ARM: at91: add defconfig for at91sam9g45 family
ARM: at91: remove dependency for Atmel PWM driver selector in Kconfig
...

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