OMAP2/3/4 clock: move DPLL clock functions into mach-omap2/clkt_dpll.c

Move all DPLL-related clock functions from mach-omap2/clock.c to
mach-omap2/clkt_dpll.c. This is intended to make the clock co

OMAP2/3/4 clock: move DPLL clock functions into mach-omap2/clkt_dpll.c

Move all DPLL-related clock functions from mach-omap2/clock.c to
mach-omap2/clkt_dpll.c. This is intended to make the clock code
easier to understand, since all of the functions needed to manage
DPLLs are now located in their own file, rather than being mixed with
other, unrelated functions.

Clock debugging is also now more finely-grained, since the DEBUG macro
can now be defined for DPLLs alone. This should reduce unnecessary
console noise when debugging.

Also, if at some future point the mach-omap2/ directory is split
into OMAP2/3/4 variants, this clkt file can be moved to the plat-omap/
directory to be shared.

Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to
improve the patch description.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Alexander Shishkin <virtuoso@slind.org>

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ARM: OMAP4 clock framework: Remove the checks preventing OMAP4 clockdomain validation

The clockdomain related code being in place, it is not necessary to have
some part of the clock code commented o

ARM: OMAP4 clock framework: Remove the checks preventing OMAP4 clockdomain validation

The clockdomain related code being in place, it is not necessary to have
some part of the clock code commented out. This would help the validation of
the clockdomain functions using the clock level interfaces.

Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

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OMAP clock: make the fixed divisor clock code available for all OMAPs

One of the OMAP1 clocks can use the fixed divisor recalculation code
introduced in the OMAP2 clock code, so rename the
omap2_fix

OMAP clock: make the fixed divisor clock code available for all OMAPs

One of the OMAP1 clocks can use the fixed divisor recalculation code
introduced in the OMAP2 clock code, so rename the
omap2_fixed_divisor_recalc() function to omap_fixed_divisor_recalc()
and make it available to all OMAPs. A followup patch converts the OMAP1
clock.

Signed-off-by: Paul Walmsley <paul@pwsan.com>

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ARM: OMAP4: PM: Add init api for DPLL nodes

An api at init for all dpll nodes seem to be
needed to reparent the dpll clk node to its
bypass clk in case the dpll is in bypass.
If not done this causes

ARM: OMAP4: PM: Add init api for DPLL nodes

An api at init for all dpll nodes seem to be
needed to reparent the dpll clk node to its
bypass clk in case the dpll is in bypass.
If not done this causes sequencing issues at init
during propogate_rate.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

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ARM: OMAP4: PM: Add support for OMAP4 dpll api's

Most of the dpll api's from dpll.c are reused for OMAP4.
This patch does extend a few api's for OMAP4 support.

Signed-off-by: Rajendra Nayak <rnayak

ARM: OMAP4: PM: Add support for OMAP4 dpll api's

Most of the dpll api's from dpll.c are reused for OMAP4.
This patch does extend a few api's for OMAP4 support.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

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ARM: OMAP4: PM: Add dummy hooks for OMAP4 dpll api's

This patch adds dummy hooks for OMAP4 dpll api's. Removes
dummy hooks for clkdev api's and enables CLKDEV
for OMAP4.
Also comments clockdomain ca

ARM: OMAP4: PM: Add dummy hooks for OMAP4 dpll api's

This patch adds dummy hooks for OMAP4 dpll api's. Removes
dummy hooks for clkdev api's and enables CLKDEV
for OMAP4.
Also comments clockdomain calls from within the clock
framework as its not supported yet for OMAP4.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

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omap: headers: Move remaining headers from include/mach to include/plat

Move the remaining headers under plat-omap/include/mach
to plat-omap/include/plat. Also search and replace the
files using the

omap: headers: Move remaining headers from include/mach to include/plat

Move the remaining headers under plat-omap/include/mach
to plat-omap/include/plat. Also search and replace the
files using these headers to include using the right path.

This was done with:

#!/bin/bash
mach_dir_old="arch/arm/plat-omap/include/mach"
plat_dir_new="arch/arm/plat-omap/include/plat"
headers=$(cd $mach_dir_old && ls *.h)
omap_dirs="arch/arm/*omap*/ \
drivers/video/omap \
sound/soc/omap"
other_files="drivers/leds/leds-ams-delta.c \
drivers/mfd/menelaus.c \
drivers/mfd/twl4030-core.c \
drivers/mtd/nand/ams-delta.c"

for header in $headers; do
old="#include <mach\/$header"
new="#include <plat\/$header"
for dir in $omap_dirs; do
find $dir -type f -name \*.[chS] | \
xargs sed -i "s/$old/$new/"
done
find drivers/ -type f -name \*omap*.[chS] | \
xargs sed -i "s/$old/$new/"
for file in $other_files; do
sed -i "s/$old/$new/" $file
done
done

for header in $(ls $mach_dir_old/*.h); do
git mv $header $plat_dir_new/
done

Signed-off-by: Tony Lindgren <tony@atomide.com>

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OMAP: PM: Hook into PM counters

This patch modifies the clock, clockdomain and OMAP3 specific
powerdomain code to call the PM counter infrastructure whenever one or
more powerdomains might have chan

OMAP: PM: Hook into PM counters

This patch modifies the clock, clockdomain and OMAP3 specific
powerdomain code to call the PM counter infrastructure whenever one or
more powerdomains might have changed state.

Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

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OMAP2/3 clock: split, rename omap2_wait_clock_ready()

Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not
handled by the current omap2_wait_clock_ready() code. In preparation
for p

OMAP2/3 clock: split, rename omap2_wait_clock_ready()

Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not
handled by the current omap2_wait_clock_ready() code. In preparation
for patches that fix the unusual devices, rename the function
omap2_wait_clock_ready() to omap2_wait_module_ready() and split it
into three parts:

1. A clkops-specific companion clock return function (by default,
omap2_clk_dflt_find_companion())

2. A clkops-specific CM_IDLEST register address and bit shift return
function (by default, omap2_clk_dflt_find_idlest())

3. Code to wait for the CM to indicate that the module is ready
(omap2_cm_wait_idlest())

Clocks can now specify their own custom find_companion() and find_idlest()
functions; used in subsequent patches.

Signed-off-by: Paul Walmsley <paul@pwsan.com>

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OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisons

with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1
after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT)

OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisons

with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1
after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

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ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASE

Remove OMAP_PRM_REGADDR and use processor specific defines instead.

Also fold in a patch from Kevin Hilman to add _OFFSET #defines
for the P

ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASE

Remove OMAP_PRM_REGADDR and use processor specific defines instead.

Also fold in a patch from Kevin Hilman to add _OFFSET #defines
for the PRCM registers to be used with the prm_[read|write]_* macros.
These are used extensively in the forthcoming OMAP PM support.

Also remove now unused OMAP2_PRM_BASE.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASE

Remove OMAP_PRM_REGADDR and use processor specific defines instead.

Also fold in a patch from Kevin Hilman to add _OFFSET #defines
for the P

ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASE

Remove OMAP_PRM_REGADDR and use processor specific defines instead.

Also fold in a patch from Kevin Hilman to add _OFFSET #defines
for the PRCM registers to be used with the prm_[read|write]_* macros.
These are used extensively in the forthcoming OMAP PM support.

Also remove now unused OMAP2_PRM_BASE.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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OMAP3 clock: lessen amount of noisy messages

On our system we see the following messages:

Disabling unused clock "gpt2_ick"
Disabling unused clock "gpt3_ick"
Disabling unused clock "gpt4_ick"
Disab

OMAP3 clock: lessen amount of noisy messages

On our system we see the following messages:

Disabling unused clock "gpt2_ick"
Disabling unused clock "gpt3_ick"
Disabling unused clock "gpt4_ick"
Disabling unused clock "gpt5_ick"
...

The messages have KERN_INFO level and if you have serial
console, they normally go there. I do not think it is good
idea to print that much stuff there. Moreover, messages
are not properly prefixed and for mortals it is not
immeadietly clear where they come from.

Let's give them debugging level instead.

Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: trimmed debugging output in patch description]

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OMAP3 clock: use pr_debug() rather than pr_info() in some clock change code

The CORE DPLL M2 frequency change code should use pr_debug(), not
pr_info(), for its debug messages. Same with
omap2_clks

OMAP3 clock: use pr_debug() rather than pr_info() in some clock change code

The CORE DPLL M2 frequency change code should use pr_debug(), not
pr_info(), for its debug messages. Same with
omap2_clksel_round_rate_div(). While here, convert a few printk(KERN_ERR ..
into pr_err().

Signed-off-by: Paul Walmsley <paul@pwsan.com>

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[ARM] omap: clk_set_parent: deny changing parent if clock is enabled

Richard Woodruff writes:
| The historic usage of this has been against single use leaf clocks
| (1st instance of gptimer). When

[ARM] omap: clk_set_parent: deny changing parent if clock is enabled

Richard Woodruff writes:
| The historic usage of this has been against single use leaf clocks
| (1st instance of gptimer). When it was used it did:
| clk_get()
| clk_set_parent()
| clk_enable()
|
| This usage was ok for that. Use on a disabled clock is needed.
|
| If there are multiple users on the clock or it is enabled there are
| problems.
|
| The call can still be unfriendly if 2 different drivers are using the
| clock with their own clock get/enable. It might be the function should
| return an error if usecount != 0 to stop surprises. It is all around
| better if the parenting is done when the clock is off.

This is a good reason to ensure that the clock is not enabled when
clk_set_parent() is called.

Acked-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: add support for bypassing DPLLs

This roughly corresponds with OMAP commits: 7d06c48, 3241b19,
88b5d9b, 18a5500, 9c909ac, 5c6497b, 8b1f0bd, 2ac1da8.

For both OMAP2 and OMAP3, we note the

[ARM] omap: add support for bypassing DPLLs

This roughly corresponds with OMAP commits: 7d06c48, 3241b19,
88b5d9b, 18a5500, 9c909ac, 5c6497b, 8b1f0bd, 2ac1da8.

For both OMAP2 and OMAP3, we note the reference and bypass clocks in
the DPLL data structure. Whenever we modify the DPLL rate, we first
ensure that both the reference and bypass clocks are enabled. Then,
we decide whether to use the reference and DPLL, or the bypass clock
if the desired rate is identical to the bypass rate, and program the
DPLL appropriately. Finally, we update the clock's parent, and then
disable the unused clocks.

This keeps the parents correctly balanced, and more importantly ensures
that the bypass clock is running whenever we reprogram the DPLL. This
is especially important because the procedure for reprogramming the DPLL
involves switching to the bypass clock.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: fix clock reparenting in omap2_clk_set_parent()

When changing the parent of a clock, it is necessary to keep the
clock use counts balanced otherwise things the parent state will
get corr

[ARM] omap: fix clock reparenting in omap2_clk_set_parent()

When changing the parent of a clock, it is necessary to keep the
clock use counts balanced otherwise things the parent state will
get corrupted. Since we already disable and re-enable the clock,
we might as well use the recursive versions instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: fix _omap2_clksel_get_src_field()

_omap2_clksel_get_src_field() was returning the first entry which was
either the default _or_ applicable to the SoC. This is wrong - we
should be retur

[ARM] omap: fix _omap2_clksel_get_src_field()

_omap2_clksel_get_src_field() was returning the first entry which was
either the default _or_ applicable to the SoC. This is wrong - we
should be returning the first default which is applicable to the SoC.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: fix omap2_divisor_to_clksel() error return value

The error checks for omap2_divisor_to_clksel() and comment disagree with
the actual value returned on error. Fix this to return the corr

[ARM] omap: fix omap2_divisor_to_clksel() error return value

The error checks for omap2_divisor_to_clksel() and comment disagree with
the actual value returned on error. Fix this to return the correct error
value.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: arrange for clock recalc methods to return the rate

linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce
introduces a way to "dry run" clock changes before they're committed

[ARM] omap: arrange for clock recalc methods to return the rate

linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce
introduces a way to "dry run" clock changes before they're committed.
However, this involves putting logic to handle this into each and
every recalc function, and unfortunately due to the caching, led to
some bugs.

Solve both of issues by making the recalc methods always return the
clock rate for the clock, which the caller decides what to do with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: fix clockdomain enable/disable ordering

Based on a patch from Paul Walmsley <paul@pwsan.com>:

omap2_clk_enable() should enable a clock's clockdomain before
attempting to enable its pa

[ARM] omap: fix clockdomain enable/disable ordering

Based on a patch from Paul Walmsley <paul@pwsan.com>:

omap2_clk_enable() should enable a clock's clockdomain before
attempting to enable its parent clock's clockdomain. Similarly, in
the unlikely event that the parent clock enable fails, the clockdomain
should be disabled.

linux-omap source commit is 6d6e285e5a7912b1ea68fadac387304c914aaba8.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: fix usecount decrement bug

Based upon a patch from Paul Walmsley <paul@pwsan.com>:

If _omap2_clk_enable() fails, the clock's usecount must be decremented
by one no matter whether the

[ARM] omap: fix usecount decrement bug

Based upon a patch from Paul Walmsley <paul@pwsan.com>:

If _omap2_clk_enable() fails, the clock's usecount must be decremented
by one no matter whether the clock has a parent or not.

but reorganised a bit.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP2/3 clock: convert remaining MPU barriers into OCP barriers

Several parts of the OMAP2/3 clock code use wmb() to try to ensure
that the hardware write completes before continuing. This ap

[ARM] OMAP2/3 clock: convert remaining MPU barriers into OCP barriers

Several parts of the OMAP2/3 clock code use wmb() to try to ensure
that the hardware write completes before continuing. This approach is
problematic: wmb() only ensures that the write leaves the ARM. It
does not ensure that the write actually reaches the endpoint device.
The endpoint device in this case - either the PRM, CM, or SCM - is
three interconnects away from the ARM - and the final interconnect is
low-speed. And the OCP interconnects will post the write, and who
knows how long that will take to complete. So the wmb() is not what
we want. Worse, the wmb() is indiscriminate; it causes the ARM to
flush any other unrelated buffered writes and wait for the local
interconnect to acknowledge them - potentially very expensive.

Fix this by converting the wmb()s into readbacks of the same PRM/CM/SCM
register. Since the PRM/CM/SCM devices use a single OCP thread, this
will cause the MPU to block while waiting for posted writes to that device
to complete.

linux-omap source commit is 260f5487848681b4d8ea7430a709a601bbcb21d1.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP2xxx clock: consolidate DELAYED_APP clock commits; fix barrier

Consolidate the commit code for DELAYED_APP clocks into a subroutine,
_omap2xxx_clk_commit(). Also convert the MPU barrier w

[ARM] OMAP2xxx clock: consolidate DELAYED_APP clock commits; fix barrier

Consolidate the commit code for DELAYED_APP clocks into a subroutine,
_omap2xxx_clk_commit(). Also convert the MPU barrier wmb() into an
OCP barrier, since with an MPU barrier, we have no guarantee that the
write actually reached the endpoint device.

linux-omap source commit is 0f5bdb736515801b296125d16937a21ff7b3cfdc.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP2/3 clock: don't use a barrier after clk_disable()

clk_disable() previously used an ARM barrier, wmb(), to try to ensure
that the hardware write completed before continuing. There are som

[ARM] OMAP2/3 clock: don't use a barrier after clk_disable()

clk_disable() previously used an ARM barrier, wmb(), to try to ensure
that the hardware write completed before continuing. There are some
problems with this approach.

The first problem is that wmb() only ensures that the write leaves the
ARM -- not that it actually reaches the endpoint device. In this
case, the endpoint device - either the PRM, CM, or SCM - is three
interconnects away from the ARM, and the final interconnect is
low-speed. And the OCP interconnects will post the write, who knows
how long that will take to complete. So the wmb() is not really what
we want.

Worse, the wmb() is indiscriminate; it will cause the ARM to flush any
other unrelated buffered writes and wait for the local interconnect to
acknowledge them - potentially very expensive.

This first problem could be fixed by doing a readback of the same PRM/CM/SCM
register. Since these devices use a single OCP thread, this will cause the
MPU to wait for the write to complete.

But the primary problem is a conceptual one: clk_disable() should not
need any kind of barrier. clk_enable() needs one since device driver
code must not access a device until its clocks are known to be
enabled. But clk_disable() has no such restriction.

Since blocking the MPU on a PRM/CM/SCM write can be a very
high-latency operation - several hundred MPU cycles - it's worth
avoiding this barrier if possible.

linux-omap source commit is f4aacad2c0ed1055622d5c1e910befece24ef0e2.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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