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Searched refs:syscfg (Results 1 – 25 of 93) sorted by relevance

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/openbmc/linux/drivers/bus/
H A Dvexpress-config.c54 struct vexpress_syscfg *syscfg; member
161 struct vexpress_syscfg *syscfg = func->syscfg; in vexpress_syscfg_exec() local
169 command = readl(syscfg->base + SYS_CFGCTRL); in vexpress_syscfg_exec()
181 dev_dbg(syscfg->dev, "func %p, command %x, data %x\n", in vexpress_syscfg_exec()
183 writel(*data, syscfg->base + SYS_CFGDATA); in vexpress_syscfg_exec()
184 writel(0, syscfg->base + SYS_CFGSTAT); in vexpress_syscfg_exec()
185 writel(command, syscfg->base + SYS_CFGCTRL); in vexpress_syscfg_exec()
201 status = readl(syscfg->base + SYS_CFGSTAT); in vexpress_syscfg_exec()
212 *data = readl(syscfg->base + SYS_CFGDATA); in vexpress_syscfg_exec()
213 dev_dbg(syscfg->dev, "func %p, read data %x\n", func, *data); in vexpress_syscfg_exec()
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/openbmc/linux/drivers/phy/intel/
H A Dphy-intel-keembay-emmc.c43 struct regmap *syscfg; member
66 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
73 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK, in keembay_emmc_phy_power()
109 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
123 ret = regmap_read_poll_timeout(priv->syscfg, PHY_STAT, in keembay_emmc_phy_power()
132 ret = regmap_update_bits(priv->syscfg, PHY_CFG_2, SEL_FREQ_MASK, in keembay_emmc_phy_power()
140 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK, in keembay_emmc_phy_power()
173 ret = regmap_read_poll_timeout(priv->syscfg, PHY_STAT, in keembay_emmc_phy_power()
218 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, SEL_DLY_TXCLK_MASK, in keembay_emmc_phy_power_on()
226 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, OTAP_DLY_ENA_MASK, in keembay_emmc_phy_power_on()
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H A Dphy-intel-lgm-emmc.c47 struct regmap *syscfg; member
64 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
88 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
102 ret = regmap_read_poll_timeout(priv->syscfg, EMMC_PHYSTAT_REG, in intel_emmc_phy_power()
111 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL2_REG, FRQSEL_MASK, in intel_emmc_phy_power()
119 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, ENDLL_MASK, in intel_emmc_phy_power()
140 ret = regmap_read_poll_timeout(priv->syscfg, in intel_emmc_phy_power()
193 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL0_REG, DR_TY_MASK, in intel_emmc_phy_power_on()
201 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL0_REG, OTAPDLYENA, in intel_emmc_phy_power_on()
209 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL0_REG, in intel_emmc_phy_power_on()
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/openbmc/u-boot/drivers/misc/
H A Dvexpress_config.c29 static int vexpress_config_exec(struct vexpress_config_sysreg *syscfg, in vexpress_config_exec() argument
34 cmd = (*(u32 *)buf) | SYS_CFGCTRL_START | (syscfg->site << 16); in vexpress_config_exec()
38 writel(0xdeadbeef, syscfg->addr + SYS_CFGDATA); in vexpress_config_exec()
41 writel(((u32 *)buf)[1], syscfg->addr + SYS_CFGDATA); in vexpress_config_exec()
43 writel(0, syscfg->addr + SYS_CFGSTAT); in vexpress_config_exec()
44 writel(cmd, syscfg->addr + SYS_CFGCTRL); in vexpress_config_exec()
49 status = readl(syscfg->addr + SYS_CFGSTAT); in vexpress_config_exec()
58 (*(u32 *)buf) = readl(syscfg->addr + SYS_CFGDATA); in vexpress_config_exec()
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstih407-family.dtsi54 st,syscfg = <&syscfg_core 0x8e0>;
120 st,syscfg = <&syscfg_sbc_reg>;
139 irq-syscfg {
140 compatible = "st,stih407-irq-syscfg";
141 st,syscfg = <&syscfg_core>;
151 st,syscfg = <&syscfg_core 0x100 0xf4>;
159 st,syscfg = <&syscfg_core>;
172 st,syscfg = <0x114 0x818 0xe0 0xec>;
187 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
201 st,syscfg = <0x11c 0x820>;
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H A Dstm32mp151.dtsi115 st,syscfg = <&syscfg>;
529 st,syscfg-fmp = <&syscfg 0x4 0x1>;
545 st,syscfg-fmp = <&syscfg 0x4 0x2>;
561 st,syscfg-fmp = <&syscfg 0x4 0x4>;
577 st,syscfg-fmp = <&syscfg 0x4 0x10>;
1088 st,syscfg = <&syscfg>;
1230 syscfg: syscon@50020000 { label
1231 compatible = "st,stm32mp157-syscfg", "syscon";
1504 st,syscon = <&syscfg 0x4>;
1613 st,syscfg-fmp = <&syscfg 0x4 0x8>;
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/openbmc/u-boot/arch/arm/dts/
H A Dstih407-family.dtsi50 st,syscfg = <&syscfg_core 0x8e0>;
123 st,syscfg = <&syscfg_sbc_reg>;
142 syscfg_sbc: sbc-syscfg@9620000 {
143 compatible = "st,stih407-sbc-syscfg", "syscon";
147 syscfg_front: front-syscfg@9280000 {
148 compatible = "st,stih407-front-syscfg", "syscon";
152 syscfg_rear: rear-syscfg@9290000 {
153 compatible = "st,stih407-rear-syscfg", "syscon";
157 syscfg_flash: flash-syscfg@92a0000 {
158 compatible = "st,stih407-flash-syscfg", "syscon";
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/openbmc/linux/drivers/watchdog/
H A Dst_lpc_wdt.c45 struct st_wdog_syscfg *syscfg; member
68 if (st_wdog->syscfg->reset_type_reg) in st_wdog_setup()
70 st_wdog->syscfg->reset_type_reg, in st_wdog_setup()
71 st_wdog->syscfg->reset_type_mask, in st_wdog_setup()
76 st_wdog->syscfg->enable_reg, in st_wdog_setup()
77 st_wdog->syscfg->enable_mask, in st_wdog_setup()
78 enable ? 0 : st_wdog->syscfg->enable_mask); in st_wdog_setup()
181 st_wdog->syscfg = (struct st_wdog_syscfg *)match->data; in st_wdog_probe()
/openbmc/linux/Documentation/devicetree/bindings/power/reset/
H A Dst-reset.txt5 - st,syscfg: should be a phandle of the syscfg node.
10 st,syscfg = <&syscfg_sbc_reg>;
/openbmc/linux/drivers/cpufreq/
H A Dsti-cpufreq.c52 struct regmap *syscfg; member
70 ret = regmap_read(ddata.syscfg, major_offset, &socid); in sti_cpufreq_fetch_major()
240 ddata.syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in sti_cpufreq_fetch_syscon_registers()
241 if (IS_ERR(ddata.syscfg)) { in sti_cpufreq_fetch_syscon_registers()
243 return PTR_ERR(ddata.syscfg); in sti_cpufreq_fetch_syscon_registers()
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-miphy28lp.txt9 - st,syscfg : Should be a phandle of the system configuration register group
29 - st,syscfg : Offset of the parent configuration register.
50 st,syscfg = <&syscfg_core>;
63 st,syscfg = <0x114 0x818 0xe0 0xec>;
78 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
92 st,syscfg = <0x11c 0x820>;
H A Dphy-miphy365x.txt9 - st,syscfg : Phandle / integer array property. Phandle of sysconfig group
43 st,syscfg = <&syscfg_rear 0x824 0x828>;
57 reg-names = "sata", "pcie", "syscfg";
H A Dphy-stih407-usb.txt8 - st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl registe…
20 st,syscfg = <&syscfg_core 0x100 0xf4>;
/openbmc/linux/drivers/mtd/nand/onenand/
H A Donenand_omap2.c149 u32 syscfg; in omap2_onenand_wait() local
188 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
189 if (!(syscfg & ONENAND_SYS_CFG1_IOBE)) { in omap2_onenand_wait()
190 syscfg |= ONENAND_SYS_CFG1_IOBE; in omap2_onenand_wait()
191 write_reg(c, syscfg, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
193 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
233 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
234 syscfg &= ~ONENAND_SYS_CFG1_IOBE; in omap2_onenand_wait()
235 write_reg(c, syscfg, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
/openbmc/linux/drivers/irqchip/
H A Dirq-st.c38 unsigned int syscfg; member
134 return regmap_update_bits(ddata->regmap, ddata->syscfg, in st_irq_syscfg_enable()
147 ddata->syscfg = (unsigned int) device_get_match_data(&pdev->dev); in st_irq_syscfg_probe()
164 return regmap_update_bits(ddata->regmap, ddata->syscfg, in st_irq_syscfg_resume()
/openbmc/u-boot/doc/device-tree-bindings/usb/
H A Ddwc3-st.txt9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
41 reg-names = "reg-glue", "syscfg-reg";
42 st,syscfg = <&syscfg_core>;
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dst,sti-asoc-card.txt18 - st,syscfg: phandle to boot-device system configuration registers
57 st,syscfg = <&syscfg_core>;
69 st,syscfg = <&syscfg_core>;
80 st,syscfg = <&syscfg_core>;
91 st,syscfg = <&syscfg_core>;
105 - st,syscfg: phandle to boot-device system configuration registers.
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dst_lpc_wdt.txt24 - st,syscfg : Phandle to syscfg node used to enable watchdog and configure
37 st,syscfg = <&syscfg_core>;
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Ddwc3-st.txt9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
47 reg-names = "reg-glue", "syscfg-reg";
48 st,syscfg = <&syscfg_core>;
/openbmc/linux/tools/testing/selftests/arm64/fp/
H A DMakefile10 vec-syscfg \
37 $(OUTPUT)/vec-syscfg: vec-syscfg.c $(OUTPUT)/rdvl.o
/openbmc/qemu/hw/arm/
H A Dstm32l4x5_soc.c145 object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32L4X5_SYSCFG); in stm32l4x5_soc_initfn()
238 busdev = SYS_BUS_DEVICE(&s->syscfg); in stm32l4x5_soc_realize()
239 qdev_connect_clock_in(DEVICE(&s->syscfg), "clk", in stm32l4x5_soc_realize()
250 qdev_get_gpio_in(DEVICE(&s->syscfg), in stm32l4x5_soc_realize()
255 qdev_pass_gpios(DEVICE(&s->syscfg), dev_soc, NULL); in stm32l4x5_soc_realize()
304 qdev_connect_gpio_out(DEVICE(&s->syscfg), i, in stm32l4x5_soc_realize()
H A Dstm32f405_soc.c65 object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32F4XX_SYSCFG); in stm32f405_soc_initfn()
175 dev = DEVICE(&s->syscfg); in stm32f405_soc_realize()
176 if (!sysbus_realize(SYS_BUS_DEVICE(&s->syscfg), errp)) { in stm32f405_soc_realize()
254 qdev_connect_gpio_out(DEVICE(&s->syscfg), i, qdev_get_gpio_in(dev, i)); in stm32f405_soc_realize()
/openbmc/linux/drivers/iio/adc/
H A Dstm32-adc-core.c119 struct regmap *syscfg; member
472 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_en()
479 ret = regmap_write(priv->syscfg, in stm32_adc_core_switches_supply_en()
518 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_dis()
519 regmap_write(priv->syscfg, STM32MP1_SYSCFG_PMCCLRR, in stm32_adc_core_switches_supply_dis()
607 priv->syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_adc_core_switches_probe()
608 if (IS_ERR(priv->syscfg)) { in stm32_adc_core_switches_probe()
609 ret = PTR_ERR(priv->syscfg); in stm32_adc_core_switches_probe()
613 priv->syscfg = NULL; in stm32_adc_core_switches_probe()
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dst-fsm.txt11 - st,syscfg : Phandle to boot-device system configuration registers
21 st,syscfg = <&syscfg_rear>;
/openbmc/u-boot/doc/device-tree-bindings/phy/
H A Dphy-stih407-usb.txt8 - st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl registe…
20 st,syscfg = <&syscfg_core 0x100 0xf4>;

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