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Searched refs:phy_regs (Results 1 – 25 of 57) sorted by relevance

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/openbmc/u-boot/drivers/usb/host/
H A Dutmi-armada100.c20 struct armd1usb_phy_reg *phy_regs = in utmi_phy_init() local
24 setbits_le32(&phy_regs->utmi_ctrl, INPKT_DELAY_SOF | PLL_PWR_UP); in utmi_phy_init()
26 setbits_le32(&phy_regs->utmi_ctrl, PHY_PWR_UP); in utmi_phy_init()
28 clrbits_le32(&phy_regs->utmi_pll, PLL_FBDIV_MASK | PLL_REFDIV_MASK); in utmi_phy_init()
29 setbits_le32(&phy_regs->utmi_pll, N_DIVIDER << PLL_FBDIV | M_DIVIDER); in utmi_phy_init()
31 setbits_le32(&phy_regs->utmi_tx, PHSEL_VAL << CK60_PHSEL); in utmi_phy_init()
35 while (--timeout && ((readl(&phy_regs->utmi_pll) & PLL_READY) == 0)) in utmi_phy_init()
41 setbits_le32(&phy_regs->utmi_pll, VCOCAL_START); in utmi_phy_init()
43 clrbits_le32(&phy_regs->utmi_pll, VCOCAL_START); in utmi_phy_init()
46 setbits_le32(&phy_regs->utmi_tx, RCAL_START); in utmi_phy_init()
[all …]
H A Dehci-mxs.c23 struct mxs_usbphy_regs *phy_regs; member
109 writel(USBPHY_CTRL_SFTRST, &port->phy_regs->hw_usbphy_ctrl_set); in ehci_hcd_init()
112 &port->phy_regs->hw_usbphy_ctrl_clr); in ehci_hcd_init()
120 writel(0, &port->phy_regs->hw_usbphy_pwd); in ehci_hcd_init()
124 &port->phy_regs->hw_usbphy_ctrl_set); in ehci_hcd_init()
165 writel(tmp, &port->phy_regs->hw_usbphy_pwd); in ehci_hcd_stop()
/openbmc/u-boot/drivers/usb/phy/
H A Domap_usb_phy.c66 static void omap_usb_dpll_relock(struct omap_usb3_phy *phy_regs) in omap_usb_dpll_relock() argument
70 writel(SET_PLL_GO, &phy_regs->pll_go); in omap_usb_dpll_relock()
72 val = readl(&phy_regs->pll_status); in omap_usb_dpll_relock()
78 static void omap_usb_dpll_lock(struct omap_usb3_phy *phy_regs) in omap_usb_dpll_lock() argument
87 val = readl(&phy_regs->pll_config_1); in omap_usb_dpll_lock()
90 writel(val, &phy_regs->pll_config_1); in omap_usb_dpll_lock()
92 val = readl(&phy_regs->pll_config_2); in omap_usb_dpll_lock()
95 writel(val, &phy_regs->pll_config_2); in omap_usb_dpll_lock()
97 val = readl(&phy_regs->pll_config_1); in omap_usb_dpll_lock()
100 writel(val, &phy_regs->pll_config_1); in omap_usb_dpll_lock()
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/openbmc/linux/drivers/phy/sunplus/
H A Dphy-sunplus-usb2.c73 void __iomem *phy_regs; member
104 val = readl(usbphy->phy_regs + CONFIG7); in update_disc_vol()
106 writel(val, usbphy->phy_regs + CONFIG7); in update_disc_vol()
135 val = readl(usbphy->phy_regs + CONFIG9); in sp_uphy_init()
137 writel(val, usbphy->phy_regs + CONFIG9); in sp_uphy_init()
139 val = readl(usbphy->phy_regs + CONFIG1); in sp_uphy_init()
141 writel(val, usbphy->phy_regs + CONFIG1); in sp_uphy_init()
143 val = readl(usbphy->phy_regs + CONFIG23); in sp_uphy_init()
145 writel(val, usbphy->phy_regs + CONFIG23); in sp_uphy_init()
153 usbphy->phy_regs + CONFIG16); in sp_uphy_init()
[all …]
/openbmc/linux/drivers/mmc/host/
H A Dsdhci-xenon-phy.c249 struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs; in xenon_emmc_phy_init() local
256 reg = sdhci_readl(host, phy_regs->timing_adj); in xenon_emmc_phy_init()
258 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_init()
298 false, host, phy_regs->timing_adj); in xenon_emmc_phy_init()
355 struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs; in xenon_emmc_phy_enable_dll() local
361 reg = sdhci_readl(host, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll()
366 reg = sdhci_readl(host, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll()
380 reg |= phy_regs->dll_update; in xenon_emmc_phy_enable_dll()
383 sdhci_writel(host, reg, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll()
525 struct xenon_emmc_phy_regs *phy_regs = priv->emmc_phy_regs; in xenon_emmc_phy_slow_mode() local
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/openbmc/linux/drivers/net/ethernet/qualcomm/emac/
H A Demac-sgmii-qdf2432.c163 void __iomem *phy_regs = phy->base; in emac_sgmii_init_qdf2432() local
177 writel(0, phy_regs + EMAC_SGMII_PHY_RESET_CTRL); in emac_sgmii_init_qdf2432()
182 lnstatus = readl(phy_regs + SGMII_PHY_LN_LANE_STATUS); in emac_sgmii_init_qdf2432()
194 writel(0, phy_regs + SGMII_PHY_LN_BIST_GEN0); in emac_sgmii_init_qdf2432()
195 writel(0, phy_regs + SGMII_PHY_LN_BIST_GEN2); in emac_sgmii_init_qdf2432()
196 writel(0, phy_regs + SGMII_PHY_LN_CDR_CTRL1); in emac_sgmii_init_qdf2432()
199 writel(0, phy_regs + EMAC_SGMII_PHY_INTERRUPT_MASK); in emac_sgmii_init_qdf2432()
H A Demac-sgmii-qdf2400.c176 void __iomem *phy_regs = phy->base; in emac_sgmii_init_qdf2400() local
190 writel(0, phy_regs + EMAC_SGMII_PHY_RESET_CTRL); in emac_sgmii_init_qdf2400()
195 lnstatus = readl(phy_regs + SGMII_PHY_LN_LANE_STATUS); in emac_sgmii_init_qdf2400()
207 writel(0, phy_regs + SGMII_PHY_LN_BIST_GEN0); in emac_sgmii_init_qdf2400()
208 writel(0, phy_regs + SGMII_PHY_LN_BIST_GEN2); in emac_sgmii_init_qdf2400()
209 writel(0, phy_regs + SGMII_PHY_LN_CDR_CTRL1); in emac_sgmii_init_qdf2400()
212 writel(0, phy_regs + EMAC_SGMII_PHY_INTERRUPT_MASK); in emac_sgmii_init_qdf2400()
/openbmc/linux/drivers/net/wireless/broadcom/b43/
H A Dradio_2059.c48 .phy_regs.bw1 = r0, \
49 .phy_regs.bw2 = r1, \
50 .phy_regs.bw3 = r2, \
51 .phy_regs.bw4 = r3, \
52 .phy_regs.bw5 = r4, \
53 .phy_regs.bw6 = r5
H A Dradio_2057.c170 .phy_regs.phy_bw1a = r0, \
171 .phy_regs.phy_bw2 = r1, \
172 .phy_regs.phy_bw3 = r2, \
173 .phy_regs.phy_bw4 = r3, \
174 .phy_regs.phy_bw5 = r4, \
175 .phy_regs.phy_bw6 = r5
H A Dradio_2055.c284 .phy_regs.phy_bw1a = r0, \
285 .phy_regs.phy_bw2 = r1, \
286 .phy_regs.phy_bw3 = r2, \
287 .phy_regs.phy_bw4 = r3, \
288 .phy_regs.phy_bw5 = r4, \
289 .phy_regs.phy_bw6 = r5
H A Dradio_2059.h53 struct b43_phy_ht_channeltab_e_phy phy_regs; member
H A Dphy_lcn.c426 u16 phy_regs[] = { 0x910, 0x91e, 0x91f, 0x924, 0x925, 0x926, 0x920, in b43_phy_lcn_load_tx_iir_cck_filter() local
465 b43_phy_write(dev, phy_regs[j], in b43_phy_lcn_load_tx_iir_cck_filter()
478 u16 phy_regs[] = { 0x90f, 0x900, 0x901, 0x906, 0x907, 0x908, 0x902, in b43_phy_lcn_load_tx_iir_ofdm_filter() local
493 b43_phy_write(dev, phy_regs[j], in b43_phy_lcn_load_tx_iir_ofdm_filter()
/openbmc/qemu/hw/net/
H A Dmsf2-emac.c186 s->phy_regs[MII_BMSR] &= ~(MII_BMSR_AN_COMP | in msf2_phy_update_link()
189 s->phy_regs[MII_BMSR] |= (MII_BMSR_AN_COMP | in msf2_phy_update_link()
196 memset(&s->phy_regs[0], 0, sizeof(s->phy_regs)); in msf2_phy_reset()
197 s->phy_regs[MII_BMCR] = 0x1140; in msf2_phy_reset()
198 s->phy_regs[MII_BMSR] = 0x7968; in msf2_phy_reset()
199 s->phy_regs[MII_PHYID1] = 0x0022; in msf2_phy_reset()
200 s->phy_regs[MII_PHYID2] = 0x1550; in msf2_phy_reset()
201 s->phy_regs[MII_ANAR] = 0x01E1; in msf2_phy_reset()
202 s->phy_regs[MII_ANLPAR] = 0xCDE1; in msf2_phy_reset()
228 s->phy_regs[MII_BMSR] |= MII_BMSR_AN_COMP; in write_to_phy()
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H A Dcadence_gem.c646 s->phy_regs[PHY_REG_STATUS] &= ~(PHY_REG_STATUS_ANEGCMPL | in phy_update_link()
648 s->phy_regs[PHY_REG_INT_ST] |= PHY_REG_INT_ST_LINKC; in phy_update_link()
650 s->phy_regs[PHY_REG_STATUS] |= (PHY_REG_STATUS_ANEGCMPL | in phy_update_link()
652 s->phy_regs[PHY_REG_INT_ST] |= (PHY_REG_INT_ST_LINKC | in phy_update_link()
1422 memset(&s->phy_regs[0], 0, sizeof(s->phy_regs)); in gem_phy_reset()
1423 s->phy_regs[PHY_REG_CONTROL] = 0x1140; in gem_phy_reset()
1424 s->phy_regs[PHY_REG_STATUS] = 0x7969; in gem_phy_reset()
1425 s->phy_regs[PHY_REG_PHYID1] = 0x0141; in gem_phy_reset()
1426 s->phy_regs[PHY_REG_PHYID2] = 0x0CC2; in gem_phy_reset()
1427 s->phy_regs[PHY_REG_ANEGADV] = 0x01E1; in gem_phy_reset()
[all …]
H A Dnpcm_gmac.c148 gmac->phy_regs[0][MII_BMSR] |= (MII_BMSR_LINK_ST | MII_BMSR_AN_COMP); in gmac_phy_set_link()
150 gmac->phy_regs[0][MII_BMSR] &= ~(MII_BMSR_LINK_ST | MII_BMSR_AN_COMP); in gmac_phy_set_link()
682 !(gmac->phy_regs[pa][MII_BMSR] & MII_BMSR_AN_COMP)) { in npcm_gmac_mdio_access()
684 gmac->phy_regs[pa][MII_BMSR] |= MII_BMSR_AN_COMP; in npcm_gmac_mdio_access()
686 gmac->phy_regs[0][MII_ANLPAR] = 0x0000; in npcm_gmac_mdio_access()
689 gmac->phy_regs[pa][gr] = data; in npcm_gmac_mdio_access()
691 data = gmac->phy_regs[pa][gr]; in npcm_gmac_mdio_access()
849 memcpy(gmac->phy_regs[0], phy_reg_init, sizeof(phy_reg_init)); in npcm_gmac_reset()
852 gmac->phy_regs[0][MII_BMSR]); in npcm_gmac_reset()
/openbmc/linux/drivers/media/platform/ti/omap3isp/
H A Dispcsiphy.c219 reg = isp_reg_readl(phy->isp, phy->phy_regs, ISPCSIPHY_REG0); in omap3isp_csiphy_config()
230 isp_reg_writel(phy->isp, reg, phy->phy_regs, ISPCSIPHY_REG0); in omap3isp_csiphy_config()
232 reg = isp_reg_readl(phy->isp, phy->phy_regs, ISPCSIPHY_REG1); in omap3isp_csiphy_config()
241 isp_reg_writel(phy->isp, reg, phy->phy_regs, ISPCSIPHY_REG1); in omap3isp_csiphy_config()
345 phy2->phy_regs = OMAP3_ISP_IOMEM_CSIPHY2; in omap3isp_csiphy_init()
355 phy1->phy_regs = OMAP3_ISP_IOMEM_CSIPHY1; in omap3isp_csiphy_init()
H A Dispcsiphy.h32 unsigned int phy_regs; member
/openbmc/linux/drivers/net/mdio/
H A Dmdio-mscc-miim.c56 struct regmap *phy_regs; member
179 if (!miim->phy_regs) in mscc_miim_reset()
185 ret = regmap_update_bits(miim->phy_regs, offset, bits, 0); in mscc_miim_reset()
191 ret = regmap_update_bits(miim->phy_regs, offset, bits, bits); in mscc_miim_reset()
298 miim->phy_regs = phy_regmap; in mscc_miim_probe()
/openbmc/linux/drivers/staging/media/omap4iss/
H A Diss_csiphy.c97 iss_reg_write(phy->iss, phy->phy_regs, REGISTER0, reg); in csiphy_dphy_config()
105 iss_reg_write(phy->iss, phy->phy_regs, REGISTER1, reg); in csiphy_dphy_config()
265 phy1->phy_regs = OMAP4_ISS_MEM_CAMERARX_CORE1; in omap4iss_csiphy_init()
273 phy2->phy_regs = OMAP4_ISS_MEM_CAMERARX_CORE2; in omap4iss_csiphy_init()
H A Diss_csiphy.h33 unsigned int phy_regs; member
/openbmc/u-boot/drivers/net/mscc_eswitch/
H A Docelot_switch.c149 if (miim->phy_regs) { in mscc_miim_reset()
150 writel(0, miim->phy_regs + PHY_CFG); in mscc_miim_reset()
152 | PHY_CFG_ENA, miim->phy_regs + PHY_CFG); in mscc_miim_reset()
194 miim[INTERNAL].phy_regs = ioremap(phy_base[PHY], phy_size[PHY]); in ocelot_mdiobus_init()
H A Dmscc_miim.h8 void __iomem *phy_regs; member
/openbmc/qemu/include/hw/net/
H A Dmsf2-emac.h50 uint16_t phy_regs[PHY_MAX_REGS]; member
H A Dcadence_gem.h80 uint16_t phy_regs[32]; member
/openbmc/u-boot/include/
H A Dfm_eth.h62 .phy_regs = (void *)pregs, \
174 void *phy_regs; member

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