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Searched refs:pci_set_word (Results 1 – 25 of 48) sorted by relevance

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/openbmc/qemu/hw/pci/
H A Dpcie_sriov.c42 pci_set_word(cfg + PCI_SRIOV_VF_OFFSET, vf_offset); in pcie_sriov_pf_init()
43 pci_set_word(cfg + PCI_SRIOV_VF_STRIDE, vf_stride); in pcie_sriov_pf_init()
50 pci_set_word(cfg + PCI_SRIOV_SUP_PGSIZE, SRIOV_SUP_PGSIZE_MINREQ); in pcie_sriov_pf_init()
56 pci_set_word(cfg + PCI_SRIOV_SYS_PGSIZE, 0x1); in pcie_sriov_pf_init()
59 pci_set_word(cfg + PCI_SRIOV_VF_DID, vf_dev_id); in pcie_sriov_pf_init()
60 pci_set_word(cfg + PCI_SRIOV_INITIAL_VF, init_vfs); in pcie_sriov_pf_init()
61 pci_set_word(cfg + PCI_SRIOV_TOTAL_VF, total_vfs); in pcie_sriov_pf_init()
62 pci_set_word(cfg + PCI_SRIOV_NUM_VF, 0); in pcie_sriov_pf_init()
66 pci_set_word(wmask + PCI_SRIOV_CTRL, in pcie_sriov_pf_init()
68 pci_set_word(wmask + PCI_SRIOV_NUM_VF, 0xffff); in pcie_sriov_pf_init()
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H A Dmsi.c137 pci_set_word(dev->config + msi_data_off(dev, msi64bit), msg.data); in msi_set_message()
236 pci_set_word(dev->config + msi_flags_off(dev), flags); in msi_init()
237 pci_set_word(dev->wmask + msi_flags_off(dev), in msi_init()
244 pci_set_word(dev->wmask + msi_data_off(dev, msi64bit), 0xffff); in msi_init()
287 pci_set_word(dev->config + msi_flags_off(dev), flags); in msi_reset()
292 pci_set_word(dev->config + msi_data_off(dev, msi64bit), 0); in msi_reset()
458 pci_set_word(dev->config + msi_flags_off(dev), flags); in msi_write_config()
H A Dpcie.c78 pci_set_word(exp_cap + PCI_EXP_FLAGS, in pcie_cap_v1_fill()
103 pci_set_word(exp_cap + PCI_EXP_LNKSTA, in pcie_cap_v1_fill()
111 pci_set_word(cmask + PCI_EXP_LNKSTA, 0); in pcie_cap_v1_fill()
246 pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB); in pcie_cap_init()
845 pci_set_word(exp_cap + PCI_EXP_SLTSTA, sltsta); in pcie_cap_slot_write_config()
857 pci_set_word(exp_cap + PCI_EXP_SLTSTA, sltsta); in pcie_cap_slot_write_config()
931 pci_set_word(dev->wmask + dev->exp.exp_cap + PCI_EXP_RTCTL, in pcie_cap_root_init()
938 pci_set_word(dev->config + dev->exp.exp_cap + PCI_EXP_RTCTL, 0); in pcie_cap_root_reset()
1167 pci_set_word(dev->config + offset + PCI_ATS_CAP, in pcie_ats_init()
1171 pci_set_word(dev->config + offset + PCI_ATS_CTRL, 0); in pcie_ats_init()
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H A Dpci_bridge.c60 pci_set_word(dev->config + pos + PCI_SSVID_SVID, svid); in pci_bridge_ssvid_init()
61 pci_set_word(dev->config + pos + PCI_SSVID_SSID, ssid); in pci_bridge_ssvid_init()
338 pci_set_word(conf + PCI_BRIDGE_CONTROL, 0); in pci_bridge_reset()
364 pci_set_word(dev->config + PCI_SEC_STATUS, in pci_bridge_initfn()
H A Dpcie_port.c31 pci_set_word(d->config + PCI_STATUS, 0); in pcie_port_init_reg()
32 pci_set_word(d->config + PCI_SEC_STATUS, 0); in pcie_port_init_reg()
H A Dpci.c799 pci_set_word(pci_dev->config + PCI_SUBSYSTEM_VENDOR_ID, in pci_set_default_subsystem_id()
801 pci_set_word(pci_dev->config + PCI_SUBSYSTEM_ID, in pci_set_default_subsystem_id()
870 pci_set_word(dev->cmask + PCI_VENDOR_ID, 0xffff); in pci_init_cmask()
871 pci_set_word(dev->cmask + PCI_DEVICE_ID, 0xffff); in pci_init_cmask()
875 pci_set_word(dev->cmask + PCI_CLASS_DEVICE, 0xffff); in pci_init_cmask()
886 pci_set_word(dev->wmask + PCI_COMMAND, in pci_init_wmask()
901 pci_set_word(dev->w1cmask + PCI_STATUS, in pci_init_w1cmask()
916 pci_set_word(d->wmask + PCI_MEMORY_BASE, in pci_init_mask_bridge()
918 pci_set_word(d->wmask + PCI_MEMORY_LIMIT, in pci_init_mask_bridge()
920 pci_set_word(d->wmask + PCI_PREF_MEMORY_BASE, in pci_init_mask_bridge()
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/openbmc/qemu/hw/pci-bridge/
H A Dsimba.c55 pci_set_word(dev->config + PCI_COMMAND, PCI_COMMAND_MEMORY); in simba_pci_bridge_realize()
56 pci_set_word(dev->config + PCI_STATUS, in simba_pci_bridge_realize()
61 pci_set_word(dev->config + PCI_IO_BASE, PCI_IO_RANGE_TYPE_32); in simba_pci_bridge_realize()
62 pci_set_word(dev->config + PCI_IO_LIMIT, PCI_IO_RANGE_TYPE_32); in simba_pci_bridge_realize()
63 pci_set_word(dev->wmask + PCI_IO_BASE_UPPER16, 0xffff); in simba_pci_bridge_realize()
64 pci_set_word(dev->wmask + PCI_IO_LIMIT_UPPER16, 0xffff); in simba_pci_bridge_realize()
/openbmc/qemu/hw/i386/xen/
H A Dxen_pvdevice.c99 pci_set_word(pci_conf + PCI_VENDOR_ID, d->vendor_id); in xen_pv_realize()
100 pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, d->vendor_id); in xen_pv_realize()
101 pci_set_word(pci_conf + PCI_DEVICE_ID, d->device_id); in xen_pv_realize()
102 pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, d->device_id); in xen_pv_realize()
105 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_MEMORY); in xen_pv_realize()
/openbmc/qemu/hw/riscv/
H A Driscv-iommu-pci.c86 pci_set_word(pci_conf + PCI_VENDOR_ID, s->vendor_id); in riscv_iommu_pci_realize()
87 pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, s->vendor_id); in riscv_iommu_pci_realize()
88 pci_set_word(pci_conf + PCI_DEVICE_ID, s->device_id); in riscv_iommu_pci_realize()
89 pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, s->device_id); in riscv_iommu_pci_realize()
/openbmc/qemu/include/hw/pci/
H A Dpci.h457 pci_set_word(uint8_t *config, uint16_t val) in pci_set_word() function
502 pci_set_word(&pci_config[PCI_VENDOR_ID], val); in pci_config_set_vendor_id()
508 pci_set_word(&pci_config[PCI_DEVICE_ID], val); in pci_config_set_device_id()
520 pci_set_word(&pci_config[PCI_CLASS_DEVICE], val); in pci_config_set_class()
561 pci_set_word(config, val & ~mask); in pci_word_test_and_clear_mask()
569 pci_set_word(config, val | mask); in pci_word_test_and_set_mask()
625 pci_set_word(config, (~mask & val) | (mask & rval)); in pci_set_word_by_mask()
/openbmc/qemu/hw/pci-host/
H A Dpnv_phb.c231 pci_set_word(conf + PCI_MEMORY_BASE, 0); in pnv_phb_root_port_reset_hold()
232 pci_set_word(conf + PCI_MEMORY_LIMIT, 0xfff0); in pnv_phb_root_port_reset_hold()
233 pci_set_word(conf + PCI_PREF_MEMORY_BASE, 0x1); in pnv_phb_root_port_reset_hold()
234 pci_set_word(conf + PCI_PREF_MEMORY_LIMIT, 0xfff1); in pnv_phb_root_port_reset_hold()
H A Dbonito.c508 pci_set_word(d->config + PCI_STATUS, status); in bonito_spciconf_write()
536 pci_set_word(d->config + PCI_STATUS, status); in bonito_spciconf_read()
725 pci_set_word(dev->config + PCI_COMMAND, 0x0000); in bonito_pci_realize()
726 pci_set_word(dev->config + PCI_STATUS, 0x0000); in bonito_pci_realize()
727 pci_set_word(dev->config + PCI_SUBSYSTEM_VENDOR_ID, 0x0000); in bonito_pci_realize()
728 pci_set_word(dev->config + PCI_SUBSYSTEM_ID, 0x0000); in bonito_pci_realize()
H A Dxilinx-pcie.c277 pci_set_word(pci_dev->config + PCI_COMMAND, in xilinx_pcie_root_realize()
279 pci_set_word(pci_dev->config + PCI_MEMORY_BASE, s->mmio_base >> 16); in xilinx_pcie_root_realize()
280 pci_set_word(pci_dev->config + PCI_MEMORY_LIMIT, in xilinx_pcie_root_realize()
H A Dsh_pci.c151 pci_set_word(d->config + PCI_COMMAND, PCI_COMMAND_WAIT); in sh_pcic_pci_realize()
152 pci_set_word(d->config + PCI_STATUS, PCI_STATUS_CAP_LIST | in sh_pcic_pci_realize()
H A Dsabre.c360 pci_set_word(pci_dev->config + PCI_COMMAND, cmd | PCI_COMMAND_IO); in sabre_reset()
452 pci_set_word(d->config + PCI_COMMAND, in sabre_pci_realize()
454 pci_set_word(d->config + PCI_STATUS, in sabre_pci_realize()
/openbmc/qemu/hw/isa/
H A Di82378.c73 pci_set_word(pci_conf + PCI_COMMAND, in i82378_realize()
75 pci_set_word(pci_conf + PCI_STATUS, in i82378_realize()
H A Dvt82c686.c201 pci_set_word(dev->config + PCI_STATUS, PCI_STATUS_FAST_BACK | in via_pm_realize()
814 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | in vt82c686b_isa_reset()
816 pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); in vt82c686b_isa_reset()
883 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | in vt8231_isa_reset()
885 pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); in vt8231_isa_reset()
/openbmc/qemu/hw/net/
H A Dpcnet-pci.c210 pci_set_word(pci_conf + PCI_STATUS, in pci_pcnet_realize()
213 pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, 0x0); in pci_pcnet_realize()
214 pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, 0x0); in pci_pcnet_realize()
H A De1000e.c383 pci_set_word(pdev->config + offset + PCI_PM_PMC, in e1000e_add_pm_capability()
387 pci_set_word(pdev->wmask + offset + PCI_PM_CTRL, in e1000e_add_pm_capability()
392 pci_set_word(pdev->w1cmask + offset + PCI_PM_CTRL, in e1000e_add_pm_capability()
428 pci_set_word(pci_dev->config + PCI_SUBSYSTEM_VENDOR_ID, s->subsys_ven); in e1000e_pci_realize()
429 pci_set_word(pci_dev->config + PCI_SUBSYSTEM_ID, s->subsys); in e1000e_pci_realize()
H A Digb.c367 pci_set_word(pdev->config + offset + PCI_PM_PMC, in igb_add_pm_capability()
371 pci_set_word(pdev->wmask + offset + PCI_PM_CTRL, in igb_add_pm_capability()
376 pci_set_word(pdev->w1cmask + offset + PCI_PM_CTRL, in igb_add_pm_capability()
/openbmc/qemu/hw/audio/
H A Dvia-ac97.c439 pci_set_word(pci_dev->config + PCI_COMMAND, PCI_COMMAND_MASTER); in via_ac97_realize()
440 pci_set_word(pci_dev->wmask + PCI_COMMAND, PCI_COMMAND_IO); in via_ac97_realize()
441 pci_set_word(pci_dev->config + PCI_STATUS, in via_ac97_realize()
499 pci_set_word(pci_dev->config + PCI_COMMAND, in via_mc97_realize()
501 pci_set_word(pci_dev->config + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); in via_mc97_realize()
/openbmc/qemu/hw/ide/
H A Dpiix.c118 pci_set_word(pci_conf + PCI_COMMAND, 0x0000); in piix_ide_reset()
119 pci_set_word(pci_conf + PCI_STATUS, in piix_ide_reset()
H A Dvia.c136 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_WAIT); in via_ide_reset()
137 pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK | in via_ide_reset()
H A Dich.c143 pci_set_word(sata_cap + SATA_CAP_REV, 0x10); in pci_ich9_ahci_realize()
/openbmc/qemu/hw/usb/
H A Dhcd-ohci-pci.c58 pci_set_word(dev->parent_obj.config + PCI_STATUS, in ohci_pci_die()

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