Revision tags: v9.2.0, v9.1.2, v9.1.1 |
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#
28ae3179 |
| 13-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20240913' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * s390: convert s390 virtio-ccw and CPU to three-phase reset * reset: remove
Merge tag 'pull-target-arm-20240913' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * s390: convert s390 virtio-ccw and CPU to three-phase reset * reset: remove now-unused device_class_set_parent_reset() * reset: introduce device_class_set_legacy_reset() * reset: remove unneeded transitional machinery * kvm: Use 'unsigned long' for request argument in functions wrapping ioctl() * hvf: arm: Implement and use hvf_get_physical_address_range so VMs can have larger-than-36-bit IPA spaces when the host supports this * target/arm/tcg: refine cache descriptions with a wrapper * hw/net/can/xlnx-versal-canfd: fix various bugs * MAINTAINERS: update versal, CAN maintainer entries * hw/intc/arm_gic: fix spurious level triggered interrupts
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* tag 'pull-target-arm-20240913' of https://git.linaro.org/people/pmaydell/qemu-arm: (27 commits) hw/intc/arm_gic: fix spurious level triggered interrupts MAINTAINERS: Add my-self as CAN maintainer MAINTAINERS: Update Xilinx Versal OSPI maintainer's email address MAINTAINERS: Remove Vikram Garhwal as maintainer hw/net/can/xlnx-versal-canfd: Fix FIFO issues hw/net/can/xlnx-versal-canfd: Simplify DLC conversions hw/net/can/xlnx-versal-canfd: Fix byte ordering hw/net/can/xlnx-versal-canfd: Handle flags correctly hw/net/can/xlnx-versal-canfd: Translate CAN ID registers hw/net/can/xlnx-versal-canfd: Fix CAN FD flag check hw/net/can/xlnx-versal-canfd: Fix interrupt level target/arm/tcg: refine cache descriptions with a wrapper hvf: arm: Implement and use hvf_get_physical_address_range hvf: Split up hv_vm_create logic per arch hw/boards: Add hvf_get_physical_address_range to MachineClass kvm: Use 'unsigned long' for request argument in functions wrapping ioctl() hw/core/resettable: Remove transitional_function machinery hw/core/qdev: Simplify legacy_reset handling hw: Remove device_phases_reset() hw: Rename DeviceClass::reset field to legacy_reset ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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e3d08143 |
| 13-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw: Use device_class_set_legacy_reset() instead of opencoding
Use device_class_set_legacy_reset() instead of opencoding an assignment to DeviceClass::reset. This change was produced with: spatch --
hw: Use device_class_set_legacy_reset() instead of opencoding
Use device_class_set_legacy_reset() instead of opencoding an assignment to DeviceClass::reset. This change was produced with: spatch --macro-file scripts/cocci-macro-file.h \ --sp-file scripts/coccinelle/device-reset.cocci \ --keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240830145812.1967042-8-peter.maydell@linaro.org
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Revision tags: v9.1.0 |
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dccbaf0c |
| 27-Feb-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'hw-misc-20240227' of https://github.com/philmd/qemu into staging
Misc HW patch queue
hw: Remove sysbus_address_space() (Phil) hw/nubus: Add nubus-virtio-mmio device (Mark) hw/usb: Remove
Merge tag 'hw-misc-20240227' of https://github.com/philmd/qemu into staging
Misc HW patch queue
hw: Remove sysbus_address_space() (Phil) hw/nubus: Add nubus-virtio-mmio device (Mark) hw/usb: Remove usb_bus_find() (Paolo) hw/usb: Extract sysbus-ohci from ohci (Paolo) hw/nvme: Fix invalid endian conversion hw/i386: More PC machine housekeeping (Bernhard, Phil) hw/ide: Restrict "ide-internal.h" (Zoltan, Phil) qom: Expose object_resolve_type_unambiguous() (Paolo)
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* tag 'hw-misc-20240227' of https://github.com/philmd/qemu: (30 commits) hw/ide: Include 'ide-internal.h' from current path hw/ide: Remove last two uses of ide/internal.h outside of hw/ide/ hw/arm/sbsa-ref: Do not open-code ahci_ide_create_devs() hw/i386/pc: Populate RTC attribute directly hw/i386/pc: Remove unneeded class attribute "kvmclock_enabled" hw/i386/pc_{piix, q35}: Eliminate local pci_bus/pci_host variables hw/i386/pc: Rename "bus" attribute to "pcibus" hw/i386/q35: Include missing 'hw/acpi/acpi.h' header hw/i386/sgx: Use QDev API hw/i386/x86: Let ioapic_init_gsi() take parent as pointer hw/nvme: fix invalid endian conversion hw/usb: remove duplicate file in system_ss hw/usb: extract sysbus-ohci to a separate file hw/usb: remove usb_bus_find hw/ppc/pseries: do not require CONFIG_USB hw/ppc/mac_newworld: do not require CONFIG_USB hw/hppa: do not require CONFIG_USB hw/mips/loongson3_virt: do not require CONFIG_USB hw/sh4/r2d: do not use usb_bus_find() hw/ppc/sam460ex: do not use usb_bus_find() ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
0316482e |
| 25-Feb-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/ide: Include 'ide-internal.h' from current path
Rename "internal.h" as "ide-internal.h", and include it via its relative local path, instead of absolute to the project root path.
Signed-off-by:
hw/ide: Include 'ide-internal.h' from current path
Rename "internal.h" as "ide-internal.h", and include it via its relative local path, instead of absolute to the project root path.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240226080632.9596-4-philmd@linaro.org>
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3d54cbf2 |
| 22-Feb-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'hw-misc-20240222' of https://github.com/philmd/qemu into staging
Misc HW patch queue
- Remove sysbus_add_io (Phil) - Build PPC 4xx PCI host bridges once (Phil) - Display QOM path while d
Merge tag 'hw-misc-20240222' of https://github.com/philmd/qemu into staging
Misc HW patch queue
- Remove sysbus_add_io (Phil) - Build PPC 4xx PCI host bridges once (Phil) - Display QOM path while debugging SMBus targets (Joe) - Simplify x86 PC code (Bernhard) - Remove qemu_[un]register_reset() calls in x86 PC CMOS (Peter) - Fix wiring of ICH9 LPC interrupts (Bernhard) - Split core IDE as device / bus / dma (Thomas) - Prefer QDev API over QOM for devices (Phil) - Fix invalid use of DO_UPCAST() in Leon3 (Thomas)
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* tag 'hw-misc-20240222' of https://github.com/philmd/qemu: (32 commits) hw/sparc/leon3: Fix wrong usage of DO_UPCAST macro hw/ide: Stop exposing internal.h to non-IDE files hw/ide: Remove the include/hw/ide.h legacy file hw/ide: Move IDE bus related definitions to a new header ide-bus.h hw/ide: Move IDE device related definitions to ide-dev.h hw/ide: Move IDE DMA related definitions to a separate header ide-dma.h hw/ide: Split qdev.c into ide-bus.c and ide-dev.c hw/ide: Add the possibility to disable the CompactFlash device in the build hw/acpi/ich9_tco: Include missing 'migration/vmstate.h' header hw/acpi/cpu: Use CPUState typedef hw/acpi: Include missing 'qapi/qapi-types-acpi.h' generated header hw/isa/meson.build: Sort alphabetically hw/i386/pc_q35: Populate interrupt handlers before realizing LPC PCI function hw/i386/pc_sysfw: Use qdev_is_realized() instead of QOM API hw/i386/pc_sysfw: Inline pc_system_flash_create() and remove it hw/i386/pc: Confine system flash handling to pc_sysfw hw/i386/pc: Defer smbios_set_defaults() to machine_done hw/i386/pc: Merge pc_guest_info_init() into pc_machine_initfn() hw/i386/x86: Turn apic_xrupt_override into class attribute hw/i386/pc: Do pc_cmos_init_late() from pc_machine_done() ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
# Conflicts: # include/hw/i386/pc.h
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#
a11f439a |
| 20-Feb-2024 |
Thomas Huth <thuth@redhat.com> |
hw/ide: Stop exposing internal.h to non-IDE files
include/hw/ide/internal.h is currently included by include/hw/ide/pci.h and thus exposed to a lot of files that are not part of the IDE subsystem. S
hw/ide: Stop exposing internal.h to non-IDE files
include/hw/ide/internal.h is currently included by include/hw/ide/pci.h and thus exposed to a lot of files that are not part of the IDE subsystem. Stop including internal.h there and use the appropriate new headers ide-bus.h and ide-dma.h instead.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20240220085505.30255-8-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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9155a938 |
| 28-Nov-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging
Block layer patches
- ide/via: Fix BAR4 value in legacy mode - export/vhost-user-blk: Fix consecutive drains - vmdk: Don't cor
Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging
Block layer patches
- ide/via: Fix BAR4 value in legacy mode - export/vhost-user-blk: Fix consecutive drains - vmdk: Don't corrupt desc file in vmdk_write_cid - iotests: fix default machine type detection
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* tag 'for-upstream' of https://repo.or.cz/qemu/kevin: ide/via: Fix BAR4 value in legacy mode export/vhost-user-blk: Fix consecutive drains vmdk: Don't corrupt desc file in vmdk_write_cid iotests: fix default machine type detection
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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6e081324 |
| 25-Nov-2023 |
BALATON Zoltan <balaton@eik.bme.hu> |
ide/via: Fix BAR4 value in legacy mode
Return default value in legacy mode for BAR4 when unset. This can't be set in reset method because BARs are cleared on reset so we return it instead when BARs
ide/via: Fix BAR4 value in legacy mode
Return default value in legacy mode for BAR4 when unset. This can't be set in reset method because BARs are cleared on reset so we return it instead when BARs are read in legacy mode. This fixes UDMA on amigaone with AmigaOS.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <20231125140135.AF6A075A4C3@zero.eik.bme.hu> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
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d50a1342 |
| 21-Nov-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging
Block layer patches
- Fix graph lock related deadlocks with the stream job - ahci: Fix legacy software reset - ide/via: Fix sw
Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging
Block layer patches
- Fix graph lock related deadlocks with the stream job - ahci: Fix legacy software reset - ide/via: Fix switch between compatibility and native mode
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* tag 'for-upstream' of https://repo.or.cz/qemu/kevin: hw/ide/via: implement legacy/native mode switching ide/via: don't attempt to set default BAR addresses ide/pci: introduce pci_ide_update_mode() function ide/ioport: move ide_portio_list[] and ide_portio_list2[] definitions to IDE core iotests: Test two stream jobs in a single iothread stream: Fix AioContext locking during bdrv_graph_wrlock() block: Fix deadlocks in bdrv_graph_wrunlock() block: Fix bdrv_graph_wrlock() call in blk_remove_bs() hw/ide/ahci: fix legacy software reset
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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debb4911 |
| 16-Nov-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
hw/ide/via: implement legacy/native mode switching
Allow the VIA IDE controller to switch between both legacy and native modes by calling pci_ide_update_mode() to reconfigure the device whenever PCI
hw/ide/via: implement legacy/native mode switching
Allow the VIA IDE controller to switch between both legacy and native modes by calling pci_ide_update_mode() to reconfigure the device whenever PCI_CLASS_PROG is updated.
This patch moves the initial setting of PCI_CLASS_PROG from via_ide_realize() to via_ide_reset(), and removes the direct setting of PCI_INTERRUPT_PIN during PCI bus reset since this is now managed by pci_ide_update_mode(). This ensures that the device configuration is always consistent with respect to the currently selected mode.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231116103355.588580-5-mark.cave-ayland@ilande.co.uk> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
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#
7a9d672b |
| 16-Nov-2023 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
ide/via: don't attempt to set default BAR addresses
The via-ide device currently attempts to set the default BAR addresses to the values shown in the datasheet, but this doesn't work for 2 reasons:
ide/via: don't attempt to set default BAR addresses
The via-ide device currently attempts to set the default BAR addresses to the values shown in the datasheet, but this doesn't work for 2 reasons: firstly BARS 1-4 do not set the bottom 2 bits to PCI_BASE_ADDRESS_SPACE_IO, and secondly the initial PCI bus reset clears the values of all PCI device BARs after the device itself has been reset.
Remove the setting of the default BAR addresses from via_ide_reset() to ensure there is no doubt that these values are never exposed to the guest.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231116103355.588580-4-mark.cave-ayland@ilande.co.uk> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
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#
154e3b61 |
| 11-Jul-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'mips-20230710' of https://github.com/philmd/qemu into staging
MIPS patches queue
- Use clock API & divider for cp0_timer to avoid rounding issue (Jiaxun) - Implement Loongson CSR instruc
Merge tag 'mips-20230710' of https://github.com/philmd/qemu into staging
MIPS patches queue
- Use clock API & divider for cp0_timer to avoid rounding issue (Jiaxun) - Implement Loongson CSR instructions (Jiaxun) - Implement Ingenic MXU ASE v1 rev2 (Siarhei) - Enable GINVx support for I6400 and I6500 cores (Marcin) - Generalize PCI IDE controller models (Bernhard)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmSsg5kACgkQ4+MsLN6t # wN6O4g/9GpirNnG1tizIEksI17PaAotgui2PYzml2nQLyQNmPs3lSfyDEfFpZLC6 # HGxglNjdvCgmIhRH1IuRKuJofp0r84NY+sktXjz2+As3opyjR66gVsSefWeupr7t # avZQQIBBOV3OYLzFkqjDpBflyKXz43MRW3r9ai4Dle/TwiE5GA1iKuQ6Rt55urtT # 045OdtFZTsIwTyg75pSXExAehOn5FQ4aqIODwfJYqvhkkVZ9lgWYSgUOsgDcGqPQ # eytpif6+m350Xme4BgqITMZkeIbyKcCcfU37JBqk/q6/gDDf18zSWpC7MNXea4ZR # so9ffZqms/xcIOfIO3uc4t9AZRHchiVjFHihCUKc0mBTzLy1QhQ4ybdQu3fUywaG # WziEFLrJ/qfWjixRxeDdBZamC2fSxYtcRNST7g+XttiMacvQC6aPFVfLDa+3Xjtt # TmIjx8oGdLB9BMrGMuHsOygfgi98eGbWQ2I5ZhzwBbJ7uFQdeTkMCswcAsVcj8pW # e7/ixw2e+SYFm0q9Z/QiZZ7LFDp/b3u7/ufXCUBX2r1gi7Xi+x60E6dm3Ge3XAsY # qSx9ZOlVNJlIs/ChP0KckHDMeFuCnRmNEvKC039syHWSy6VP8NO7fwwxK+XytyrK # aJMyPS97kVXuqriKZIGsV0KjLOz3neh0OdQTolPv1R5yb9tI6Xc= # =rtlE # -----END PGP SIGNATURE----- # gpg: Signature made Mon 10 Jul 2023 11:18:01 PM BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* tag 'mips-20230710' of https://github.com/philmd/qemu: (44 commits) hw/ide/piix: Move registration of VMStateDescription to DeviceClass hw/ide/pci: Replace some magic numbers by constants hw/ide: Extract bmdma_status_writeb() hw/ide: Extract IDEBus assignment into bmdma_init() hw/isa/vt82c686: Remove via_isa_set_irq() hw/ide/via: Wire up IDE legacy interrupts in host device hw/ide/pci: Expose legacy interrupts as named GPIOs target/mips: enable GINVx support for I6400 and I6500 target/mips/mxu: Add Q8SAD instruction target/mips/mxu: Add S32SFL instruction target/mips/mxu: Add Q8MADL instruction target/mips/mxu: Add Q16SCOP instruction target/mips/mxu: Add Q8MAC Q8MACSU instructions target/mips/mxu: Add S32/D16/Q8- MOVZ/MOVN instructions target/mips/mxu: Add D32/Q16- SLLV/SLRV/SARV instructions target/mips/mxu: Add Q16SLL Q16SLR Q16SAR instructions target/mips/mxu: Add D32SLL D32SLR D32SAR instructions target/mips/mxu: Add D32SARL D32SARW instructions target/mips/mxu: Add S32ALN S32LUI insns target/mips/mxu: Add S32MUL S32MULU S32EXTR S32EXTRV insns ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
5fe24213 |
| 31-May-2023 |
Bernhard Beschow <shentey@gmail.com> |
hw/ide: Extract bmdma_status_writeb()
Every TYPE_PCI_IDE device performs the same not-so-trivial bit manipulation by copy'n'paste code. Extract this into bmdma_status_writeb(), mirroring bmdma_cmd_w
hw/ide: Extract bmdma_status_writeb()
Every TYPE_PCI_IDE device performs the same not-so-trivial bit manipulation by copy'n'paste code. Extract this into bmdma_status_writeb(), mirroring bmdma_cmd_writeb().
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <20230531211043.41724-6-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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#
bf0576ed |
| 31-May-2023 |
Bernhard Beschow <shentey@gmail.com> |
hw/ide: Extract IDEBus assignment into bmdma_init()
Every invocation of bmdma_init() is followed by `d->bmdma[i].bus = &d->bus[i]`. Resolve this redundancy by extracting it into bmdma_init().
Signe
hw/ide: Extract IDEBus assignment into bmdma_init()
Every invocation of bmdma_init() is followed by `d->bmdma[i].bus = &d->bus[i]`. Resolve this redundancy by extracting it into bmdma_init().
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20230531211043.41724-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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#
68eadfa2 |
| 31-May-2023 |
Bernhard Beschow <shentey@gmail.com> |
hw/ide/via: Wire up IDE legacy interrupts in host device
Resolves circular depencency between IDE function and south bridge.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Mark Ca
hw/ide/via: Wire up IDE legacy interrupts in host device
Resolves circular depencency between IDE function and south bridge.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20230531211043.41724-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Revision tags: v8.0.0 |
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#
526947e4 |
| 01-Mar-2023 |
Paolo Bonzini <pbonzini@redhat.com> |
Merge branch 'xenfv-kvm-15' of git://git.infradead.org/users/dwmw2/qemu into HEAD
This adds support for emulating Xen under Linux/KVM, based on kernel patches which have been present since Linux v5.
Merge branch 'xenfv-kvm-15' of git://git.infradead.org/users/dwmw2/qemu into HEAD
This adds support for emulating Xen under Linux/KVM, based on kernel patches which have been present since Linux v5.12. As with the kernel support, it's derived from work started by João Martins of Oracle in 2018.
This series just adds the basic platform support — CPUID, hypercalls, event channels, a stub of XenStore.
A full single-tenant internal implementation of XenStore, and patches to make QEMU's Xen PV drivers work with this Xen emulation, are waiting in the wings to be submitted in a follow-on patch series.
As noted in the documentation, it's enabled by setting the xen-version property on the KVM accelerator, e.g.:
qemu-system-x86_64 -serial mon:stdio -M q35 -display none -m 1G -smp 2 \ -accel kvm,xen-version=0x4000e,kernel-irqchip=split \ -kernel vmlinuz-6.0.7-301.fc37.x86_64 \ -append "console=ttyS0 root=/dev/sda1" \ -drive file=/var/lib/libvirt/images/fedora28.qcow2,if=none,id=disk \ -device ahci,id=ahci -device ide-hd,drive=disk,bus=ahci.0
Even before this was merged, we've already been using it to find and fix bugs in the Linux kernel Xen guest support:
https://lore.kernel.org/all/4bffa69a949bfdc92c4a18e5a1c3cbb3b94a0d32.camel@infradead.org/ https://lore.kernel.org/all/871qnunycr.ffs@tglx/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
62763403 |
| 28-Feb-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'buildsys-qom-qdev-ui-20230227' of https://github.com/philmd/qemu into staging
- buildsys - Various header cleaned up (removing pointless headers) - Mark various files/code user/system
Merge tag 'buildsys-qom-qdev-ui-20230227' of https://github.com/philmd/qemu into staging
- buildsys - Various header cleaned up (removing pointless headers) - Mark various files/code user/system specific - Make various objects target-independent - Remove tswapN() calls from dump.o - Suggest g_assert_not_reached() instead of assert(0)
- qdev / qom - Replace various container_of() by QOM cast macros - Declare some QOM macros using OBJECT_DECLARE_TYPE() - Embed OHCI QOM child in SM501 chipset
- hw (ISA & IDE) - add some documentation, improve function names - un-inline, open-code few functions - have ISA API accessing IRQ/DMA prefer ISABus over ISADevice - Demote IDE subsystem maintenance to "Odd Fixes"
- ui: Improve Ctrl+Alt hint on Darwin Cocoa
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* tag 'buildsys-qom-qdev-ui-20230227' of https://github.com/philmd/qemu: (125 commits) ui/cocoa: user friendly characters for release mouse dump: Add create_win_dump() stub for non-x86 targets dump: Simplify compiling win_dump.o by introducing win_dump_available() dump: Clean included headers dump: Replace TARGET_PAGE_SIZE -> qemu_target_page_size() dump: Replace tswapN() -> cpu_to_dumpN() hw/ide/pci: Add PCIIDEState::isa_irq[] hw/ide/via: Replace magic 2 value by ARRAY_SIZE / MAX_IDE_DEVS hw/ide/piix: Refactor pci_piix_init_ports as pci_piix_init_bus per bus hw/ide/piix: Pass Error* to pci_piix_init_ports() for better error msg hw/ide/piix: Remove unused includes hw/ide/pci: Unexport bmdma_active_if() hw/ide/ioport: Remove unnecessary includes hw/ide: Declare ide_get_[geometry/bios_chs_trans] in 'hw/ide/internal.h' hw/ide: Rename idebus_active_if() -> ide_bus_active_if() hw/ide: Rename ide_init2() -> ide_bus_init_output_irq() hw/ide: Rename ide_exec_cmd() -> ide_bus_exec_cmd() hw/ide: Rename ide_register_restart_cb -> ide_bus_register_restart_cb hw/ide: Rename ide_create_drive() -> ide_bus_create_drive() hw/ide: Rename ide_set_irq() -> ide_bus_set_irq() ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v7.2.0, v7.0.0, v6.2.0, v6.1.0 |
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#
d39d792e |
| 24-Mar-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
hw/ide/via: Replace magic 2 value by ARRAY_SIZE / MAX_IDE_DEVS
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: John Snow <jsnow@redhat.com> Message-Id: <20210511041848.2743312-5-f4
hw/ide/via: Replace magic 2 value by ARRAY_SIZE / MAX_IDE_DEVS
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: John Snow <jsnow@redhat.com> Message-Id: <20210511041848.2743312-5-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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#
c9519630 |
| 09-Feb-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/ide: Rename ide_init2() -> ide_bus_init_output_irq()
ide_init2() initializes a IDEBus, and set its output IRQ. To emphasize this, rename it as ide_bus_init_output_irq().
Mechanical change using:
hw/ide: Rename ide_init2() -> ide_bus_init_output_irq()
ide_init2() initializes a IDEBus, and set its output IRQ. To emphasize this, rename it as ide_bus_init_output_irq().
Mechanical change using:
$ sed -i -e 's/ide_init2/ide_bus_init_output_irq/g' \ $(git grep -l ide_init2)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230215112712.23110-15-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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#
e29b1246 |
| 14-Feb-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/ide: Rename ide_register_restart_cb -> ide_bus_register_restart_cb
ide_register_restart_cb() operates on a IDEBus; rename it as ide_bus_register_restart_cb() to emphasize its first argument is a
hw/ide: Rename ide_register_restart_cb -> ide_bus_register_restart_cb
ide_register_restart_cb() operates on a IDEBus; rename it as ide_bus_register_restart_cb() to emphasize its first argument is a IDEBus.
Mechanical change using:
$ sed -i -e 's/ide_register_restart_cb/ide_bus_register_restart_cb/g' \ $(git grep -l ide_register_restart_cb)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230215112712.23110-13-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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#
95539e54 |
| 31-Oct-2022 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'mips-20221030' of https://github.com/philmd/qemu into staging
MIPS patches queue
- Convert nanoMIPS disassembler from C++ to C (Milica Lazarevic) - Consolidate VT82xx/PIIX south bridges
Merge tag 'mips-20221030' of https://github.com/philmd/qemu into staging
MIPS patches queue
- Convert nanoMIPS disassembler from C++ to C (Milica Lazarevic) - Consolidate VT82xx/PIIX south bridges (Bernhard Beschow) - Remove unused MAX_IDE_BUS definition (Zoltan Balaton) - Fix branch displacement for BEQZC/BNEZC (David Daney) - Don't set link_up for Boston's xilinx-pcie (Jiaxun Yang) - Use bootloader API to set BAR registers in Malta (Jiaxun Yang)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmNfpO8ACgkQ4+MsLN6t # wN76og/+LMuTYYRkhETZyw3v5sTAexU0kmXyf/xMZ8PLi37Al2ia3qxo70qTh34m # P2bbpCC46xzLCVY4s/84pb1lgpANNJNMIHwUni9HL4cTPPR7muKqpUOTEVh6Ghcq # Zb2+e7yTKpIgvwDcIQEzU74gDyCcJoAo4LcLRVtuXer6olQsYsmlUqr3gg+Oy5kI # zuJxOxZRoAP4H/ausGPg8oves28S3fVsw9J1x5p7vlzGt1Kx/i1XilSuGXI3H/79 # 0tgofUYkyFQRjxPLlE9OeYVwAo8gLFWwnkw/AOjHSOgGUsj/7yJXORm0ng/vQOqS # j5036BHxmhYyEVL8aJAc7fvb4/m6walsXJItThqJ/JXphdAXi17fCCn0Wf9jqGrr # io4Gm5qZI1bO/1orTaQywZTCjSi3pcuM0NxLZ/Qf7CVoXvNcddpDrSlyD3ILz9cq # XqyaKQJ3kLvWTpJ6kZknl3s4kGnnMZw+2lZlusrSjrI4QnXmgoGLiSTRPxny1qQ0 # NaqAnys0Skn0fJ002na3lJgo4mzxzN+zEzMHsbB+RZv9JB2lIwQBm+zXDFHhb9Zv # H0UFowi5lhJUjIZ5+bl4wtT2XoM4HM1YxU66a0t4SktMnKvBPCVBLUSj74Qdl1K8 # 7e2SvWB2ovNgscwek/srk1TT+yf7a6CmAraATSm0Fm/kxT5xa/Y= # =EqI/ # -----END PGP SIGNATURE----- # gpg: Signature made Mon 31 Oct 2022 06:35:27 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'mips-20221030' of https://github.com/philmd/qemu: (55 commits) hw/mips/malta: Use bootloader helper to set BAR registers hw/mips: Use bl_gen_kernel_jump to generate bootloaders hw/mips/bootloader: Allow bl_gen_jump_kernel to optionally set register hw/mips/boston: Don't set link_up for xilinx-pcie hw/isa/piix4: Move pci_ide_create_devs() call to board code hw/isa/piix4: Add missing initialization hw/isa/Kconfig: Fix dependencies of piix4 southbridge hw/mips/malta: Reuse dev variable hw/isa/piix3: Remove unused include hw/ide/piix: Introduce TYPE_ macros for PIIX IDE controllers hw/isa/piix4: Rename wrongly named method hw/isa/piix3: Prefer pci_address_space() over get_system_memory() hw/isa/piix3: Modernize reset handling hw/isa/piix3: Add size constraints to rcr_ops hw/isa/piix3: Remove extra ';' outside of functions hw/i386/pc: Create DMA controllers in south bridges disas/mips: Fix branch displacement for BEQZC and BNEZC disas/nanomips: Rename nanomips.cpp to nanomips.c disas/nanomips: Remove argument passing by ref disas/nanomips: Replace Cpp enums for C enums ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
4b8fd066 |
| 01-Sep-2022 |
Bernhard Beschow <shentey@gmail.com> |
hw/isa/vt82c686: Introduce TYPE_VIA_IDE define
Establishes consistency with other (VIA) devices.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat
hw/isa/vt82c686: Introduce TYPE_VIA_IDE define
Establishes consistency with other (VIA) devices.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220901114127.53914-6-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
9c050b66 |
| 18-Oct-2021 |
Richard Henderson <richard.henderson@linaro.org> |
Merge remote-tracking branch 'remotes/philmd/tags/mips-20211018' into staging
MIPS patches queue
Hardware emulation: - Generate FDT blob for Boston machine (Jiaxun) - VIA chipset cleanups (Zoltan)
Merge remote-tracking branch 'remotes/philmd/tags/mips-20211018' into staging
MIPS patches queue
Hardware emulation: - Generate FDT blob for Boston machine (Jiaxun) - VIA chipset cleanups (Zoltan)
TCG: - Use tcg_constant() in Compact branch and MSA opcodes - Restrict nanoMIPS DSP MULT[U] opcode accumulator to Rel6 - Fix DEXTRV_S.H DSP opcode - Remove unused TCG temporary for some DSP opcodes
# gpg: Signature made Sun 17 Oct 2021 03:50:57 PM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* remotes/philmd/tags/mips-20211018: via-ide: Avoid using isa_get_irq() vt82c686: Add a method to VIA_ISA to raise ISA interrupts vt82c686: Move common code to via_isa_realize via-ide: Set user_creatable to false target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn() target/mips: Fix DEXTRV_S.H DSP opcode target/mips: Use tcg_constant_tl() in gen_compute_compact_branch() target/mips: Use explicit extract32() calls in gen_msa_i5() target/mips: Use tcg_constant_i32() in gen_msa_3rf() target/mips: Use tcg_constant_i32() in gen_msa_2r() target/mips: Use tcg_constant_i32() in gen_msa_2rf() target/mips: Use tcg_constant_i32() in gen_msa_elm_df() target/mips: Remove unused register from MSA 2R/2RF instruction format hw/mips/boston: Add FDT generator hw/mips/boston: Allow loading elf kernel and dtb hw/mips/boston: Massage memory map information target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
2792cf20 |
| 14-Oct-2021 |
BALATON Zoltan <balaton@eik.bme.hu> |
via-ide: Avoid using isa_get_irq()
Use via_isa_set_irq() which better encapsulates irq handling in the vt82xx model and avoids using isa_get_irq() that has a comment saying it should not be used.
S
via-ide: Avoid using isa_get_irq()
Use via_isa_set_irq() which better encapsulates irq handling in the vt82xx model and avoids using isa_get_irq() that has a comment saying it should not be used.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <26cb1848c9fc0360df7a57c2c9ba5e03c4a692b5.1634259980.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
7c8eae45 |
| 15-Oct-2021 |
BALATON Zoltan <balaton@eik.bme.hu> |
via-ide: Set user_creatable to false
This model only works as a function of the via superio chip not as a standalone PCI device.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Phil
via-ide: Set user_creatable to false
This model only works as a function of the via superio chip not as a standalone PCI device.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211015092159.3E863748F57@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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