| /openbmc/linux/drivers/pci/controller/ |
| H A D | pcie-iproc-msi.c | 62 struct iproc_msi *msi; member
128 static inline u32 iproc_msi_read_reg(struct iproc_msi *msi, in iproc_msi_read_reg() argument
132 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_read_reg()
134 return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_read_reg()
137 static inline void iproc_msi_write_reg(struct iproc_msi *msi, in iproc_msi_write_reg() argument
141 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_write_reg()
143 writel_relaxed(val, pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_write_reg()
146 static inline u32 hwirq_to_group(struct iproc_msi *msi, unsigned long hwirq) in hwirq_to_group() argument
148 return (hwirq % msi->nr_irqs); in hwirq_to_group()
151 static inline unsigned int iproc_msi_addr_offset(struct iproc_msi *msi, in iproc_msi_addr_offset() argument
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| H A D | pcie-altera-msi.c | 41 static inline void msi_writel(struct altera_msi *msi, const u32 value, in msi_writel() argument
44 writel_relaxed(value, msi->csr_base + reg); in msi_writel()
47 static inline u32 msi_readl(struct altera_msi *msi, const u32 reg) in msi_readl() argument
49 return readl_relaxed(msi->csr_base + reg); in msi_readl()
55 struct altera_msi *msi; in altera_msi_isr() local
61 msi = irq_desc_get_handler_data(desc); in altera_msi_isr()
63 while ((status = msi_readl(msi, MSI_STATUS)) != 0) { in altera_msi_isr()
64 for_each_set_bit(bit, &status, msi->num_of_vectors) { in altera_msi_isr()
66 readl_relaxed(msi->vector_base + (bit * sizeof(u32))); in altera_msi_isr()
68 ret = generic_handle_domain_irq(msi->inner_domain, bit); in altera_msi_isr()
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| H A D | pci-xgene-msi.c | 27 struct xgene_msi *msi; member
94 static u32 xgene_msi_ir_read(struct xgene_msi *msi, in xgene_msi_ir_read() argument
97 return readl_relaxed(msi->msi_regs + MSI_IR0 + in xgene_msi_ir_read()
102 static u32 xgene_msi_int_read(struct xgene_msi *msi, u32 msi_grp) in xgene_msi_int_read() argument
104 return readl_relaxed(msi->msi_regs + MSI_INT0 + (msi_grp << 16)); in xgene_msi_int_read()
143 struct xgene_msi *msi = irq_data_get_irq_chip_data(data); in xgene_compose_msi_msg() local
146 u64 target_addr = msi->msi_addr + (((8 * group) + reg_set) << 16); in xgene_compose_msi_msg()
197 struct xgene_msi *msi = domain->host_data; in xgene_irq_domain_alloc() local
200 mutex_lock(&msi->bitmap_lock); in xgene_irq_domain_alloc()
202 msi_irq = bitmap_find_next_zero_area(msi->bitmap, NR_MSI_VEC, 0, in xgene_irq_domain_alloc()
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| H A D | pcie-brcmstb.c | 257 struct brcm_msi *msi; member
451 struct brcm_msi *msi; in brcm_pcie_msi_isr() local
456 msi = irq_desc_get_handler_data(desc); in brcm_pcie_msi_isr()
457 dev = msi->dev; in brcm_pcie_msi_isr()
459 status = readl(msi->intr_base + MSI_INT_STATUS); in brcm_pcie_msi_isr()
460 status >>= msi->legacy_shift; in brcm_pcie_msi_isr()
462 for_each_set_bit(bit, &status, msi->nr) { in brcm_pcie_msi_isr()
464 ret = generic_handle_domain_irq(msi->inner_domain, bit); in brcm_pcie_msi_isr()
474 struct brcm_msi *msi = irq_data_get_irq_chip_data(data); in brcm_msi_compose_msi_msg() local
476 msg->address_lo = lower_32_bits(msi->target_addr); in brcm_msi_compose_msi_msg()
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| H A D | pcie-rcar-host.c | 49 struct rcar_msi msi; member
93 static struct rcar_pcie_host *msi_to_host(struct rcar_msi *msi) in msi_to_host() argument
95 return container_of(msi, struct rcar_pcie_host, msi); in msi_to_host()
571 struct rcar_msi *msi = &host->msi; in rcar_pcie_msi_irq() local
585 ret = generic_handle_domain_irq(msi->domain->parent, index); in rcar_pcie_msi_irq()
625 struct rcar_msi *msi = irq_data_get_irq_chip_data(d); in rcar_msi_irq_ack() local
626 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_ack()
634 struct rcar_msi *msi = irq_data_get_irq_chip_data(d); in rcar_msi_irq_mask() local
635 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_mask()
639 spin_lock_irqsave(&msi->mask_lock, flags); in rcar_msi_irq_mask()
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| H A D | pcie-xilinx-nwl.c | 170 struct nwl_msi msi; member
337 struct nwl_msi *msi = &pcie->msi; in nwl_pcie_handle_msi_irq() local
344 generic_handle_domain_irq(msi->dev_domain, bit); in nwl_pcie_handle_msi_irq()
462 struct nwl_msi *msi = &pcie->msi; in nwl_irq_domain_alloc() local
466 mutex_lock(&msi->lock); in nwl_irq_domain_alloc()
467 bit = bitmap_find_free_region(msi->bitmap, INT_PCI_MSI_NR, in nwl_irq_domain_alloc()
470 mutex_unlock(&msi->lock); in nwl_irq_domain_alloc()
479 mutex_unlock(&msi->lock); in nwl_irq_domain_alloc()
488 struct nwl_msi *msi = &pcie->msi; in nwl_irq_domain_free() local
490 mutex_lock(&msi->lock); in nwl_irq_domain_free()
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| /openbmc/qemu/hw/pci-host/ |
| H A D | pnv_phb3_msi.c | 65 static void phb3_msi_set_p(Phb3MsiState *msi, int srcno, uint8_t gen) in phb3_msi_set_p() argument
70 ive_addr = phb3_msi_ive_addr(msi->phb, srcno); in phb3_msi_set_p()
82 static void phb3_msi_set_q(Phb3MsiState *msi, int srcno) in phb3_msi_set_q() argument
87 ive_addr = phb3_msi_ive_addr(msi->phb, srcno); in phb3_msi_set_q()
99 static void phb3_msi_try_send(Phb3MsiState *msi, int srcno, bool force) in phb3_msi_try_send() argument
101 ICSState *ics = ICS(msi); in phb3_msi_try_send()
105 if (!phb3_msi_read_ive(msi->phb, srcno, &ive)) { in phb3_msi_try_send()
128 phb3_msi_set_q(msi, srcno); in phb3_msi_try_send()
131 phb3_msi_set_p(msi, srcno, gen); in phb3_msi_try_send()
137 phb3_msi_set_q(msi, srcno); in phb3_msi_try_send()
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| H A D | designware.c | 90 root->msi.intr[0].status |= BIT(val) & root->msi.intr[0].enable; in designware_pcie_root_msi_write()
92 if (root->msi.intr[0].status & ~root->msi.intr[0].mask) { in designware_pcie_root_msi_write()
110 MemoryRegion *mem = &root->msi.iomem; in designware_pcie_root_update_msi_mapping()
111 const uint64_t base = root->msi.base; in designware_pcie_root_update_msi_mapping()
112 const bool enable = root->msi.intr[0].enable; in designware_pcie_root_update_msi_mapping()
156 val = root->msi.base; in designware_pcie_root_config_read()
160 val = root->msi.base >> 32; in designware_pcie_root_config_read()
164 val = root->msi.intr[0].enable; in designware_pcie_root_config_read()
168 val = root->msi.intr[0].mask; in designware_pcie_root_config_read()
172 val = root->msi.intr[0].status; in designware_pcie_root_config_read()
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| /openbmc/linux/Documentation/devicetree/bindings/pci/ |
| H A D | pci-msi.txt | 23 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
32 - msi-map: Maps a Requester ID to an MSI controller and associated
33 msi-specifier data. The property is an arbitrary number of tuples of
34 (rid-base,msi-controller,msi-base,length), where:
38 * msi-controller is a single phandle to an MSI controller
40 * msi-base is an msi-specifier describing the msi-specifier produced for the
47 the listed msi-controller, with the msi-specifier (r - rid-base + msi-base).
49 - msi-map-mask: A mask to be applied to each Requester ID prior to being mapped
50 to an msi-specifier per the msi-map property.
52 - msi-parent: Describes the MSI parent of the root complex itself. Where
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| /openbmc/linux/arch/arm64/kvm/vgic/ |
| H A D | vgic-irqfd.c | 55 e->msi.address_lo = ue->u.msi.address_lo; in kvm_set_routing_entry()
56 e->msi.address_hi = ue->u.msi.address_hi; in kvm_set_routing_entry()
57 e->msi.data = ue->u.msi.data; in kvm_set_routing_entry()
58 e->msi.flags = ue->flags; in kvm_set_routing_entry()
59 e->msi.devid = ue->u.msi.devid; in kvm_set_routing_entry()
70 struct kvm_msi *msi) in kvm_populate_msi() argument
72 msi->address_lo = e->msi.address_lo; in kvm_populate_msi()
73 msi->address_hi = e->msi.address_hi; in kvm_populate_msi()
74 msi->data = e->msi.data; in kvm_populate_msi()
75 msi->flags = e->msi.flags; in kvm_populate_msi()
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| /openbmc/linux/arch/powerpc/sysdev/ |
| H A D | fsl_msi.c | 37 #define msi_hwirq(msi, msir_index, intr_index) \ argument
38 ((msir_index) << (msi)->srs_shift | \
39 ((intr_index) << (msi)->ibs_shift))
323 struct fsl_msi *msi = platform_get_drvdata(ofdev); in fsl_of_msi_remove() local
326 if (msi->list.prev != NULL) in fsl_of_msi_remove()
327 list_del(&msi->list); in fsl_of_msi_remove()
329 if (msi->cascade_array[i]) { in fsl_of_msi_remove()
330 virq = msi->cascade_array[i]->virq; in fsl_of_msi_remove()
334 free_irq(virq, msi->cascade_array[i]); in fsl_of_msi_remove()
335 kfree(msi->cascade_array[i]); in fsl_of_msi_remove()
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| /openbmc/linux/arch/riscv/kvm/ |
| H A D | vm.c | 71 struct kvm_msi msi; in kvm_set_msi() local
76 msi.address_lo = e->msi.address_lo; in kvm_set_msi()
77 msi.address_hi = e->msi.address_hi; in kvm_set_msi()
78 msi.data = e->msi.data; in kvm_set_msi()
79 msi.flags = e->msi.flags; in kvm_set_msi()
80 msi.devid = e->msi.devid; in kvm_set_msi()
82 return kvm_riscv_aia_inject_msi(kvm, &msi); in kvm_set_msi()
135 e->msi.address_lo = ue->u.msi.address_lo; in kvm_set_routing_entry()
136 e->msi.address_hi = ue->u.msi.address_hi; in kvm_set_routing_entry()
137 e->msi.data = ue->u.msi.data; in kvm_set_routing_entry()
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| /openbmc/linux/drivers/ntb/ |
| H A D | msi.c | 45 ntb->msi = devm_kzalloc(&ntb->dev, struct_size(ntb->msi, peer_mws, peers), in ntb_msi_init()
47 if (!ntb->msi) in ntb_msi_init()
50 ntb->msi->desc_changed = desc_changed; in ntb_msi_init()
60 ntb->msi->peer_mws[i] = devm_ioremap(&ntb->dev, mw_phys_addr, in ntb_msi_init()
62 if (!ntb->msi->peer_mws[i]) { in ntb_msi_init()
72 if (ntb->msi->peer_mws[i]) in ntb_msi_init()
73 devm_iounmap(&ntb->dev, ntb->msi->peer_mws[i]); in ntb_msi_init()
75 devm_kfree(&ntb->dev, ntb->msi); in ntb_msi_init()
76 ntb->msi = NULL; in ntb_msi_init()
106 if (!ntb->msi) in ntb_msi_setup_mws()
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| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | fsl,ls-scfg-msi.txt | 5 - compatible: should be "fsl,<soc-name>-msi" to identify
7 "fsl,ls1021a-msi"
8 "fsl,ls1043a-msi"
9 "fsl,ls1046a-msi"
10 "fsl,ls1043a-v1.1-msi"
11 "fsl,ls1012a-msi"
12 - msi-controller: indicates that this is a PCIe MSI controller node
20 Each PCIe node needs to have property msi-parent that points to
25 msi1: msi-controller@1571000 {
26 compatible = "fsl,ls1043a-msi";
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| H A D | msi.txt | 40 - msi-controller: Identifies the node as an MSI controller.
45 - #msi-cells: The number of cells in an msi-specifier, required if not zero.
50 The meaning of the msi-specifier is defined by the device tree binding of
64 - msi-parent: A list of phandle + msi-specifier pairs, one for each MSI
68 MSI controllers listed in the msi-parent property.
73 When #msi-cells is non-zero, busses with an msi-parent will require
85 msi_a: msi-controller@a {
88 msi-controller;
89 /* No sideband data, so #msi-cells omitted */
92 msi_b: msi-controller@b {
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| /openbmc/linux/drivers/pci/controller/mobiveil/ |
| H A D | pcie-mobiveil-host.c | 88 struct mobiveil_msi *msi = &rp->msi; in mobiveil_pcie_isr() local
154 generic_handle_domain_irq(msi->dev_domain, msi_data); in mobiveil_pcie_isr()
202 struct mobiveil_msi *msi = &pcie->rp.msi; in mobiveil_pcie_enable_msi() local
204 msi->num_of_vectors = PCI_NUM_MSI; in mobiveil_pcie_enable_msi()
205 msi->msi_pages_phys = (phys_addr_t)msg_addr; in mobiveil_pcie_enable_msi()
398 struct mobiveil_msi *msi = &pcie->rp.msi; in mobiveil_irq_msi_domain_alloc() local
402 mutex_lock(&msi->lock); in mobiveil_irq_msi_domain_alloc()
404 bit = find_first_zero_bit(msi->msi_irq_in_use, msi->num_of_vectors); in mobiveil_irq_msi_domain_alloc()
405 if (bit >= msi->num_of_vectors) { in mobiveil_irq_msi_domain_alloc()
406 mutex_unlock(&msi->lock); in mobiveil_irq_msi_domain_alloc()
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| /openbmc/qemu/hw/xen/ |
| H A D | xen_pt_msi.c | 69 static inline uint64_t msi_addr64(XenPTMSI *msi) in msi_addr64() argument
71 return (uint64_t)msi->addr_hi << 32 | msi->addr_lo; in msi_addr64()
240 if (!s->msi) { in xen_pt_msi_set_enable()
244 return msi_msix_enable(s, s->msi->ctrl_offset, PCI_MSI_FLAGS_ENABLE, in xen_pt_msi_set_enable()
253 XenPTMSI *msi = s->msi; in xen_pt_msi_setup() local
255 if (msi->initialized) { in xen_pt_msi_setup()
261 rc = msi_msix_setup(s, msi_addr64(msi), msi->data, &pirq, false, 0, true); in xen_pt_msi_setup()
271 msi->pirq = pirq; in xen_pt_msi_setup()
279 XenPTMSI *msi = s->msi; in xen_pt_msi_update() local
282 return msi_msix_update(s, msi_addr64(msi), msi->data, msi->pirq, in xen_pt_msi_update()
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pci/ |
| H A D | base.c | 35 if (pci && pci->msi) in nvkm_pci_msi_rearm()
131 if (pci->msi) in nvkm_pci_init()
144 if (pci->msi) in nvkm_pci_dtor()
187 pci->msi = true; in nvkm_pci_new_()
193 pci->msi = false; in nvkm_pci_new_()
196 pci->msi = nvkm_boolopt(device->cfgopt, "NvMSI", pci->msi); in nvkm_pci_new_()
197 if (pci->msi && func->msi_rearm) { in nvkm_pci_new_()
198 pci->msi = pci_enable_msi(pci->pdev) == 0; in nvkm_pci_new_()
199 if (pci->msi) in nvkm_pci_new_()
202 pci->msi = false; in nvkm_pci_new_()
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| /openbmc/linux/drivers/virt/acrn/ |
| H A D | vm.c | 106 struct acrn_msi_entry *msi; in acrn_msi_inject() local
110 msi = kzalloc(sizeof(*msi), GFP_ATOMIC); in acrn_msi_inject()
111 if (!msi) in acrn_msi_inject()
118 msi->msi_addr = msi_addr; in acrn_msi_inject()
119 msi->msi_data = msi_data; in acrn_msi_inject()
120 ret = hcall_inject_msi(vm->vmid, virt_to_phys(msi)); in acrn_msi_inject()
124 kfree(msi); in acrn_msi_inject()
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| /openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | msi-pic.txt | 5 The first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
6 etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" or
7 "fsl,mpic-msi-v4.3" depending on the parent type and version. If mpic
9 provided to access these 16 registers, and compatible "fsl,mpic-msi-v4.3"
21 be set as edge sensitive. If msi-available-ranges is present, only
25 - msi-available-ranges: use <start count> style section to define which
26 msi interrupt can be used in the 256 msi interrupts. This property is
33 - msi-address-64: 64-bit PCI address of the MSIIR register. The MSIIR register
43 msi@41600 {
44 compatible = "fsl,mpc8610-msi", "fsl,mpic-msi";
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| /openbmc/linux/arch/mips/boot/dts/loongson/ |
| H A D | loongson64c_4core_ls7a.dts | 28 msi: msi-controller@2ff00000 { label
29 compatible = "loongson,pch-msi-1.0";
32 msi-controller;
33 loongson,msi-base-vec = <64>;
34 loongson,msi-num-vecs = <64>;
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| H A D | loongson64g_4core_ls7a.dts | 32 msi: msi-controller@2ff00000 { label
33 compatible = "loongson,pch-msi-1.0";
37 msi-controller;
38 loongson,msi-base-vec = <64>;
39 loongson,msi-num-vecs = <192>;
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| /openbmc/linux/virt/kvm/ |
| H A D | irqchip.c | 48 int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi) in kvm_send_userspace_msi() argument
52 if (!kvm_arch_irqchip_in_kernel(kvm) || (msi->flags & ~KVM_MSI_VALID_DEVID)) in kvm_send_userspace_msi()
55 route.msi.address_lo = msi->address_lo; in kvm_send_userspace_msi()
56 route.msi.address_hi = msi->address_hi; in kvm_send_userspace_msi()
57 route.msi.data = msi->data; in kvm_send_userspace_msi()
58 route.msi.flags = msi->flags; in kvm_send_userspace_msi()
59 route.msi.devid = msi->devid; in kvm_send_userspace_msi()
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| /openbmc/linux/drivers/media/pci/ddbridge/ |
| H A D | ddbridge-main.c | 37 static int msi = 1; variable
39 static int msi; variable
41 module_param(msi, int, 0444);
43 MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable, 1-enable (default)");
45 MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable (default), 1-enable");
62 if (dev->msi) in ddb_msi_exit()
70 if (dev->msi == 2) in ddb_irq_exit()
98 if (msi && pci_msi_enabled()) { in ddb_irq_msi()
102 dev->msi = stat; in ddb_irq_msi()
104 dev->msi); in ddb_irq_msi()
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| /openbmc/linux/tools/pci/ |
| H A D | pcitest.sh | 23 msi=1
25 while [ $msi -lt 33 ]
27 pcitest -m $msi
28 msi=`expr $msi + 1`
|