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Searched refs:hcr (Results 1 – 25 of 26) sorted by relevance

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/openbmc/linux/arch/arm64/include/asm/
H A Dhardirq.h22 u64 hcr; member
58 ___ctx->hcr = ___hcr; \
70 ___hcr = ___ctx->hcr; \
/openbmc/linux/drivers/usb/serial/
H A Dark3116.c67 __u32 hcr; /* handshake control register (0x8) member
145 priv->hcr = 0; in ark3116_port_probe()
200 __u8 lcr, hcr, eval; in ark3116_set_termios() local
215 hcr = (cflag & CRTSCTS) ? 0x03 : 0x00; in ark3116_set_termios()
246 __func__, hcr, lcr, quot); in ark3116_set_termios()
249 if (priv->hcr != hcr) { in ark3116_set_termios()
250 priv->hcr = hcr; in ark3116_set_termios()
251 ark3116_write_reg(serial, 0x8, hcr); in ark3116_set_termios()
/openbmc/qemu/target/arm/tcg/
H A Dhflags.c210 uint64_t hcr = arm_hcr_el2_eff(env); in rebuild_hflags_a64() local
303 if ((hcr & (HCR_NV | HCR_NV1)) != (HCR_NV | HCR_NV1)) { in rebuild_hflags_a64()
340 if (el == 1 && (hcr & HCR_NV)) { in rebuild_hflags_a64()
343 if (hcr & HCR_NV1) { in rebuild_hflags_a64()
346 if (hcr & HCR_NV2) { in rebuild_hflags_a64()
348 if (hcr & HCR_E2H) { in rebuild_hflags_a64()
H A Dop_helper.c1220 uint64_t hcr = arm_hcr_el2_eff(env); in HELPER() local
1221 bool enabled = !(hcr & HCR_TGE) && (hcr & HCR_AMO); in HELPER()
1222 bool pending = enabled && (hcr & HCR_VSE); in HELPER()
H A Dpauth_helper.c467 uint64_t hcr = arm_hcr_el2_eff(env); in pauth_check_trap() local
468 bool trap = !(hcr & HCR_API); in pauth_check_trap()
471 trap &= (hcr & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE); in pauth_check_trap()
/openbmc/qemu/target/arm/
H A Dptw.c506 static bool S2_attrs_are_device(uint64_t hcr, uint8_t attrs) in S2_attrs_are_device() argument
517 if (hcr & HCR_FWB) { in S2_attrs_are_device()
621 uint64_t hcr = arm_hcr_el2_eff_secstate(env, ptw->in_space); in S1_ptw_translate() local
623 if ((hcr & HCR_PTW) && S2_attrs_are_device(hcr, pte_attrs)) { in S1_ptw_translate()
1662 uint64_t hcr = arm_hcr_el2_eff_secstate(env, ptw->in_space); in nv_nv1_enabled() local
1663 return (hcr & (HCR_NV | HCR_NV1)) == (HCR_NV | HCR_NV1); in nv_nv1_enabled()
3004 static uint8_t convert_stage2_attrs(uint64_t hcr, uint8_t s2attrs) in convert_stage2_attrs() argument
3011 if (hcr & HCR_CD) { /* cache disabled */ in convert_stage2_attrs()
3057 static uint8_t combined_attrs_nofwb(uint64_t hcr, in combined_attrs_nofwb() argument
3063 s2_mair_attrs = convert_stage2_attrs(hcr, s2.attrs); in combined_attrs_nofwb()
[all …]
H A Dhelper.c2497 uint64_t hcr; in gt_cntfrq_access() local
2502 hcr = arm_hcr_el2_eff(env); in gt_cntfrq_access()
2503 if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) { in gt_cntfrq_access()
2536 uint64_t hcr = arm_hcr_el2_eff(env); in gt_counter_access() local
2541 if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) { in gt_counter_access()
2554 (hcr & HCR_E2H in gt_counter_access()
2574 uint64_t hcr = arm_hcr_el2_eff(env); in gt_timer_access() local
2578 if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) { in gt_timer_access()
2595 if (hcr & HCR_E2H) { in gt_timer_access()
2808 uint64_t hcr; in gt_virt_cnt_offset() local
[all …]
H A Dcpu.c786 bool hcr, scr; in arm_excp_unmasked() local
797 hcr = hcr_el2 & HCR_FMO; in arm_excp_unmasked()
806 scr = scr && !((env->cp15.scr_el3 & SCR_FW) && !hcr); in arm_excp_unmasked()
816 hcr = hcr_el2 & HCR_IMO; in arm_excp_unmasked()
823 if ((scr || hcr) && !secure) { in arm_excp_unmasked()
1231 uint64_t hcr = arm_hcr_el2_eff(env); in aarch64_cpu_dump_state() local
1270 (hcr & HCR_NV) ? " NV" : "", in aarch64_cpu_dump_state()
1271 (hcr & HCR_NV1) ? " NV1" : "", in aarch64_cpu_dump_state()
1272 (hcr & HCR_NV2) ? " NV2" : ""); in aarch64_cpu_dump_state()
H A Dinternals.h1377 uint64_t hcr = arm_hcr_el2_eff(env); in allocation_tag_access_enabled() local
1378 if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { in allocation_tag_access_enabled()
/openbmc/linux/drivers/infiniband/hw/mthca/
H A Dmthca_cmd.c194 return readl(dev->hcr + HCR_STATUS_OFFSET) & in go_bit()
257 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); in mthca_cmd_post_hcr()
258 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4); in mthca_cmd_post_hcr()
259 __raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4); in mthca_cmd_post_hcr()
260 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), dev->hcr + 3 * 4); in mthca_cmd_post_hcr()
261 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4); in mthca_cmd_post_hcr()
262 __raw_writel((__force u32) cpu_to_be32(token << 16), dev->hcr + 5 * 4); in mthca_cmd_post_hcr()
270 op), dev->hcr + 6 * 4); in mthca_cmd_post_hcr()
367 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET)) << 32 | in mthca_cmd_poll()
369 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET + 4)); in mthca_cmd_poll()
[all …]
H A Dmthca_dev.h322 void __iomem *hcr; member
/openbmc/linux/drivers/net/wireless/intersil/hostap/
H A Dhostap_cs.c244 static void sandisk_write_hcr(local_info_t *local, int hcr) in sandisk_write_hcr() argument
252 HFA384X_OUTB(hcr, SANDISK_HCR_OFF); in sandisk_write_hcr()
368 static void prism2_pccard_genesis_reset(local_info_t *local, int hcr) in prism2_pccard_genesis_reset() argument
378 sandisk_write_hcr(local, hcr); in prism2_pccard_genesis_reset()
399 res = pcmcia_write_config_byte(hw_priv->link, CISREG_CCSR, hcr); in prism2_pccard_genesis_reset()
H A Dhostap_download.c388 static int prism2_enable_genesis(local_info_t *local, int hcr) in prism2_enable_genesis() argument
395 dev->name, hcr); in prism2_enable_genesis()
398 local->func->genesis_reset(local, hcr); in prism2_enable_genesis()
407 hcr); in prism2_enable_genesis()
411 hcr, initseq, readbuf); in prism2_enable_genesis()
H A Dhostap_plx.c296 static void prism2_plx_genesis_reset(local_info_t *local, int hcr) in prism2_plx_genesis_reset() argument
306 outb(hcr, hw_priv->cor_offset + 2); in prism2_plx_genesis_reset()
316 writeb(hcr, hw_priv->attr_mem + hw_priv->cor_offset + 2); in prism2_plx_genesis_reset()
H A Dhostap_pci.c267 static void prism2_pci_genesis_reset(local_info_t *local, int hcr) in prism2_pci_genesis_reset() argument
273 HFA384X_OUTW(hcr, HFA384X_PCIHCR_OFF); in prism2_pci_genesis_reset()
H A Dhostap_wlan.h579 void (*genesis_reset)(local_info_t *local, int hcr);
/openbmc/linux/drivers/net/ethernet/mellanox/mlx4/
H A Dcmd.c425 status = readl(mlx4_priv(dev)->cmd.hcr + HCR_STATUS_OFFSET); in cmd_pending()
437 u32 __iomem *hcr = cmd->hcr; in mlx4_cmd_post() local
482 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), hcr + 0); in mlx4_cmd_post()
483 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), hcr + 1); in mlx4_cmd_post()
484 __raw_writel((__force u32) cpu_to_be32(in_modifier), hcr + 2); in mlx4_cmd_post()
485 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), hcr + 3); in mlx4_cmd_post()
486 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), hcr + 4); in mlx4_cmd_post()
487 __raw_writel((__force u32) cpu_to_be32(token << 16), hcr + 5); in mlx4_cmd_post()
496 op), hcr + 6); in mlx4_cmd_post()
581 void __iomem *hcr = priv->cmd.hcr; in mlx4_cmd_poll() local
[all …]
H A Dmlx4.h632 void __iomem *hcr; member
/openbmc/linux/arch/arm64/kvm/hyp/include/hyp/
H A Dswitch.h238 u64 hcr = vcpu->arch.hcr_el2; in ___activate_traps() local
241 hcr |= HCR_TVM; in ___activate_traps()
243 write_sysreg(hcr, hcr_el2); in ___activate_traps()
245 if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE)) in ___activate_traps()
/openbmc/linux/drivers/atm/
H A Dfore200e.c455 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) { in fore200e_pca_irq_check()
467 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr); in fore200e_pca_irq_ack()
474 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr); in fore200e_pca_reset()
476 writel(0, fore200e->regs.pca.hcr); in fore200e_pca_reset()
494 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET; in fore200e_pca_map()
644 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; in fore200e_sba_irq_enable() local
645 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr); in fore200e_sba_irq_enable()
650 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ; in fore200e_sba_irq_check()
655 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; in fore200e_sba_irq_ack() local
656 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr); in fore200e_sba_irq_ack()
[all …]
H A Dfore200e.h773 volatile u32 __iomem * hcr; /* address of host control register */ member
782 u32 __iomem *hcr; /* address of host control register */ member
/openbmc/linux/arch/arm64/kvm/hyp/
H A Dvgic-v3-sr.c723 u32 hcr; in __vgic_v3_bump_eoicount() local
725 hcr = read_gicreg(ICH_HCR_EL2); in __vgic_v3_bump_eoicount()
726 hcr += 1 << ICH_HCR_EOIcount_SHIFT; in __vgic_v3_bump_eoicount()
727 write_gicreg(hcr, ICH_HCR_EL2); in __vgic_v3_bump_eoicount()
/openbmc/u-boot/arch/m68k/include/asm/coldfire/
H A Dlcd.h21 u32 hcr; /* 0x1C Horizontal Configuration Register */ member
/openbmc/linux/arch/arm64/kvm/
H A Darm.c1094 unsigned long *hcr; in vcpu_interrupt_line() local
1101 hcr = vcpu_hcr(vcpu); in vcpu_interrupt_line()
1103 set = test_and_set_bit(bit_index, hcr); in vcpu_interrupt_line()
1105 set = test_and_clear_bit(bit_index, hcr); in vcpu_interrupt_line()
H A Dmmu.c2122 unsigned long hcr = *vcpu_hcr(vcpu); in kvm_set_way_flush() local
2133 if (!(hcr & HCR_TVM)) { in kvm_set_way_flush()
2137 *vcpu_hcr(vcpu) = hcr | HCR_TVM; in kvm_set_way_flush()

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