Searched refs:fcr0 (Results 1 – 11 of 11) sorted by relevance
43 if (new_fr && !(env->active_fpu.fcr0 & (1 << FCR0_F64))) { in do_prctl_set_fp_mode()47 if (!new_fr && (env->active_fpu.fcr0 & (1 << FCR0_F64)) in do_prctl_set_fp_mode()52 if (new_fre && !(env->active_fpu.fcr0 & (1 << FCR0_FREP))) { in do_prctl_set_fp_mode()76 if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) { in do_prctl_set_fp_mode()
285 if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) { in target_cpu_copy_regs()290 if ((env->active_fpu.fcr0 & (1 << FCR0_F64) in target_cpu_copy_regs()
383 if (env->active_fpu.fcr0 & (1 << FCR0_F64)) { in compute_hflags()406 if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) { in compute_hflags()
38 return gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr0); in mips_cpu_gdb_read_register()
73 env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64, in fpu_dump_state()248 env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0; in mips_cpu_reset_hold()381 (env->active_fpu.fcr0 & (1 << FCR0_F64))) { in mips_cpu_reset_hold()
563 /* The R4000 has a full 64bit FPU but doesn't use the fcr0 bits. */584 /* The VR5432 has a full 64bit FPU but doesn't use the fcr0 bits. */630 /* The 5Kf has F64 / L / W but doesn't use the fcr0 bits. */658 /* The 20Kc has F64 / L / W but doesn't use the fcr0 bits. */1028 env->fpus[i].fcr0 = def->CP1_fcr0;
51 uint32_t fcr0; member1324 return env->active_fpu.fcr0 & (1 << FCR0_3D); in ase_3d_available()
599 &env->active_fpu.fcr0); in kvm_mips_put_fpu_registers()677 &env->active_fpu.fcr0); in kvm_mips_get_fpu_registers()
46 arg1 = (int32_t)env->active_fpu.fcr0; in helper_cfc1()50 if (env->active_fpu.fcr0 & (1 << FCR0_UFRP)) { in helper_cfc1()61 if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) { in helper_cfc1()93 if (!((env->active_fpu.fcr0 & (1 << FCR0_UFRP)) && (rt == 0))) { in helper_ctc1()105 if (!((env->active_fpu.fcr0 & (1 << FCR0_UFRP)) && (rt == 0))) { in helper_ctc1()117 if (!((env->active_fpu.fcr0 & (1 << FCR0_FREP)) && (rt == 0))) { in helper_ctc1()129 if (!((env->active_fpu.fcr0 & (1 << FCR0_FREP)) && (rt == 0))) { in helper_ctc1()
15089 ctx->ps = ((env->active_fpu.fcr0 >> FCR0_PS) & 1) || in mips_tr_init_disas_context()15290 offsetof(CPUMIPSState, active_fpu.fcr0), in mips_tcg_init()
61 VMSTATE_UINT32(fcr0, CPUMIPSFPUContext),