/openbmc/qemu/hw/char/ |
H A D | omap_uart.c | 31 omap_clk fclk; member 51 qemu_irq irq, omap_clk fclk, omap_clk iclk, in omap_uart_init() argument 58 s->fclk = fclk; in omap_uart_init() 61 omap_clk_getrate(fclk) / 16, in omap_uart_init()
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/openbmc/linux/drivers/usb/host/ |
H A D | ehci-sh.c | 13 struct clk *iclk, *fclk; member 114 priv->fclk = devm_clk_get(&pdev->dev, "usb_fck"); in ehci_hcd_sh_probe() 115 if (IS_ERR(priv->fclk)) in ehci_hcd_sh_probe() 116 priv->fclk = NULL; in ehci_hcd_sh_probe() 122 ret = clk_enable(priv->fclk); in ehci_hcd_sh_probe() 144 clk_disable(priv->fclk); in ehci_hcd_sh_probe() 162 clk_disable(priv->fclk); in ehci_hcd_sh_remove()
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H A D | ohci-at91.c | 54 struct clk *fclk; member 78 clk_set_rate(ohci_at91->fclk, 48000000); in at91_start_clock() 81 clk_prepare_enable(ohci_at91->fclk); in at91_start_clock() 90 clk_disable_unprepare(ohci_at91->fclk); in at91_stop_clock() 215 ohci_at91->fclk = devm_clk_get(dev, "uhpck"); in usb_hcd_at91_probe() 216 if (IS_ERR(ohci_at91->fclk)) { in usb_hcd_at91_probe() 218 retval = PTR_ERR(ohci_at91->fclk); in usb_hcd_at91_probe()
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/openbmc/linux/Documentation/devicetree/bindings/display/ti/ |
H A D | ti,omap3-dss.txt | 14 - clocks: handle to fclk 37 - clocks: handle to fclk 52 - clocks: handles to fclk and iclk 64 - clocks: handle to fclk 82 - clocks: handles to fclk and pll clock
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H A D | ti,omap4-dss.txt | 14 - clocks: handle to fclk 36 - clocks: handle to fclk 51 - clocks: handles to fclk and iclk 67 - clocks: handle to fclk 88 - clocks: handles to fclk and pll clock 111 - clocks: handles to fclk and pll clock
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H A D | ti,omap5-dss.txt | 14 - clocks: handle to fclk 36 - clocks: handle to fclk 51 - clocks: handles to fclk and iclk 69 - clocks: handles to fclk and pll clock 92 - clocks: handles to fclk and pll clock
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H A D | ti,dra7-dss.txt | 14 - clocks: handle to fclk 47 - clocks: handle to fclk 66 - clocks: handles to fclk and pll clock
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/openbmc/linux/drivers/media/dvb-frontends/ |
H A D | s5h1420.c | 39 u32 fclk; member 368 tmp = state->fclk / tmp; in s5h1420_read_status() 475 do_div(val, (state->fclk / 1000)); in s5h1420_setsymbolrate() 502 val = -(int) ((freqoffset * (1<<24)) / (state->fclk / 1000000)); in s5h1420_setfreqoffset() 530 val = (((-val) * (state->fclk/1000000)) / (1<<24)); in s5h1420_getfreqoffset() 668 state->fclk = 80000000; in s5h1420_set_frontend() 670 state->fclk = 59000000; in s5h1420_set_frontend() 672 state->fclk = 86000000; in s5h1420_set_frontend() 674 state->fclk = 88000000; in s5h1420_set_frontend() 676 state->fclk = 44000000; in s5h1420_set_frontend() [all …]
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H A D | cx24110.c | 231 u32 tmp, fclk, BDRI; in cx24110_set_symbolrate() local 251 fclk=90999000UL/2; in cx24110_set_symbolrate() 255 fclk=60666000UL; in cx24110_set_symbolrate() 259 fclk=80888000UL; in cx24110_set_symbolrate() 263 fclk=90999000UL; in cx24110_set_symbolrate() 265 dprintk("cx24110 debug: fclk %d Hz\n",fclk); in cx24110_set_symbolrate() 275 BDRI=fclk>>2; in cx24110_set_symbolrate() 288 dprintk("fclk = %d\n", fclk); in cx24110_set_symbolrate()
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H A D | mb86a20s.h | 22 u32 fclk; member
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/openbmc/linux/drivers/clk/nuvoton/ |
H A D | clk-ma35d1-pll.c | 146 unsigned long tmp, fout, fclk, diff; in ma35d1_pll_find_closest() local 153 fclk = div_u64(parent_rate * n, m); in ma35d1_pll_find_closest() 156 fclk = div_u64(fclk, 100); in ma35d1_pll_find_closest() 158 if (fclk < PLL_FCLK_MIN_FREQ || in ma35d1_pll_find_closest() 159 fclk > PLL_FCLK_MAX_FREQ) in ma35d1_pll_find_closest() 162 fout = div_u64(fclk, p); in ma35d1_pll_find_closest()
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/openbmc/linux/arch/sh/drivers/pci/ |
H A D | pcie-sh7786.c | 26 struct clk *fclk, phy_clk; member 224 port->fclk = clk_get(NULL, fclk_name); in pcie_clk_init() 225 if (IS_ERR(port->fclk)) { in pcie_clk_init() 226 ret = PTR_ERR(port->fclk); in pcie_clk_init() 230 clk_enable(port->fclk); in pcie_clk_init() 250 clk_disable(port->fclk); in pcie_clk_init() 251 clk_put(port->fclk); in pcie_clk_init()
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/openbmc/linux/drivers/clocksource/ |
H A D | timer-ti-dm.c | 122 struct clk *fclk; member 418 if (unlikely(!timer) || IS_ERR(timer->fclk)) in omap_dm_timer_set_source() 447 if (clk_hw_get_num_parents(__clk_get_hw(timer->fclk)) < 2) in omap_dm_timer_set_source() 457 ret = clk_set_parent(timer->fclk, parent); in omap_dm_timer_set_source() 729 if (timer && !IS_ERR(timer->fclk)) in omap_dm_timer_get_fclk() 730 return timer->fclk; in omap_dm_timer_get_fclk() 1136 timer->fclk = devm_clk_get(dev, "fck"); in omap_dm_timer_probe() 1137 if (IS_ERR(timer->fclk)) in omap_dm_timer_probe() 1138 return PTR_ERR(timer->fclk); in omap_dm_timer_probe() 1141 ret = devm_clk_notifier_register(dev, timer->fclk, in omap_dm_timer_probe() [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | zynqmp-clk-ccf.dtsi | 13 compatible = "xlnx,fclk"; 19 compatible = "xlnx,fclk"; 25 compatible = "xlnx,fclk"; 31 compatible = "xlnx,fclk";
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/openbmc/linux/drivers/iio/adc/ |
H A D | ad7124.c | 266 unsigned int fclk, odr_sel_bits; in ad7124_set_channel_odr() local 268 fclk = clk_get_rate(st->mclk); in ad7124_set_channel_odr() 276 odr_sel_bits = DIV_ROUND_CLOSEST(fclk, odr * 32); in ad7124_set_channel_odr() 286 st->channels[channel].cfg.odr = DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32); in ad7124_set_channel_odr() 888 unsigned int fclk, power_mode; in ad7124_setup() local 891 fclk = clk_get_rate(st->mclk); in ad7124_setup() 892 if (!fclk) in ad7124_setup() 898 fclk); in ad7124_setup() 899 if (fclk != ad7124_master_clk_freq_hz[power_mode]) { in ad7124_setup() 900 ret = clk_set_rate(st->mclk, fclk); in ad7124_setup()
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H A D | ad7192.c | 185 u32 fclk; member 542 fadc = DIV_ROUND_CLOSEST(st->fclk, in ad7192_get_available_filter_freq() 546 fadc = DIV_ROUND_CLOSEST(st->fclk, in ad7192_get_available_filter_freq() 550 fadc = DIV_ROUND_CLOSEST(st->fclk, AD7192_MODE_RATE(st->mode)); in ad7192_get_available_filter_freq() 670 fadc = DIV_ROUND_CLOSEST(st->fclk, in ad7192_get_3db_filter_freq() 718 *val = st->fclk / in ad7192_read_raw() 769 div = st->fclk / (val * st->f_order * 1024); in ad7192_write_raw() 1065 st->fclk = AD7192_INT_FREQ_MHZ; in ad7192_probe() 1075 st->fclk = clk_get_rate(st->mclk); in ad7192_probe() 1076 if (!ad7192_valid_external_frequency(st->fclk)) { in ad7192_probe()
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/openbmc/linux/drivers/pwm/ |
H A D | pwm-omap-dmtimer.c | 159 struct clk *fclk; in pwm_omap_dmtimer_config() local 168 fclk = omap->pdata->get_fclk(omap->dm_timer); in pwm_omap_dmtimer_config() 169 if (!fclk) { in pwm_omap_dmtimer_config() 174 clk_rate = clk_get_rate(fclk); in pwm_omap_dmtimer_config()
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/openbmc/linux/drivers/i2c/busses/ |
H A D | i2c-omap.c | 355 struct clk *fclk; in omap_i2c_init() local 374 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init() 375 if (IS_ERR(fclk)) { in omap_i2c_init() 376 error = PTR_ERR(fclk); in omap_i2c_init() 382 fclk_rate = clk_get_rate(fclk); in omap_i2c_init() 383 clk_put(fclk); in omap_i2c_init() 413 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init() 414 if (IS_ERR(fclk)) { in omap_i2c_init() 415 error = PTR_ERR(fclk); in omap_i2c_init() 420 fclk_rate = clk_get_rate(fclk) / 1000; in omap_i2c_init() [all …]
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/openbmc/linux/sound/soc/ti/ |
H A D | omap-dmic.c | 36 struct clk *fclk; member 330 mux = clk_get_parent(dmic->fclk); in omap_dmic_select_fclk() 476 dmic->fclk = devm_clk_get(dmic->dev, "fck"); in asoc_dmic_probe() 477 if (IS_ERR(dmic->fclk)) { in asoc_dmic_probe()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
H A D | vg_clk_mgr.c | 572 if (clock_table->DfPstateTable[i].fclk != 0) { in vg_clk_mgr_helper_populate_bw_params() 587 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk; in vg_clk_mgr_helper_populate_bw_params() 592 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk; in vg_clk_mgr_helper_populate_bw_params() 629 { .fclk = 400, .memclk = 400, .voltage = 2800 }, 630 { .fclk = 400, .memclk = 400, .voltage = 2800 }, 631 { .fclk = 400, .memclk = 400, .voltage = 2800 }, 632 { .fclk = 400, .memclk = 400, .voltage = 2800 }
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/openbmc/linux/drivers/net/hamradio/ |
H A D | baycom_epp.c | 167 unsigned int fclk; member 306 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, in eppconfig() 307 (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps), in eppconfig() 984 bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0); in baycom_setmode() 985 if (bc->cfg.fclk < 1000000) in baycom_setmode() 986 bc->cfg.fclk = 1000000; in baycom_setmode() 987 if (bc->cfg.fclk > 25000000) in baycom_setmode() 988 bc->cfg.fclk = 25000000; in baycom_setmode() 1083 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, in baycom_siocdevprivate() 1208 bc->cfg.fclk = 19666600; in baycom_epp_dev_setup()
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/openbmc/linux/drivers/mmc/host/ |
H A D | omap.c | 130 struct clk * fclk; member 195 clk_enable(host->fclk); in mmc_omap_fclk_enable() 197 clk_disable(host->fclk); in mmc_omap_fclk_enable() 1162 int func_clk_rate = clk_get_rate(host->fclk); in mmc_omap_calc_divisor() 1434 host->fclk = clk_get(&pdev->dev, "fck"); in mmc_omap_probe() 1435 if (IS_ERR(host->fclk)) { in mmc_omap_probe() 1436 ret = PTR_ERR(host->fclk); in mmc_omap_probe() 1440 ret = clk_prepare(host->fclk); in mmc_omap_probe() 1514 clk_unprepare(host->fclk); in mmc_omap_probe() 1516 clk_put(host->fclk); in mmc_omap_probe() [all …]
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/openbmc/u-boot/drivers/spi/ |
H A D | ti_qspi.c | 110 ulong fclk; member 123 clk_div = DIV_ROUND_UP(priv->fclk, hz) - 1; in ti_spi_set_speed() 390 priv->fclk = QSPI_DRA7XX_FCLK; in spi_setup_slave() 393 priv->fclk = QSPI_FCLK; in spi_setup_slave() 548 priv->fclk = dev_get_driver_data(bus); in ti_qspi_probe()
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/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | ti-omap-hsmmc.txt | 92 swakeup | | fclk 98 In suspend the fclk is off and the module is dysfunctional. Even register reads 99 will fail. A small logic in the host will request fclk restore, when an
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/openbmc/linux/drivers/clk/zynq/ |
H A D | clkc.c | 103 static void __init zynq_clk_register_fclk(enum zynq_clk fclk, in zynq_clk_register_fclk() argument 147 clks[fclk] = clk_register_gate(NULL, clk_name, in zynq_clk_register_fclk() 152 if (clk_prepare_enable(clks[fclk])) in zynq_clk_register_fclk() 154 fclk - fclk0); in zynq_clk_register_fclk() 171 clks[fclk] = ERR_PTR(-ENOMEM); in zynq_clk_register_fclk()
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