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Searched refs:dpcd (Results 1 – 25 of 55) sorted by relevance

123

/openbmc/linux/include/drm/display/
H A Ddrm_dp_helper.h47 int drm_dp_read_clock_recovery_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
49 int drm_dp_read_channel_eq_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
53 const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
56 const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
107 drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_link_rate()
109 return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); in drm_dp_max_link_rate()
113 drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_lane_count()
115 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in drm_dp_max_lane_count()
119 drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_enhanced_frame_cap()
121 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_enhanced_frame_cap()
[all …]
/openbmc/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c284 static int __read_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], in __read_delay()
300 if (cr && dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in __read_delay()
326 rd_interval = dpcd[offset]; in __read_delay()
339 int drm_dp_read_clock_recovery_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], in drm_dp_read_clock_recovery_delay()
342 return __read_delay(aux, dpcd, dp_phy, uhbr, true); in drm_dp_read_clock_recovery_delay()
346 int drm_dp_read_channel_eq_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], in drm_dp_read_channel_eq_delay()
349 return __read_delay(aux, dpcd, dp_phy, uhbr, false); in drm_dp_read_channel_eq_delay()
374 const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_link_train_clock_recovery_delay()
376 u8 rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in drm_dp_link_train_clock_recovery_delay()
380 if (dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in drm_dp_link_train_clock_recovery_delay()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_dp.c42 return drm_dp_read_sink_count_cap(connector, outp->dp.dpcd, &outp->dp.desc); in nouveau_dp_has_sink_count()
54 u8 *dpcd = outp->dp.dpcd; in nouveau_dp_probe_dpcd() local
56 ret = drm_dp_read_dpcd_caps(aux, dpcd); in nouveau_dp_probe_dpcd()
60 ret = drm_dp_read_desc(aux, &outp->dp.desc, drm_dp_is_branch(dpcd)); in nouveau_dp_probe_dpcd()
67 mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd); in nouveau_dp_probe_dpcd()
85 ret = drm_dp_read_downstream_info(aux, dpcd, in nouveau_dp_probe_dpcd()
108 u8 *dpcd = nv_encoder->dp.dpcd; in nouveau_dp_detect() local
163 nv_encoder->dp.link_bw = 27000 * dpcd[DP_MAX_LINK_RATE]; in nouveau_dp_detect()
165 dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in nouveau_dp_detect()
167 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP && dpcd[DP_DPCD_REV] >= 0x13) { in nouveau_dp_detect()
[all …]
/openbmc/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix-anx6345.c63 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
99 u8 dp_bw, dpcd[2]; in anx6345_dp_link_training() local
134 &anx6345->dpcd, DP_RECEIVER_CAP_SIZE); in anx6345_dp_link_training()
150 if (anx6345->dpcd[DP_DPCD_REV] >= 0x11) { in anx6345_dp_link_training()
151 err = drm_dp_dpcd_readb(&anx6345->aux, DP_SET_POWER, &dpcd[0]); in anx6345_dp_link_training()
158 dpcd[0] &= ~DP_SET_POWER_MASK; in anx6345_dp_link_training()
159 dpcd[0] |= DP_SET_POWER_D0; in anx6345_dp_link_training()
161 err = drm_dp_dpcd_writeb(&anx6345->aux, DP_SET_POWER, dpcd[0]); in anx6345_dp_link_training()
182 if (anx6345->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) { in anx6345_dp_link_training()
201 if (drm_dp_enhanced_frame_cap(anx6345->dpcd)) in anx6345_dp_link_training()
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H A Danalogix-anx78xx.c83 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
606 u8 dp_bw, dpcd[2]; in anx78xx_dp_link_training() local
647 &anx78xx->dpcd, DP_RECEIVER_CAP_SIZE); in anx78xx_dp_link_training()
663 if (anx78xx->dpcd[DP_DPCD_REV] >= 0x11) { in anx78xx_dp_link_training()
664 err = drm_dp_dpcd_readb(&anx78xx->aux, DP_SET_POWER, &dpcd[0]); in anx78xx_dp_link_training()
671 dpcd[0] &= ~DP_SET_POWER_MASK; in anx78xx_dp_link_training()
672 dpcd[0] |= DP_SET_POWER_D0; in anx78xx_dp_link_training()
674 err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_SET_POWER, dpcd[0]); in anx78xx_dp_link_training()
695 if (anx78xx->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) { in anx78xx_dp_link_training()
714 if (drm_dp_enhanced_frame_cap(anx78xx->dpcd)) in anx78xx_dp_link_training()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_dp.c253 const u8 dpcd[DP_DPCD_SIZE], in amdgpu_atombios_dp_get_dp_link_config()
260 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in amdgpu_atombios_dp_get_dp_link_config()
261 unsigned max_lane_num = drm_dp_max_lane_count(dpcd); in amdgpu_atombios_dp_get_dp_link_config()
322 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in amdgpu_atombios_dp_probe_oui()
339 if (dig_connector->dpcd[DP_DPCD_REV] > 0x10) { in amdgpu_atombios_dp_ds_ports()
359 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in amdgpu_atombios_dp_get_dpcd()
361 DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd), in amdgpu_atombios_dp_get_dpcd()
362 dig_connector->dpcd); in amdgpu_atombios_dp_get_dpcd()
369 dig_connector->dpcd[0] = 0; in amdgpu_atombios_dp_get_dpcd()
421 ret = amdgpu_atombios_dp_get_dp_link_config(connector, dig_connector->dpcd, in amdgpu_atombios_dp_set_link_config()
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/openbmc/linux/drivers/gpu/drm/msm/dp/
H A Ddp_panel.c31 if (dp_panel->dpcd[DP_EDP_CONFIGURATION_CAP]) { in dp_panel_read_psr_cap()
51 u8 *dpcd, major = 0, minor = 0, temp; in dp_panel_read_dpcd() local
54 dpcd = dp_panel->dpcd; in dp_panel_read_dpcd()
60 dpcd, (DP_RECEIVER_CAP_SIZE + 1)); in dp_panel_read_dpcd()
71 temp = dpcd[DP_TRAINING_AUX_RD_INTERVAL]; in dp_panel_read_dpcd()
81 dpcd, (DP_RECEIVER_CAP_SIZE + 1)); in dp_panel_read_dpcd()
92 link_info->revision = dpcd[DP_DPCD_REV]; in dp_panel_read_dpcd()
96 link_info->rate = drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); in dp_panel_read_dpcd()
97 link_info->num_lanes = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in dp_panel_read_dpcd()
111 if (drm_dp_enhanced_frame_cap(dpcd)) in dp_panel_read_dpcd()
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H A Ddp_ctrl.c126 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_config_ctrl() local
132 if (drm_dp_alternate_scrambler_reset_cap(dpcd)) in dp_ctrl_config_ctrl()
144 if (drm_dp_enhanced_frame_cap(dpcd)) in dp_ctrl_config_ctrl()
1108 drm_dp_link_train_clock_recovery_delay(ctrl->aux, ctrl->panel->dpcd); in dp_ctrl_link_train_1()
1186 drm_dp_link_train_channel_eq_delay(ctrl->aux, ctrl->panel->dpcd); in dp_ctrl_clear_training_pattern()
1202 if (drm_dp_tps4_supported(ctrl->panel->dpcd)) { in dp_ctrl_link_train_2()
1205 } else if (drm_dp_tps3_supported(ctrl->panel->dpcd)) { in dp_ctrl_link_train_2()
1220 drm_dp_link_train_channel_eq_delay(ctrl->aux, ctrl->panel->dpcd); in dp_ctrl_link_train_2()
1245 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_link_train() local
1260 if (drm_dp_max_downspread(dpcd)) in dp_ctrl_link_train()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Ddp.c208 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] >= 0x14 && in nvkm_dp_train_eq()
209 lt->outp->dp.dpcd[DPCD_RC03] & DPCD_RC03_TPS4_SUPPORTED) in nvkm_dp_train_eq()
212 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] >= 0x12 && in nvkm_dp_train_eq()
213 lt->outp->dp.dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED) in nvkm_dp_train_eq()
218 usec = (lt->outp->dp.dpcd[DPCD_RC0E] & DPCD_RC0E_AUX_RD_INTERVAL) * 4000; in nvkm_dp_train_eq()
250 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] < 0x14 && !lt->repeater) in nvkm_dp_train_cr()
251 usec = (lt->outp->dp.dpcd[DPCD_RC0E] & DPCD_RC0E_AUX_RD_INTERVAL) * 4000; in nvkm_dp_train_cr()
284 .pc2 = outp->dp.dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED, in nvkm_dp_train_link()
306 sink[0] = (outp->dp.rate[rate].dpcd < 0) ? ior->dp.bw : 0; in nvkm_dp_train_link()
315 if (outp->dp.rate[rate].dpcd >= 0) { in nvkm_dp_train_link()
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H A Doutp.h46 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
49 int dpcd; /* -1, or index into SUPPORTED_LINK_RATES table */ member
H A Duoutp.c149 nvkm_uoutp_mthd_acquire_dp(struct nvkm_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE], in nvkm_uoutp_mthd_acquire_dp()
158 memcpy(outp->dp.dpcd, dpcd, sizeof(outp->dp.dpcd)); in nvkm_uoutp_mthd_acquire_dp()
236 ret = nvkm_uoutp_mthd_acquire_dp(outp, args->v0.dp.dpcd, in nvkm_uoutp_mthd_acquire()
/openbmc/linux/drivers/gpu/drm/radeon/
H A Datombios_dp.c307 const u8 dpcd[DP_DPCD_SIZE], in radeon_dp_get_dp_link_config()
313 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in radeon_dp_get_dp_link_config()
314 unsigned max_lane_num = drm_dp_max_lane_count(dpcd); in radeon_dp_get_dp_link_config()
375 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in radeon_dp_probe_oui()
396 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in radeon_dp_getdpcd()
398 DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd), in radeon_dp_getdpcd()
399 dig_connector->dpcd); in radeon_dp_getdpcd()
406 dig_connector->dpcd[0] = 0; in radeon_dp_getdpcd()
463 ret = radeon_dp_get_dp_link_config(connector, dig_connector->dpcd, in radeon_dp_set_link_config()
490 ret = radeon_dp_get_dp_link_config(connector, dig_connector->dpcd, in radeon_dp_mode_valid_helper()
[all …]
/openbmc/linux/drivers/gpu/drm/tegra/
H A Ddp.c172 u8 dpcd[DP_RECEIVER_CAP_SIZE], value; in drm_dp_link_probe() local
178 err = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, sizeof(dpcd)); in drm_dp_link_probe()
182 link->revision = dpcd[DP_DPCD_REV]; in drm_dp_link_probe()
183 link->max_rate = drm_dp_max_link_rate(dpcd); in drm_dp_link_probe()
184 link->max_lanes = drm_dp_max_lane_count(dpcd); in drm_dp_link_probe()
186 link->caps.enhanced_framing = drm_dp_enhanced_frame_cap(dpcd); in drm_dp_link_probe()
187 link->caps.tps3_supported = drm_dp_tps3_supported(dpcd); in drm_dp_link_probe()
188 link->caps.fast_training = drm_dp_fast_training_cap(dpcd); in drm_dp_link_probe()
189 link->caps.channel_coding = drm_dp_channel_coding_supported(dpcd); in drm_dp_link_probe()
191 if (drm_dp_alternate_scrambler_reset_cap(dpcd)) { in drm_dp_link_probe()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_training.c68 const u8 dpcd[DP_RECEIVER_CAP_SIZE], in intel_dp_read_lttpr_phy_caps()
73 if (drm_dp_read_lttpr_phy_caps(&intel_dp->aux, dpcd, dp_phy, phy_caps) < 0) { in intel_dp_read_lttpr_phy_caps()
84 const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in intel_dp_read_lttpr_common_caps()
88 ret = drm_dp_read_lttpr_common_caps(&intel_dp->aux, dpcd, in intel_dp_read_lttpr_common_caps()
132 static int intel_dp_init_lttpr_phys(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in intel_dp_init_lttpr_phys()
136 if (!intel_dp_read_lttpr_common_caps(intel_dp, dpcd)) in intel_dp_init_lttpr_phys()
193 static int intel_dp_init_lttpr(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in intel_dp_init_lttpr()
198 lttpr_count = intel_dp_init_lttpr_phys(intel_dp, dpcd); in intel_dp_init_lttpr()
201 intel_dp_read_lttpr_phy_caps(intel_dp, dpcd, DP_PHY_LTTPR(i)); in intel_dp_init_lttpr()
235 u8 dpcd[DP_RECEIVER_CAP_SIZE]; in intel_dp_init_lttpr_and_dprx_caps() local
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H A Dintel_dp.c158 max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in intel_dp_set_dpcd_sink_rates()
173 if (intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B) { in intel_dp_set_dpcd_sink_rates()
237 intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd); in intel_dp_set_max_sink_lane_count()
897 if (!drm_dp_is_branch(intel_dp->dpcd)) in dfp_can_convert_from_rgb()
914 if (!drm_dp_is_branch(intel_dp->dpcd)) in dfp_can_convert_from_ycbcr444()
2325 drm_dp_enhanced_frame_cap(intel_dp->dpcd); in intel_dp_compute_config()
2434 return intel_dp->dpcd[DP_DPCD_REV] == 0x11 && in downstream_hpd_needs_d0()
2435 drm_dp_is_branch(intel_dp->dpcd) && in downstream_hpd_needs_d0()
2503 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in intel_dp_set_power()
2564 if (intel_dp->dpcd[DP_DPCD_REV] == 0) in intel_dp_sync_state()
[all …]
/openbmc/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c263 uint8_t dpcd[4]; member
326 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in cdv_intel_dp_max_lane_count()
327 max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; in cdv_intel_dp_max_lane_count()
342 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; in cdv_intel_dp_max_link_bw()
1076 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in cdv_intel_dp_mode_set()
1077 (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) { in cdv_intel_dp_mode_set()
1112 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in cdv_intel_dp_sink_dpms()
1671 if (cdv_intel_dp_aux_native_read(encoder, 0x000, intel_dp->dpcd, in cdv_dp_detect()
1672 sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd)) in cdv_dp_detect()
1674 if (intel_dp->dpcd[DP_DPCD_REV] != 0) in cdv_dp_detect()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvif/
H A Doutp.c130 nvif_outp_acquire_dp(struct nvif_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE], in nvif_outp_acquire_dp()
140 memcpy(args.dp.dpcd, dpcd, sizeof(args.dp.dpcd)); in nvif_outp_acquire_dp()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Ddisplay.c519 kfree(port->dpcd); in clean_virtual_dp_monitor()
520 port->dpcd = NULL; in clean_virtual_dp_monitor()
552 port->dpcd = kzalloc(sizeof(*(port->dpcd)), GFP_KERNEL); in setup_virtual_dp_monitor()
553 if (!port->dpcd) { in setup_virtual_dp_monitor()
562 memcpy(port->dpcd->data, dpcd_fix_data, DPCD_HEADER_SIZE); in setup_virtual_dp_monitor()
563 port->dpcd->data_valid = true; in setup_virtual_dp_monitor()
564 port->dpcd->data[DPCD_SINK_COUNT] = 0x1; in setup_virtual_dp_monitor()
H A Dhandlers.c1122 static void dp_aux_ch_ctl_link_training(struct intel_vgpu_dpcd_data *dpcd, in dp_aux_ch_ctl_link_training() argument
1128 dpcd->data[DPCD_LANE0_1_STATUS] |= DPCD_LANES_CR_DONE; in dp_aux_ch_ctl_link_training()
1130 dpcd->data[DPCD_LANE2_3_STATUS] |= DPCD_LANES_CR_DONE; in dp_aux_ch_ctl_link_training()
1135 dpcd->data[DPCD_LANE0_1_STATUS] |= DPCD_LANES_EQ_DONE; in dp_aux_ch_ctl_link_training()
1136 dpcd->data[DPCD_LANE0_1_STATUS] |= DPCD_SYMBOL_LOCKED; in dp_aux_ch_ctl_link_training()
1138 dpcd->data[DPCD_LANE2_3_STATUS] |= DPCD_LANES_EQ_DONE; in dp_aux_ch_ctl_link_training()
1139 dpcd->data[DPCD_LANE2_3_STATUS] |= DPCD_SYMBOL_LOCKED; in dp_aux_ch_ctl_link_training()
1141 dpcd->data[DPCD_LANE_ALIGN_STATUS_UPDATED] |= in dp_aux_ch_ctl_link_training()
1147 dpcd->data[DPCD_SINK_STATUS] = DPCD_SINK_IN_SYNC; in dp_aux_ch_ctl_link_training()
1167 struct intel_vgpu_dpcd_data *dpcd = NULL; in dp_aux_ch_ctl_mmio_write() local
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/openbmc/linux/drivers/gpu/drm/bridge/
H A Dite-it6505.c427 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
626 static int it6505_get_dpcd(struct it6505 *it6505, int offset, u8 *dpcd, int num) in it6505_get_dpcd() argument
631 ret = drm_dp_dpcd_read(&it6505->aux, offset, dpcd, num); in it6505_get_dpcd()
637 num, dpcd); in it6505_get_dpcd()
1448 return it6505->dpcd[DP_TRAINING_AUX_RD_INTERVAL] >= 0x01; in it6505_use_step_train_check()
1459 if (it6505->dpcd[0] == 0) { in it6505_parse_link_capabilities()
1466 link->revision = it6505->dpcd[0]; in it6505_parse_link_capabilities()
1467 link->rate = drm_dp_bw_code_to_link_rate(it6505->dpcd[1]); in it6505_parse_link_capabilities()
1468 link->num_lanes = it6505->dpcd[2] & DP_MAX_LANE_COUNT_MASK; in it6505_parse_link_capabilities()
1470 if (it6505->dpcd[2] & DP_ENHANCED_FRAME_CAP) in it6505_parse_link_capabilities()
[all …]
/openbmc/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c315 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
703 drm_dp_link_train_clock_recovery_delay(&dp->aux, dp->dpcd); in zynqmp_dp_link_train_cr()
751 if (dp->dpcd[DP_DPCD_REV] >= DP_V1_2 && in zynqmp_dp_link_train_ce()
752 dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED) in zynqmp_dp_link_train_ce()
768 drm_dp_link_train_channel_eq_delay(&dp->aux, dp->dpcd); in zynqmp_dp_link_train_ce()
802 enhanced = drm_dp_enhanced_frame_cap(dp->dpcd); in zynqmp_dp_train()
808 if (dp->dpcd[3] & 0x1) { in zynqmp_dp_train()
1540 ret = drm_dp_dpcd_read(&dp->aux, 0x0, dp->dpcd, in zynqmp_dp_bridge_detect()
1541 sizeof(dp->dpcd)); in zynqmp_dp_bridge_detect()
1548 drm_dp_max_link_rate(dp->dpcd), in zynqmp_dp_bridge_detect()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/include/nvif/
H A Doutp.h25 int nvif_outp_acquire_dp(struct nvif_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE],
/openbmc/linux/Documentation/devicetree/bindings/display/exynos/
H A Dexynos_dp.txt67 -samsung,link-rate: deprecated prop that can reading from monitor by dpcd method.
68 -samsung,lane-count: deprecated prop that can reading from monitor by dpcd method.
/openbmc/qemu/include/hw/display/
H A Dxlnx_dp.h109 DPCDState *dpcd; member
/openbmc/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c1401 u8 dpcd[DP_RECEIVER_CAP_SIZE]) in cdns_mhdp_fill_sink_caps()
1409 mhdp->sink.ssc = !!(dpcd[DP_MAX_DOWNSPREAD] & in cdns_mhdp_fill_sink_caps()
1414 if (drm_dp_tps3_supported(dpcd)) in cdns_mhdp_fill_sink_caps()
1416 if (drm_dp_tps4_supported(dpcd)) in cdns_mhdp_fill_sink_caps()
1420 mhdp->sink.fast_link = !!(dpcd[DP_MAX_DOWNSPREAD] & in cdns_mhdp_fill_sink_caps()
1426 u8 dpcd[DP_RECEIVER_CAP_SIZE], amp[2]; in cdns_mhdp_link_up() local
1442 err = drm_dp_dpcd_read(&mhdp->aux, addr, dpcd, DP_RECEIVER_CAP_SIZE); in cdns_mhdp_link_up()
1448 mhdp->link.revision = dpcd[0]; in cdns_mhdp_link_up()
1449 mhdp->link.rate = drm_dp_bw_code_to_link_rate(dpcd[1]); in cdns_mhdp_link_up()
1450 mhdp->link.num_lanes = dpcd[2] & DP_MAX_LANE_COUNT_MASK; in cdns_mhdp_link_up()
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