158 	max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);  in intel_dp_set_dpcd_sink_rates()
173 	if (intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B) {  in intel_dp_set_dpcd_sink_rates()
237 	intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);  in intel_dp_set_max_sink_lane_count()
897 	if (!drm_dp_is_branch(intel_dp->dpcd))  in dfp_can_convert_from_rgb()
914 	if (!drm_dp_is_branch(intel_dp->dpcd))  in dfp_can_convert_from_ycbcr444()
2325 		drm_dp_enhanced_frame_cap(intel_dp->dpcd);  in intel_dp_compute_config()
2434 	return intel_dp->dpcd[DP_DPCD_REV] == 0x11 &&  in downstream_hpd_needs_d0()
2435 		drm_dp_is_branch(intel_dp->dpcd) &&  in downstream_hpd_needs_d0()
2503 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)  in intel_dp_set_power()
2564 	if (intel_dp->dpcd[DP_DPCD_REV] == 0)  in intel_dp_sync_state()
2766 	if (drm_dp_is_branch(intel_dp->dpcd) &&  in intel_dp_is_hdmi_2_1_sink()
2929 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x13)  in intel_dp_configure_protocol_converter()
2932 	if (!drm_dp_is_branch(intel_dp->dpcd))  in intel_dp_configure_protocol_converter()
3010 	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x14 ||  in intel_dp_get_dsc_sink_cap()
3104 	if (mso % 2 || mso > drm_dp_max_lane_count(intel_dp->dpcd)) {  in intel_edp_mso_init()
3111 			    mso, drm_dp_max_lane_count(intel_dp->dpcd) / mso,  in intel_edp_mso_init()
3130 	drm_WARN_ON(&dev_priv->drm, intel_dp->dpcd[DP_DPCD_REV] != 0);  in intel_edp_init_dpcd()
3132 	if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd) != 0)  in intel_edp_init_dpcd()
3136 			 drm_dp_is_branch(intel_dp->dpcd));  in intel_edp_init_dpcd()
3221 					  intel_dp->dpcd,  in intel_dp_has_sink_count()
3239 				 drm_dp_is_branch(intel_dp->dpcd));  in intel_dp_get_dpcd()
3269 	return drm_dp_read_downstream_info(&intel_dp->aux, intel_dp->dpcd,  in intel_dp_get_dpcd()
3280 		drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);  in intel_dp_can_mst()
3289 	bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);  in intel_dp_configure_mst()
3999 				    intel_dp->dpcd[DP_DPCD_REV]);  in intel_dp_process_phy_request()
4519 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)  in intel_dp_check_device_service_irq()
4542 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)  in intel_dp_check_link_service_irq()
4636 	u8 *dpcd = intel_dp->dpcd;  in intel_dp_detect_dpcd()  local
4648 	if (!drm_dp_is_branch(dpcd))  in intel_dp_detect_dpcd()
4666 	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) {  in intel_dp_detect_dpcd()
4672 		type = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &  in intel_dp_detect_dpcd()
4744 		drm_dp_downstream_max_bpc(intel_dp->dpcd,  in intel_dp_update_dfp()
4748 		drm_dp_downstream_max_dotclock(intel_dp->dpcd,  in intel_dp_update_dfp()
4752 		drm_dp_downstream_min_tmds_clock(intel_dp->dpcd,  in intel_dp_update_dfp()
4756 		drm_dp_downstream_max_tmds_clock(intel_dp->dpcd,  in intel_dp_update_dfp()
4761 		drm_dp_get_pcon_max_frl_bw(intel_dp->dpcd,  in intel_dp_update_dfp()
4780 	    (!drm_dp_is_branch(intel_dp->dpcd) || intel_dp->dfp.ycbcr420_passthrough))  in intel_dp_can_ycbcr420()
4801 		drm_dp_downstream_420_passthrough(intel_dp->dpcd,  in intel_dp_update_420()
4806 		drm_dp_downstream_444_to_420_conversion(intel_dp->dpcd,  in intel_dp_update_420()
4809 		drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,  in intel_dp_update_420()
4987 						 intel_dp->dpcd,  in intel_dp_detect()
5037 					      intel_dp->dpcd,  in intel_dp_get_modes()
5559 		if (DISPLAY_VER(dev_priv) == 9 && drm_dp_is_branch(intel_dp->dpcd) &&  in intel_edp_init_connector()
5560 		    (intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_TYPE_MASK) ==  in intel_edp_init_connector()