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Searched refs:component_reg_phys (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/cxl/core/
H A Dport.c631 resource_size_t component_reg_phys, in cxl_port_alloc() argument
682 port->component_reg_phys = component_reg_phys; in cxl_port_alloc()
704 resource_size_t component_reg_phys) in cxl_setup_comp_regs() argument
706 if (component_reg_phys == CXL_RESOURCE_NONE) in cxl_setup_comp_regs()
712 .resource = component_reg_phys, in cxl_setup_comp_regs()
720 resource_size_t component_reg_phys) in cxl_port_setup_regs() argument
725 component_reg_phys); in cxl_port_setup_regs()
729 resource_size_t component_reg_phys) in cxl_dport_setup_regs() argument
742 component_reg_phys); in cxl_dport_setup_regs()
749 resource_size_t component_reg_phys, in __devm_cxl_add_port() argument
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H A Dregs.c477 resource_size_t component_reg_phys; in __rcrb_to_component() local
524 component_reg_phys = bar0 & PCI_BASE_ADDRESS_MEM_MASK; in __rcrb_to_component()
526 component_reg_phys |= ((u64)bar1) << 32; in __rcrb_to_component()
528 if (!component_reg_phys) in __rcrb_to_component()
532 if (!IS_ALIGNED(component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE)) in __rcrb_to_component()
535 return component_reg_phys; in __rcrb_to_component()
H A Dhdm.c102 .resource = port->component_reg_phys, in map_hdm_decoder_regs()
180 crb = ioremap(port->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE); in devm_cxl_setup_hdm()
/openbmc/linux/tools/testing/cxl/test/
H A Dmock.c275 resource_size_t component_reg_phys; in __wrap_cxl_rcd_component_reg_phys() local
279 component_reg_phys = CXL_RESOURCE_NONE; in __wrap_cxl_rcd_component_reg_phys()
281 component_reg_phys = cxl_rcd_component_reg_phys(dev, dport); in __wrap_cxl_rcd_component_reg_phys()
284 return component_reg_phys; in __wrap_cxl_rcd_component_reg_phys()
H A Dmem.c1427 cxlds->component_reg_phys = CXL_RESOURCE_NONE; in cxl_mock_mem_probe()
/openbmc/linux/drivers/cxl/
H A Dpci.c474 resource_size_t component_reg_phys; in cxl_rcrb_get_comp_regs() local
485 component_reg_phys = cxl_rcd_component_reg_phys(&pdev->dev, dport); in cxl_rcrb_get_comp_regs()
489 if (component_reg_phys == CXL_RESOURCE_NONE) in cxl_rcrb_get_comp_regs()
492 map->resource = component_reg_phys; in cxl_rcrb_get_comp_regs()
827 cxlds->component_reg_phys = CXL_RESOURCE_NONE; in cxl_pci_probe()
834 cxlds->component_reg_phys = map.resource; in cxl_pci_probe()
H A Dacpi.c467 resource_size_t component_reg_phys; in add_host_bridge_uport() local
496 component_reg_phys = ctx.base; in add_host_bridge_uport()
497 if (component_reg_phys != CXL_RESOURCE_NONE) in add_host_bridge_uport()
499 ctx.uid, &component_reg_phys); in add_host_bridge_uport()
505 port = devm_cxl_add_port(host, bridge, component_reg_phys, dport); in add_host_bridge_uport()
H A Dcxl.h599 resource_size_t component_reg_phys; member
692 resource_size_t component_reg_phys,
706 resource_size_t component_reg_phys);
H A Dmem.c69 cxlds->component_reg_phys, in devm_cxl_add_endpoint()
H A Dcxlmem.h424 resource_size_t component_reg_phys; member