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Searched refs:UART0_BASE (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/arch/nios2/boot/compressed/
H A Dconsole.c9 || (defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) && defined(UART0_BASE))
55 #elif defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) && defined(UART0_BASE)
88 uartbase = (unsigned long) my_ioremap((unsigned long) UART0_BASE); in console_init()
/openbmc/u-boot/board/intel/crownbay/
H A Dcrownbay.c14 UART0_BASE, UART0_IRQ); in board_early_init_f()
/openbmc/u-boot/arch/x86/include/asm/
H A Dibmpc.h20 #define UART0_BASE 0x3f8 macro
/openbmc/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dhardware_ti816x.h25 #define UART0_BASE 0x48020000 macro
H A Dhardware_ti814x.h16 #define UART0_BASE 0x48020000 macro
H A Dhardware_am33xx.h16 #define UART0_BASE 0x44E09000 macro
H A Dhardware_am43xx.h19 #define UART0_BASE 0x44E09000 macro
H A Dhardware.h56 # define DEFAULT_UART_BASE UART0_BASE
/openbmc/u-boot/board/congatec/conga-qeval20-qa3-e3845/
H A Dconga-qeval20-qa3.c24 UART0_BASE, UART0_IRQ); in board_early_init_f()
/openbmc/u-boot/include/configs/
H A Dpdu001.h72 #define CONFIG_SYS_NS16550_COM1 UART0_BASE
/openbmc/u-boot/board/intel/cougarcanyon2/
H A Dcougarcanyon2.c38 sio1007_enable_serial(SIO1007_IOPORT3, 0, UART0_BASE, UART0_IRQ); in board_early_init_f()
/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/
H A Djz4780.h24 #define UART0_BASE 0xb0030000 macro
/openbmc/u-boot/arch/arm/include/asm/arch-vf610/
H A Dimx-regs.h43 #define UART0_BASE (AIPS0_BASE_ADDR + 0x00027000) macro