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Searched refs:TARGET_PHYS_ADDR_SPACE_BITS (Results 1 – 25 of 29) sorted by relevance

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/openbmc/qemu/target/microblaze/
H A Dcpu-param.h21 #define TARGET_PHYS_ADDR_SPACE_BITS 32 macro
25 #define TARGET_PHYS_ADDR_SPACE_BITS 64 macro
/openbmc/qemu/target/hppa/
H A Dcpu-param.h14 # define TARGET_PHYS_ADDR_SPACE_BITS 32 macro
18 # define TARGET_PHYS_ADDR_SPACE_BITS 40 macro
H A Dmem_helper.c42 QEMU_BUILD_BUG_ON(TARGET_PHYS_ADDR_SPACE_BITS > 54); in hppa_abs_to_phys_pa2_w1()
43 return sextract64(addr, 0, TARGET_PHYS_ADDR_SPACE_BITS); in hppa_abs_to_phys_pa2_w1()
67 addr |= -1ull << (TARGET_PHYS_ADDR_SPACE_BITS - 4); in hppa_abs_to_phys_pa2_w0()
558 ent->pa = sextract64(ent->pa, 0, TARGET_PHYS_ADDR_SPACE_BITS); in itlbt_pa20()
/openbmc/qemu/target/i386/
H A Dcpu-param.h13 # define TARGET_PHYS_ADDR_SPACE_BITS 52 macro
22 # define TARGET_PHYS_ADDR_SPACE_BITS 36 macro
/openbmc/qemu/target/riscv/
H A Dcpu-param.h13 # define TARGET_PHYS_ADDR_SPACE_BITS 56 /* 44-bit PPN */ macro
17 # define TARGET_PHYS_ADDR_SPACE_BITS 34 /* 22-bit PPN */ macro
/openbmc/qemu/target/ppc/
H A Dcpu-param.h18 #define TARGET_PHYS_ADDR_SPACE_BITS 62 macro
31 # define TARGET_PHYS_ADDR_SPACE_BITS 36 macro
/openbmc/qemu/target/mips/
H A Dcpu-param.h16 #define TARGET_PHYS_ADDR_SPACE_BITS 48 macro
19 #define TARGET_PHYS_ADDR_SPACE_BITS 40 macro
/openbmc/qemu/target/sparc/
H A Dcpu-param.h13 # define TARGET_PHYS_ADDR_SPACE_BITS 41 macro
22 # define TARGET_PHYS_ADDR_SPACE_BITS 36 macro
/openbmc/qemu/target/arm/
H A Dcpu-param.h13 # define TARGET_PHYS_ADDR_SPACE_BITS 52 macro
17 # define TARGET_PHYS_ADDR_SPACE_BITS 40 macro
/openbmc/qemu/include/exec/
H A Dcpu-defs.h39 #ifndef TARGET_PHYS_ADDR_SPACE_BITS
40 # error TARGET_PHYS_ADDR_SPACE_BITS must be defined in cpu-param.h
/openbmc/qemu/target/m68k/
H A Dcpu-param.h18 #define TARGET_PHYS_ADDR_SPACE_BITS 32 macro
/openbmc/qemu/target/hexagon/
H A Dcpu-param.h24 #define TARGET_PHYS_ADDR_SPACE_BITS 36 macro
/openbmc/qemu/target/rx/
H A Dcpu-param.h25 #define TARGET_PHYS_ADDR_SPACE_BITS 32 macro
/openbmc/qemu/target/tricore/
H A Dcpu-param.h13 #define TARGET_PHYS_ADDR_SPACE_BITS 32 macro
/openbmc/qemu/target/openrisc/
H A Dcpu-param.h13 #define TARGET_PHYS_ADDR_SPACE_BITS 32 macro
/openbmc/qemu/target/avr/
H A Dcpu-param.h32 #define TARGET_PHYS_ADDR_SPACE_BITS 24 macro
/openbmc/qemu/target/loongarch/
H A Dcpu-param.h12 #define TARGET_PHYS_ADDR_SPACE_BITS 48 macro
H A Dinternals.h16 #define TARGET_PHYS_MASK MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS)
/openbmc/qemu/target/sh4/
H A Dcpu-param.h13 #define TARGET_PHYS_ADDR_SPACE_BITS 32 macro
/openbmc/qemu/target/xtensa/
H A Dcpu-param.h13 #define TARGET_PHYS_ADDR_SPACE_BITS 32 macro
/openbmc/qemu/target/s390x/
H A Dcpu-param.h13 #define TARGET_PHYS_ADDR_SPACE_BITS 64 macro
/openbmc/qemu/target/alpha/
H A Dcpu-param.h14 #define TARGET_PHYS_ADDR_SPACE_BITS 44 macro
/openbmc/qemu/linux-user/alpha/
H A Dtarget_proc.h60 model, TARGET_PAGE_SIZE, TARGET_PHYS_ADDR_SPACE_BITS, in open_cpuinfo()
/openbmc/qemu/target/i386/tcg/
H A Dhelper-tcg.h35 QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS);
/openbmc/qemu/hw/loongarch/
H A Dboot.c171 return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS); in cpu_loongarch_virt_to_phys()

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