Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0, v8.0.0 |
|
#
27a03171 |
| 14-Mar-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu into staging
accel/tcg: Fix NB_MMU_MODES to 16 Balance of the target/ patchset which eliminates tcg_temp_free Balance of the target/
Merge tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu into staging
accel/tcg: Fix NB_MMU_MODES to 16 Balance of the target/ patchset which eliminates tcg_temp_free Balance of the target/ patchset which eliminates tcg_const
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmQPcb0dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV885AgAjDbg1soRBy0THf0X # CVXmQ4yYyUKAonZBL8Abt9yX01BhLFqEsrju3HiaLNOM9DbwWQ4gdvSrtAZ/K2YG # d6EvC+rJe79pr58MEEhqO4OO1ymp52amRHtEXva4vcKRNuM9WF5by/Hz2PsZyenG # ysaLBdddooA9SJeL7xYBMpKWFgUm3C8NzfaRfCBVcG94er9u8RUi0kx+drmOLw0g # vZ3Hekvi2I8Y5mWqvHeAIOsr8Md9PO3ezWxEteE4qsPNTTRfVD93oSGe9nNCYZTX # wWU51Vfv9GB6hOylAfMRIeCmkjks/gqLOGElsh1MaVovNDTXS5IKV/HgaLaocJHV # 2P81uQ== # =FpIY # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Mar 2023 18:55:57 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu: (91 commits) tcg: Drop tcg_const_* tcg: Drop tcg_const_*_vec target/tricore: Use min/max for saturate target/ppc: Avoid tcg_const_* in translate.c target/ppc: Fix gen_tlbsx_booke206 target/ppc: Rewrite trans_ADDG6S target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc target/ppc: Avoid tcg_const_* in fp-impl.c.inc target/ppc: Avoid tcg_const_* in vsx-impl.c.inc target/ppc: Avoid tcg_const_* in xxeval target/ppc: Avoid tcg_const_* in vmx-impl.c.inc target/ppc: Avoid tcg_const_i64 in do_vcntmb target/m68k: Use tcg_constant_i32 in gen_ea_mode target/arm: Avoid tcg_const_ptr in handle_rev target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn target/arm: Avoid tcg_const_* in translate-mve.c target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str} target/arm: Improve trans_BFCI target/arm: Create gen_set_rmode, gen_restore_rmode ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
3fcf81ba |
| 06-Mar-2023 |
Anton Johansson <anjo@rev.ng> |
target/hexagon: Remove `NB_MMU_MODES` define
Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Re
target/hexagon: Remove `NB_MMU_MODES` define
Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230306175230.7110-7-anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
Revision tags: v7.2.0, v7.0.0, v6.2.0, v6.1.0 |
|
#
c79f01c9 |
| 18-Feb-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210218' into staging
Initial commit for the Qualcomm Hexagon processor.
# gpg: Signature made Thu 18 Feb 2021 16:26:52 GMT # gpg:
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210218' into staging
Initial commit for the Qualcomm Hexagon processor.
# gpg: Signature made Thu 18 Feb 2021 16:26:52 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-hex-20210218: (35 commits) Hexagon build infrastructure Hexagon (tests/tcg/hexagon) TCG tests - floating point Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc Hexagon (tests/tcg/hexagon) TCG tests - multiarch Hexagon (linux-user/hexagon) Linux user emulation Hexagon (target/hexagon) translation Hexagon (target/hexagon) TCG for floating point instructions Hexagon (target/hexagon) TCG for instructions with multiple definitions Hexagon (target/hexagon) TCG generation Hexagon (target/hexagon) instruction classes Hexagon (target/hexagon) macros Hexagon (target/hexagon) opcode data structures Hexagon (target/hexagon) generater phase 4 - decode tree Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree Hexagon (target/hexagon) generator phase 2 - generate header files Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics Hexagon (target/hexagon/imported) arch import Hexagon (target/hexagon/fma_emu.[ch]) utility functions Hexagon (target/hexagon/conv_emu.[ch]) utility functions Hexagon (target/hexagon/arch.[ch]) utility functions ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
45183ccd |
| 07-Feb-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) scalar core definition
Add target state header, target definitions and initialization routines
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1612763186-
Hexagon (target/hexagon) scalar core definition
Add target state header, target definitions and initialization routines
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1612763186-18161-5-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|