174433bf0SRichard Henderson /* 274433bf0SRichard Henderson * i386 cpu parameters for qemu. 374433bf0SRichard Henderson * 474433bf0SRichard Henderson * Copyright (c) 2003 Fabrice Bellard 5*b14d0649SPhilippe Mathieu-Daudé * SPDX-License-Identifier: LGPL-2.0-or-later 674433bf0SRichard Henderson */ 774433bf0SRichard Henderson 874433bf0SRichard Henderson #ifndef I386_CPU_PARAM_H 94f31b54bSMarkus Armbruster #define I386_CPU_PARAM_H 1074433bf0SRichard Henderson 1174433bf0SRichard Henderson #ifdef TARGET_X86_64 1274433bf0SRichard Henderson # define TARGET_LONG_BITS 64 1374433bf0SRichard Henderson # define TARGET_PHYS_ADDR_SPACE_BITS 52 1474433bf0SRichard Henderson /* 1574433bf0SRichard Henderson * ??? This is really 48 bits, sign-extended, but the only thing 1674433bf0SRichard Henderson * accessible to userland with bit 48 set is the VSYSCALL, and that 1774433bf0SRichard Henderson * is handled via other mechanisms. 1874433bf0SRichard Henderson */ 1974433bf0SRichard Henderson # define TARGET_VIRT_ADDR_SPACE_BITS 47 2074433bf0SRichard Henderson #else 2174433bf0SRichard Henderson # define TARGET_LONG_BITS 32 2274433bf0SRichard Henderson # define TARGET_PHYS_ADDR_SPACE_BITS 36 2374433bf0SRichard Henderson # define TARGET_VIRT_ADDR_SPACE_BITS 32 2474433bf0SRichard Henderson #endif 2574433bf0SRichard Henderson #define TARGET_PAGE_BITS 12 2674433bf0SRichard Henderson 27e92dd332SPhilippe Mathieu-Daudé /* The x86 has a strong memory model with some store-after-load re-ordering */ 28e92dd332SPhilippe Mathieu-Daudé #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) 29e92dd332SPhilippe Mathieu-Daudé 3074433bf0SRichard Henderson #endif 31