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Searched refs:OSC (Results 1 – 25 of 34) sorted by relevance

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/openbmc/u-boot/board/silica/pengwyn/
H A Dboard.c70 #define OSC (V_OSCK/1000000) macro
72 266, OSC-1, 1, -1, -1, -1, -1};
74 303, OSC-1, 1, -1, -1, -1, -1};
76 400, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/board/eets/pdu001/
H A Dboard.c184 #define OSC (V_OSCK / 1000000) macro
186 266, OSC - 1, 1, -1, -1, -1, -1};
188 303, OSC - 1, 1, -1, -1, -1, -1};
190 400, OSC - 1, 1, -1, -1, -1, -1};
/openbmc/u-boot/board/birdland/bav335x/
H A Dboard.c173 #define OSC (V_OSCK/1000000) macro
175 266, OSC-1, 1, -1, -1, -1, -1};
177 303, OSC-1, 1, -1, -1, -1, -1};
179 400, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c76 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
82 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
88 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
91 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC),
94 { CLK(AUDIO), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
97 { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC),
101 CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE),
103 { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
118 CLK(SFROM32KHZ), CLK(NONE), CLK(OSC), CLK(NONE),
122 CLK(MEMORY), CLK(NONE), CLK(OSC), CLK(NONE),
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c74 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
80 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
86 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
89 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC),
92 { CLK(AUDIO), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
95 { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC),
99 CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE),
101 { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
116 CLK(SFROM32KHZ), CLK(NONE), CLK(OSC), CLK(NONE),
120 CLK(MEMORY), CLK(NONE), CLK(OSC), CLK(NONE),
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra114/
H A Dclock.c64 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
70 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
76 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
79 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
82 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC),
85 { CLK(AUDIO), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
88 { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC),
92 CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE),
94 { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
/openbmc/u-boot/board/gumstix/pepper/
H A Dboard.c35 #define OSC (V_OSCK/1000000) macro
65 const struct dpll_params dpll_ddr3 = {400, OSC-1, 1, -1, -1, -1, -1};
98 const struct dpll_params dpll_ddr2 = {266, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c64 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
70 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
76 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
79 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC),
82 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC),
85 { CLK(AUDIO), CLK(CGENERAL), CLK(PERIPH), CLK(OSC),
88 { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC),
92 CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE),
94 { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
/openbmc/u-boot/board/vscom/baltos/
H A Dboard.c162 #define OSC (V_OSCK/1000000) macro
164 266, OSC-1, 1, -1, -1, -1, -1};
166 303, OSC-1, 1, -1, -1, -1, -1};
168 400, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock_am33xx.c17 #define OSC (V_OSCK/1000000) macro
62 CONFIG_SYS_MPUCLK, OSC-1, 1, -1, -1, -1, -1};
64 1000, OSC-1, -1, -1, 10, 8, 4};
H A Dchilisom.c159 #define OSC (V_OSCK/1000000) macro
161 400, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/board/BuR/brppt1/
H A Dboard.c75 #define OSC (V_OSCK/1000000) macro
76 static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c61 { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC) },
63 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(OSC) },
65 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC) },
66 { CLK(PERIPH), CLK(CGENERAL), CLK(MEMORY), CLK(OSC) },
67 { CLK(PERIPH), CLK(CGENERAL), CLK(XCPU), CLK(OSC) },
68 { CLK(PERIPH), CLK(DISPLAY), CLK(CGENERAL), CLK(OSC) },
H A Dpinmux.c289 PIN(CDEV1, OSC, PLLA_OUT, PLLM_OUT1, AUDIO_SYNC),
290 PIN(CDEV2, OSC, AHB_CLK, APB_CLK, PLLP_OUT4),
/openbmc/u-boot/board/bosch/shc/
H A Dboard.c277 #define OSC (V_OSCK/1000000) macro
281 #define MPUPLL_FREF (OSC / (MPUPLL_N + 1))
284 400, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/board/siemens/common/
H A Dboard.c100 #define OSC (V_OSCK/1000000) macro
102 DDR_PLL_FREQ, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/board/phytec/pcm051/
H A Dboard.c43 #define OSC (V_OSCK/1000000) macro
45 DDR_CLK_MHZ, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/board/BuR/brxre1/
H A Dboard.c107 #define OSC (V_OSCK/1000000) macro
108 const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/board/isee/igep003x/
H A Dboard.c140 #define OSC (V_OSCK/1000000) macro
142 400, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/board/tcl/sl50/
H A Dboard.c87 #define OSC (V_OSCK/1000000) macro
89 400, OSC-1, 1, -1, -1, -1, -1};
/openbmc/u-boot/board/siemens/pxm2/
H A Dboard.c129 #define OSC (V_OSCK/1000000) macro
132 720, OSC-1, 1, -1, -1, -1, -1};
/openbmc/linux/drivers/clk/versatile/
H A DKconfig23 tristate "Clock driver for Versatile Express OSC clock generators"
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ulz-bsh-smm-m2.dts147 MX6UL_PAD_ENET1_RX_EN__OSC32K_32K_OUT 0x4001b031 /* OSC 32Khz wifi clk in */
/openbmc/linux/arch/alpha/kernel/
H A Dsmc37c93x.c54 #define OSC 0x24 macro
/openbmc/u-boot/drivers/clk/
H A DKconfig72 bool "Enable driver for Arm Versatile Express OSC clock generators"

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