xref: /openbmc/u-boot/board/BuR/brxre1/board.c (revision 97f9830849c64d60d0cf2fd69e87dfe4557d02a4)
183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2a4d79993SHannes Schmelzer /*
3a4d79993SHannes Schmelzer  * board.c
4a4d79993SHannes Schmelzer  *
5a4d79993SHannes Schmelzer  * Board functions for B&R BRXRE1 Board
6a4d79993SHannes Schmelzer  *
7a4d79993SHannes Schmelzer  * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
8a4d79993SHannes Schmelzer  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
9a4d79993SHannes Schmelzer  *
10a4d79993SHannes Schmelzer  */
11a4d79993SHannes Schmelzer #include <common.h>
12a4d79993SHannes Schmelzer #include <errno.h>
13a4d79993SHannes Schmelzer #include <spl.h>
14a4d79993SHannes Schmelzer #include <asm/arch/cpu.h>
15a4d79993SHannes Schmelzer #include <asm/arch/hardware.h>
16a4d79993SHannes Schmelzer #include <asm/arch/omap.h>
17a4d79993SHannes Schmelzer #include <asm/arch/ddr_defs.h>
18a4d79993SHannes Schmelzer #include <asm/arch/clock.h>
19a4d79993SHannes Schmelzer #include <asm/arch/gpio.h>
20a4d79993SHannes Schmelzer #include <asm/arch/sys_proto.h>
21a4d79993SHannes Schmelzer #include <asm/arch/mem.h>
22a4d79993SHannes Schmelzer #include <asm/io.h>
23a4d79993SHannes Schmelzer #include <asm/emif.h>
24a4d79993SHannes Schmelzer #include <asm/gpio.h>
25*eaba7df7SHannes Schmelzer #include <dm.h>
26a4d79993SHannes Schmelzer #include <i2c.h>
27a4d79993SHannes Schmelzer #include <power/tps65217.h>
28a4d79993SHannes Schmelzer #include "../common/bur_common.h"
29a4d79993SHannes Schmelzer #include <lcd.h>
30a4d79993SHannes Schmelzer 
31a4d79993SHannes Schmelzer /* -------------------------------------------------------------------------*/
32a4d79993SHannes Schmelzer /* -- defines for used GPIO Hardware -- */
33a4d79993SHannes Schmelzer #define ESC_KEY					(0+19)
34a4d79993SHannes Schmelzer #define LCD_PWR					(0+5)
35a4d79993SHannes Schmelzer #define PUSH_KEY				(0+31)
36a4d79993SHannes Schmelzer /* -------------------------------------------------------------------------*/
37a4d79993SHannes Schmelzer /* -- PSOC Resetcontroller Register defines -- */
38a4d79993SHannes Schmelzer 
39a4d79993SHannes Schmelzer /* I2C Address of controller */
40a4d79993SHannes Schmelzer #define	RSTCTRL_ADDR				0x75
41a4d79993SHannes Schmelzer /* Register for CTRL-word */
42a4d79993SHannes Schmelzer #define RSTCTRL_CTRLREG				0x01
43a4d79993SHannes Schmelzer /* Register for giving some information to VxWorks OS */
44a4d79993SHannes Schmelzer #define RSTCTRL_SCRATCHREG			0x04
45a4d79993SHannes Schmelzer 
46a4d79993SHannes Schmelzer /* -- defines for RSTCTRL_CTRLREG  -- */
47a4d79993SHannes Schmelzer #define	RSTCTRL_FORCE_PWR_NEN			0x0404
48a4d79993SHannes Schmelzer #define	RSTCTRL_CAN_STB				0x4040
49a4d79993SHannes Schmelzer 
50a4d79993SHannes Schmelzer DECLARE_GLOBAL_DATA_PTR;
51a4d79993SHannes Schmelzer 
rstctrl_rw(u8 reg,unsigned char rnw,void * pdat,int size)52*eaba7df7SHannes Schmelzer static int rstctrl_rw(u8 reg, unsigned char rnw, void *pdat, int size)
53*eaba7df7SHannes Schmelzer {
54*eaba7df7SHannes Schmelzer 	struct udevice *i2cdev;
55*eaba7df7SHannes Schmelzer 	int rc;
56*eaba7df7SHannes Schmelzer 
57*eaba7df7SHannes Schmelzer 	rc = i2c_get_chip_for_busnum(0, RSTCTRL_ADDR, 1, &i2cdev);
58*eaba7df7SHannes Schmelzer 	if (rc >= 0) {
59*eaba7df7SHannes Schmelzer 		if (rnw)
60*eaba7df7SHannes Schmelzer 			rc = dm_i2c_read(i2cdev, reg, pdat, size);
61*eaba7df7SHannes Schmelzer 		else
62*eaba7df7SHannes Schmelzer 			rc = dm_i2c_write(i2cdev, reg, pdat, size);
63*eaba7df7SHannes Schmelzer 	} else {
64*eaba7df7SHannes Schmelzer 		printf("%s: cannot get udevice for chip 0x%02x!\n",
65*eaba7df7SHannes Schmelzer 		       __func__, RSTCTRL_ADDR);
66*eaba7df7SHannes Schmelzer 	}
67*eaba7df7SHannes Schmelzer 
68*eaba7df7SHannes Schmelzer 	return rc;
69*eaba7df7SHannes Schmelzer }
70*eaba7df7SHannes Schmelzer 
71a4d79993SHannes Schmelzer #if defined(CONFIG_SPL_BUILD)
72a4d79993SHannes Schmelzer /* TODO: check ram-timing ! */
73a4d79993SHannes Schmelzer static const struct ddr_data ddr3_data = {
74a4d79993SHannes Schmelzer 	.datardsratio0 = MT41K256M16HA125E_RD_DQS,
75a4d79993SHannes Schmelzer 	.datawdsratio0 = MT41K256M16HA125E_WR_DQS,
76a4d79993SHannes Schmelzer 	.datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
77a4d79993SHannes Schmelzer 	.datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
78a4d79993SHannes Schmelzer };
79a4d79993SHannes Schmelzer static const struct cmd_control ddr3_cmd_ctrl_data = {
80a4d79993SHannes Schmelzer 	.cmd0csratio = MT41K256M16HA125E_RATIO,
81a4d79993SHannes Schmelzer 	.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
82a4d79993SHannes Schmelzer 
83a4d79993SHannes Schmelzer 	.cmd1csratio = MT41K256M16HA125E_RATIO,
84a4d79993SHannes Schmelzer 	.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
85a4d79993SHannes Schmelzer 
86a4d79993SHannes Schmelzer 	.cmd2csratio = MT41K256M16HA125E_RATIO,
87a4d79993SHannes Schmelzer 	.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
88a4d79993SHannes Schmelzer };
89a4d79993SHannes Schmelzer static struct emif_regs ddr3_emif_reg_data = {
90a4d79993SHannes Schmelzer 	.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
91a4d79993SHannes Schmelzer 	.ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
92a4d79993SHannes Schmelzer 	.sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
93a4d79993SHannes Schmelzer 	.sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
94a4d79993SHannes Schmelzer 	.sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
95a4d79993SHannes Schmelzer 	.zq_config = MT41K256M16HA125E_ZQ_CFG,
96a4d79993SHannes Schmelzer 	.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
97a4d79993SHannes Schmelzer };
98a4d79993SHannes Schmelzer 
99a4d79993SHannes Schmelzer static const struct ctrl_ioregs ddr3_ioregs = {
100a4d79993SHannes Schmelzer 	.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
101a4d79993SHannes Schmelzer 	.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
102a4d79993SHannes Schmelzer 	.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
103a4d79993SHannes Schmelzer 	.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
104a4d79993SHannes Schmelzer 	.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
105a4d79993SHannes Schmelzer };
106a4d79993SHannes Schmelzer 
107a4d79993SHannes Schmelzer #define OSC	(V_OSCK/1000000)
108a4d79993SHannes Schmelzer const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
109a4d79993SHannes Schmelzer 
am33xx_spl_board_init(void)110a4d79993SHannes Schmelzer void am33xx_spl_board_init(void)
111a4d79993SHannes Schmelzer {
112a4d79993SHannes Schmelzer 	unsigned short buf;
113*eaba7df7SHannes Schmelzer 	int rc;
114a4d79993SHannes Schmelzer 
115a4d79993SHannes Schmelzer 	struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
116a4d79993SHannes Schmelzer 	struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;
117a4d79993SHannes Schmelzer 	/*
118a4d79993SHannes Schmelzer 	 * enable additional clocks of modules which are accessed later from
119a4d79993SHannes Schmelzer 	 * VxWorks OS
120a4d79993SHannes Schmelzer 	 */
121a4d79993SHannes Schmelzer 	u32 *const clk_domains[] = { 0 };
122a4d79993SHannes Schmelzer 
123a4d79993SHannes Schmelzer 	u32 *const clk_modules_xre1specific[] = {
124a4d79993SHannes Schmelzer 		&cmwkup->wkup_adctscctrl,
125a4d79993SHannes Schmelzer 		&cmper->spi1clkctrl,
126a4d79993SHannes Schmelzer 		&cmper->dcan0clkctrl,
127a4d79993SHannes Schmelzer 		&cmper->dcan1clkctrl,
128a4d79993SHannes Schmelzer 		&cmper->epwmss0clkctrl,
129a4d79993SHannes Schmelzer 		&cmper->epwmss1clkctrl,
130a4d79993SHannes Schmelzer 		&cmper->epwmss2clkctrl,
131a4d79993SHannes Schmelzer 		&cmper->lcdclkctrl,
132a4d79993SHannes Schmelzer 		&cmper->lcdcclkstctrl,
133a4d79993SHannes Schmelzer 		0
134a4d79993SHannes Schmelzer 	};
135a4d79993SHannes Schmelzer 	do_enable_clocks(clk_domains, clk_modules_xre1specific, 1);
136a4d79993SHannes Schmelzer 	/* power-OFF LCD-Display */
137*eaba7df7SHannes Schmelzer 	if (gpio_request(LCD_PWR, "LCD_PWR") != 0)
138*eaba7df7SHannes Schmelzer 		printf("cannot request gpio for LCD_PWR!\n");
139*eaba7df7SHannes Schmelzer 	else if (gpio_direction_output(LCD_PWR, 0) != 0)
140*eaba7df7SHannes Schmelzer 		printf("cannot set direction output on LCD_PWR!\n");
141a4d79993SHannes Schmelzer 
142a4d79993SHannes Schmelzer 	/* setup I2C */
143a4d79993SHannes Schmelzer 	enable_i2c_pin_mux();
144a4d79993SHannes Schmelzer 
145a4d79993SHannes Schmelzer 	/* power-ON 3V3 via Resetcontroller */
146a4d79993SHannes Schmelzer 	buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB;
147*eaba7df7SHannes Schmelzer 	rc = rstctrl_rw(RSTCTRL_CTRLREG, 0, (uint8_t *)&buf, sizeof(buf));
148*eaba7df7SHannes Schmelzer 	if (rc != 0)
149*eaba7df7SHannes Schmelzer 		printf("ERROR: cannot write to resetc (turn on PWR_nEN)\n");
150a4d79993SHannes Schmelzer 
151a9484aa7SHannes Schmelzer 	pmicsetup(0, 0);
152a4d79993SHannes Schmelzer }
153a4d79993SHannes Schmelzer 
get_dpll_ddr_params(void)154a4d79993SHannes Schmelzer const struct dpll_params *get_dpll_ddr_params(void)
155a4d79993SHannes Schmelzer {
156a4d79993SHannes Schmelzer 	return &dpll_ddr3;
157a4d79993SHannes Schmelzer }
158a4d79993SHannes Schmelzer 
sdram_init(void)159a4d79993SHannes Schmelzer void sdram_init(void)
160a4d79993SHannes Schmelzer {
161a4d79993SHannes Schmelzer 	config_ddr(400, &ddr3_ioregs,
162a4d79993SHannes Schmelzer 		   &ddr3_data,
163a4d79993SHannes Schmelzer 		   &ddr3_cmd_ctrl_data,
164a4d79993SHannes Schmelzer 		   &ddr3_emif_reg_data, 0);
165a4d79993SHannes Schmelzer }
166a4d79993SHannes Schmelzer #endif /* CONFIG_SPL_BUILD */
167a4d79993SHannes Schmelzer /*
168a4d79993SHannes Schmelzer  * Basic board specific setup.  Pinmux has been handled already.
169a4d79993SHannes Schmelzer  */
board_init(void)170a4d79993SHannes Schmelzer int board_init(void)
171a4d79993SHannes Schmelzer {
172*eaba7df7SHannes Schmelzer 	if (power_tps65217_init(0))
173*eaba7df7SHannes Schmelzer 		printf("WARN: cannot setup PMIC 0x24 @ bus #0, not found!.\n");
174*eaba7df7SHannes Schmelzer 
175a4d79993SHannes Schmelzer 	return 0;
176a4d79993SHannes Schmelzer }
177a4d79993SHannes Schmelzer 
178a4d79993SHannes Schmelzer #ifdef CONFIG_BOARD_LATE_INIT
board_late_init(void)179a4d79993SHannes Schmelzer int board_late_init(void)
180a4d79993SHannes Schmelzer {
181a4d79993SHannes Schmelzer 	const unsigned int toff = 1000;
182a4d79993SHannes Schmelzer 	unsigned int cnt  = 3;
183a4d79993SHannes Schmelzer 	unsigned short buf = 0xAAAA;
184a4d79993SHannes Schmelzer 	unsigned char scratchreg = 0;
185*eaba7df7SHannes Schmelzer 	int rc;
186a4d79993SHannes Schmelzer 
187a4d79993SHannes Schmelzer 	/* try to read out some boot-instruction from resetcontroller */
188*eaba7df7SHannes Schmelzer 	rc = rstctrl_rw(RSTCTRL_SCRATCHREG, 1, &scratchreg, sizeof(scratchreg));
189*eaba7df7SHannes Schmelzer 	if (rc != 0)
190*eaba7df7SHannes Schmelzer 		printf("ERROR: read scratchregister (resetc) failed!\n");
191a4d79993SHannes Schmelzer 
192*eaba7df7SHannes Schmelzer 	if (gpio_request(ESC_KEY, "boot-key") != 0) {
193*eaba7df7SHannes Schmelzer 		printf("cannot request boot-key!\n");
194*eaba7df7SHannes Schmelzer 	} else if (gpio_get_value(ESC_KEY)) {
195a4d79993SHannes Schmelzer 		do {
196a4d79993SHannes Schmelzer 			lcd_position_cursor(1, 8);
197a4d79993SHannes Schmelzer 			switch (cnt) {
198a4d79993SHannes Schmelzer 			case 3:
199a4d79993SHannes Schmelzer 				lcd_puts(
200a4d79993SHannes Schmelzer 				"release ESC-KEY to enter SERVICE-mode.");
201a4d79993SHannes Schmelzer 				break;
202a4d79993SHannes Schmelzer 			case 2:
203a4d79993SHannes Schmelzer 				lcd_puts(
204a4d79993SHannes Schmelzer 				"release ESC-KEY to enter DIAGNOSE-mode.");
205a4d79993SHannes Schmelzer 				break;
206a4d79993SHannes Schmelzer 			case 1:
207a4d79993SHannes Schmelzer 				lcd_puts(
208a4d79993SHannes Schmelzer 				"release ESC-KEY to enter BOOT-mode.    ");
209a4d79993SHannes Schmelzer 				break;
210a4d79993SHannes Schmelzer 			}
211a4d79993SHannes Schmelzer 			mdelay(toff);
212a4d79993SHannes Schmelzer 			cnt--;
213a4d79993SHannes Schmelzer 			if (!gpio_get_value(ESC_KEY) &&
214a4d79993SHannes Schmelzer 			    gpio_get_value(PUSH_KEY) && 2 == cnt) {
215a4d79993SHannes Schmelzer 				lcd_position_cursor(1, 8);
216a4d79993SHannes Schmelzer 				lcd_puts(
217a4d79993SHannes Schmelzer 				"switching to network-console ...       ");
218382bee57SSimon Glass 				env_set("bootcmd", "run netconsole");
219a4d79993SHannes Schmelzer 				cnt = 4;
220a4d79993SHannes Schmelzer 				break;
221a4d79993SHannes Schmelzer 			} else if (!gpio_get_value(ESC_KEY) &&
222a4d79993SHannes Schmelzer 			    gpio_get_value(PUSH_KEY) && 1 == cnt) {
223a4d79993SHannes Schmelzer 				lcd_position_cursor(1, 8);
224a4d79993SHannes Schmelzer 				lcd_puts(
225a4d79993SHannes Schmelzer 				"starting u-boot script from USB ...    ");
226382bee57SSimon Glass 				env_set("bootcmd", "run usbscript");
227a4d79993SHannes Schmelzer 				cnt = 4;
228a4d79993SHannes Schmelzer 				break;
229a4d79993SHannes Schmelzer 			} else if ((!gpio_get_value(ESC_KEY) &&
230a4d79993SHannes Schmelzer 				    gpio_get_value(PUSH_KEY) && cnt == 0) ||
231a4d79993SHannes Schmelzer 				    (gpio_get_value(ESC_KEY) &&
232a4d79993SHannes Schmelzer 				    gpio_get_value(PUSH_KEY) && cnt == 0)) {
233a4d79993SHannes Schmelzer 				lcd_position_cursor(1, 8);
234a4d79993SHannes Schmelzer 				lcd_puts(
235a4d79993SHannes Schmelzer 				"starting script from network ...      ");
236382bee57SSimon Glass 				env_set("bootcmd", "run netscript");
237a4d79993SHannes Schmelzer 				cnt = 4;
238a4d79993SHannes Schmelzer 				break;
239a4d79993SHannes Schmelzer 			} else if (!gpio_get_value(ESC_KEY)) {
240a4d79993SHannes Schmelzer 				break;
241a4d79993SHannes Schmelzer 			}
242a4d79993SHannes Schmelzer 		} while (cnt);
243a4d79993SHannes Schmelzer 	} else if (scratchreg == 0xCC) {
244a4d79993SHannes Schmelzer 		lcd_position_cursor(1, 8);
245a4d79993SHannes Schmelzer 		lcd_puts(
246a4d79993SHannes Schmelzer 		"starting vxworks from network ...      ");
247382bee57SSimon Glass 		env_set("bootcmd", "run netboot");
248a4d79993SHannes Schmelzer 		cnt = 4;
249a4d79993SHannes Schmelzer 	} else if (scratchreg == 0xCD) {
250a4d79993SHannes Schmelzer 		lcd_position_cursor(1, 8);
251a4d79993SHannes Schmelzer 		lcd_puts(
252a4d79993SHannes Schmelzer 		"starting script from network ...      ");
253382bee57SSimon Glass 		env_set("bootcmd", "run netscript");
254a4d79993SHannes Schmelzer 		cnt = 4;
255a4d79993SHannes Schmelzer 	} else if (scratchreg == 0xCE) {
256a4d79993SHannes Schmelzer 		lcd_position_cursor(1, 8);
257a4d79993SHannes Schmelzer 		lcd_puts(
258a4d79993SHannes Schmelzer 		"starting AR from eMMC ...             ");
259382bee57SSimon Glass 		env_set("bootcmd", "run mmcboot");
260a4d79993SHannes Schmelzer 		cnt = 4;
261a4d79993SHannes Schmelzer 	}
262a4d79993SHannes Schmelzer 
263a4d79993SHannes Schmelzer 	lcd_position_cursor(1, 8);
264a4d79993SHannes Schmelzer 	switch (cnt) {
265a4d79993SHannes Schmelzer 	case 0:
266a4d79993SHannes Schmelzer 		lcd_puts("entering BOOT-mode.                    ");
267382bee57SSimon Glass 		env_set("bootcmd", "run defaultAR");
268a4d79993SHannes Schmelzer 		buf = 0x0000;
269a4d79993SHannes Schmelzer 		break;
270a4d79993SHannes Schmelzer 	case 1:
271a4d79993SHannes Schmelzer 		lcd_puts("entering DIAGNOSE-mode.                ");
272a4d79993SHannes Schmelzer 		buf = 0x0F0F;
273a4d79993SHannes Schmelzer 		break;
274a4d79993SHannes Schmelzer 	case 2:
275a4d79993SHannes Schmelzer 		lcd_puts("entering SERVICE mode.                 ");
276a4d79993SHannes Schmelzer 		buf = 0xB4B4;
277a4d79993SHannes Schmelzer 		break;
278a4d79993SHannes Schmelzer 	case 3:
279a4d79993SHannes Schmelzer 		lcd_puts("loading OS...                          ");
280a4d79993SHannes Schmelzer 		buf = 0x0404;
281a4d79993SHannes Schmelzer 		break;
282a4d79993SHannes Schmelzer 	}
283a4d79993SHannes Schmelzer 	/* write bootinfo into scratchregister of resetcontroller */
284*eaba7df7SHannes Schmelzer 	rc = rstctrl_rw(RSTCTRL_SCRATCHREG, 0, (uint8_t *)&buf, sizeof(buf));
285*eaba7df7SHannes Schmelzer 	if (rc != 0)
286*eaba7df7SHannes Schmelzer 		printf("ERROR: write scratchregister (resetc) failed!\n");
287*eaba7df7SHannes Schmelzer 
288a4d79993SHannes Schmelzer 	/* setup othbootargs for bootvx-command (vxWorks bootline) */
289a4d79993SHannes Schmelzer 	char othbootargs[128];
290a4d79993SHannes Schmelzer 	snprintf(othbootargs, sizeof(othbootargs),
291a4d79993SHannes Schmelzer 		 "u=vxWorksFTP pw=vxWorks o=0x%08x;0x%08x;0x%08x;0x%08x",
292a4d79993SHannes Schmelzer 		 (unsigned int) gd->fb_base-0x20,
293bfebc8c9SSimon Glass 		 (u32)env_get_ulong("vx_memtop", 16, gd->fb_base-0x20),
294bfebc8c9SSimon Glass 		 (u32)env_get_ulong("vx_romfsbase", 16, 0),
295bfebc8c9SSimon Glass 		 (u32)env_get_ulong("vx_romfssize", 16, 0));
296382bee57SSimon Glass 	env_set("othbootargs", othbootargs);
297a4d79993SHannes Schmelzer 	/*
298a4d79993SHannes Schmelzer 	 * reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
299a4d79993SHannes Schmelzer 	 * expect that vectors are there, original u-boot moves them to _start
300a4d79993SHannes Schmelzer 	 */
301a4d79993SHannes Schmelzer 	__asm__("ldr r0,=0x20000");
302a4d79993SHannes Schmelzer 	__asm__("mcr p15, 0, r0, c12, c0, 0"); /* Set VBAR */
303a4d79993SHannes Schmelzer 
304a4d79993SHannes Schmelzer 	return 0;
305a4d79993SHannes Schmelzer }
306a4d79993SHannes Schmelzer #endif /* CONFIG_BOARD_LATE_INIT */
307