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Searched refs:ISA_NUM_IRQS (Results 1 – 18 of 18) sorted by relevance

/openbmc/qemu/include/hw/southbridge/
H A Dpiix.h47 #if ISA_NUM_IRQS * PIIX_NUM_PIRQS > 64
53 qemu_irq isa_irqs_in[ISA_NUM_IRQS];
/openbmc/qemu/hw/isa/
H A Dpiix.c55 if (pic_irq >= ISA_NUM_IRQS) { in piix_set_pci_irq_level_internal()
69 if (pic_irq >= ISA_NUM_IRQS) { in piix_set_pci_irq_level()
96 if (irq < ISA_NUM_IRQS) { in piix_route_intx_pin_to_irq()
128 for (pic_irq = 0; pic_irq < ISA_NUM_IRQS; pic_irq++) { in piix_write_config()
323 for (i = 0; i < ISA_NUM_IRQS; i++) { in pci_piix_realize()
406 ISA_NUM_IRQS); in pci_piix_init()
H A Disa-bus.c84 assert(irqnum < ISA_NUM_IRQS); in isa_bus_get_irq()
H A Dvt82c686.c599 uint16_t irq_state[ISA_NUM_IRQS];
/openbmc/qemu/hw/rtc/
H A Dm48t59-isa.c102 if (d->isairq >= ISA_NUM_IRQS) { in m48t59_isa_realize()
103 error_setg(errp, "Maximum value for \"irq\" is: %u", ISA_NUM_IRQS - 1); in m48t59_isa_realize()
H A Dmc146818rtc.c896 if (s->isairq >= ISA_NUM_IRQS) { in rtc_realizefn()
897 error_setg(errp, "Maximum value for \"irq\" is: %u", ISA_NUM_IRQS - 1); in rtc_realizefn()
/openbmc/qemu/include/hw/ppc/
H A Dpnv_lpc.h103 int irq_to_serirq_route[ISA_NUM_IRQS];
/openbmc/qemu/hw/input/
H A Dpckbd.c864 if (isa_s->kbd_irq >= ISA_NUM_IRQS) { in i8042_realizefn()
866 ISA_NUM_IRQS - 1); in i8042_realizefn()
870 if (isa_s->mouse_irq >= ISA_NUM_IRQS) { in i8042_realizefn()
872 ISA_NUM_IRQS - 1); in i8042_realizefn()
/openbmc/qemu/include/hw/isa/
H A Disa.h11 #define ISA_NUM_IRQS 16 macro
/openbmc/qemu/include/hw/i386/
H A Dx86.h146 qemu_irq i8259_irq[ISA_NUM_IRQS];
/openbmc/qemu/hw/sparc64/
H A Dsun4u.c89 qemu_irq isa_irqs_out[ISA_NUM_IRQS];
319 s->isa_irqs_in = qemu_allocate_irqs(ebus_isa_irq_handler, s, ISA_NUM_IRQS); in ebus_realize()
322 ISA_NUM_IRQS); in ebus_realize()
/openbmc/qemu/hw/ppc/
H A Dpnv_lpc.c448 for (irq = 14; irq < ISA_NUM_IRQS; irq++) { in pnv_lpc_eval_serirq_routes()
503 for (irq = 0; irq < ISA_NUM_IRQS; irq++) { in pnv_lpc_eval_irqs()
945 irqs = qemu_allocate_irqs(handler, lpc, ISA_NUM_IRQS); in pnv_lpc_isa_create()
/openbmc/qemu/hw/i386/kvm/
H A Di8259.c139 return qemu_allocate_irqs(kvm_pic_set_irq, NULL, ISA_NUM_IRQS); in kvm_i8259_init()
/openbmc/qemu/hw/intc/
H A Di8259.c414 irq_set = g_new0(qemu_irq, ISA_NUM_IRQS); in i8259_init()
/openbmc/qemu/hw/i386/
H A Dx86-common.c456 case 0 ... ISA_NUM_IRQS - 1: in gsi_handler()
462 case ISA_NUM_IRQS ... IOAPIC_NUM_PINS - 1: in gsi_handler()
H A Dmicrovm.c255 for (i = 0; i < ISA_NUM_IRQS; i++) { in microvm_devices_init()
H A Dpc_piix.c259 for (i = 0; i < ISA_NUM_IRQS; i++) { in pc_init1()
H A Dpc.c1273 for (size_t i = 0; i < ISA_NUM_IRQS; i++) { in pc_i8259_create()