Revision tags: v9.2.0, v9.1.2, v9.1.1 |
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#
28ae3179 |
| 13-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20240913' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * s390: convert s390 virtio-ccw and CPU to three-phase reset * reset: remove
Merge tag 'pull-target-arm-20240913' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * s390: convert s390 virtio-ccw and CPU to three-phase reset * reset: remove now-unused device_class_set_parent_reset() * reset: introduce device_class_set_legacy_reset() * reset: remove unneeded transitional machinery * kvm: Use 'unsigned long' for request argument in functions wrapping ioctl() * hvf: arm: Implement and use hvf_get_physical_address_range so VMs can have larger-than-36-bit IPA spaces when the host supports this * target/arm/tcg: refine cache descriptions with a wrapper * hw/net/can/xlnx-versal-canfd: fix various bugs * MAINTAINERS: update versal, CAN maintainer entries * hw/intc/arm_gic: fix spurious level triggered interrupts
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmbkVokZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3pR5D/0ZJzJi7C0HIa4KYuBkcpZQ # M3iUa1uiZoCniXlWuKFt2rUBrmhbW30YHw5gQjnxoUO4VVqREkFi3e5nzUKRQmvP # FRm8dnuC36qwQJFhm+rQqUb8/AyqrVFnIaHhn7dBKLwRFm9+kbZ0v9x1Eq1DZk3S # mijBQRiOjrj+FRkmyNJLhylGpm+p9VRdnBjmUtN2Yw+2fPkHmUURRSUvhwCK4BB5 # AvKgMC0EIIsLJKLfrWzk/EsYC8ogrGitISzFt8iWLAqxuxtuhv1StstleD4mZMK8 # gH+ZH5tsls2IiTIKkHfcbUcA55efDrQHGDat7n1Q0EWqOjET0soES+GpS0Jj6IXK # uOnsDZ7MLFU/SbpckicLQ/JwNi3HiIfQgBVB2aJZ+cg8CGqaQCI5ZvWs7XFpUgkb # naA4IR5mdNgXJm7ttBKbWarPNcmdODqa/5YDjXdyHmMx3JD994k1y5LIi3o69TgI # rgHzU8ChZqaBDEvNa5KGtadQPnaSBP15Yqbp5rn2knVRKjDdyCdB94aWO5tZkmaO # ARFmNk6h5bhwXdXl2Hu67RS2Kd0/fHMFWsxyHAX4NYT+Vq+ZTjLdaPzwFdfA0yAz # wXWn0EAeYQ5M2xOPfDM/JYSc1THSzhpwy/CBrRjrCRZMDE+bx9BRC7pUXwquE8xF # CW1NUxkvZikQeiMzgEBbTA== # =u6u8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 13 Sep 2024 16:13:13 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20240913' of https://git.linaro.org/people/pmaydell/qemu-arm: (27 commits) hw/intc/arm_gic: fix spurious level triggered interrupts MAINTAINERS: Add my-self as CAN maintainer MAINTAINERS: Update Xilinx Versal OSPI maintainer's email address MAINTAINERS: Remove Vikram Garhwal as maintainer hw/net/can/xlnx-versal-canfd: Fix FIFO issues hw/net/can/xlnx-versal-canfd: Simplify DLC conversions hw/net/can/xlnx-versal-canfd: Fix byte ordering hw/net/can/xlnx-versal-canfd: Handle flags correctly hw/net/can/xlnx-versal-canfd: Translate CAN ID registers hw/net/can/xlnx-versal-canfd: Fix CAN FD flag check hw/net/can/xlnx-versal-canfd: Fix interrupt level target/arm/tcg: refine cache descriptions with a wrapper hvf: arm: Implement and use hvf_get_physical_address_range hvf: Split up hv_vm_create logic per arch hw/boards: Add hvf_get_physical_address_range to MachineClass kvm: Use 'unsigned long' for request argument in functions wrapping ioctl() hw/core/resettable: Remove transitional_function machinery hw/core/qdev: Simplify legacy_reset handling hw: Remove device_phases_reset() hw: Rename DeviceClass::reset field to legacy_reset ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
e3d08143 |
| 13-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw: Use device_class_set_legacy_reset() instead of opencoding
Use device_class_set_legacy_reset() instead of opencoding an assignment to DeviceClass::reset. This change was produced with: spatch --
hw: Use device_class_set_legacy_reset() instead of opencoding
Use device_class_set_legacy_reset() instead of opencoding an assignment to DeviceClass::reset. This change was produced with: spatch --macro-file scripts/cocci-macro-file.h \ --sp-file scripts/coccinelle/device-reset.cocci \ --keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240830145812.1967042-8-peter.maydell@linaro.org
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Revision tags: v9.1.0 |
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3d54cbf2 |
| 22-Feb-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'hw-misc-20240222' of https://github.com/philmd/qemu into staging
Misc HW patch queue
- Remove sysbus_add_io (Phil) - Build PPC 4xx PCI host bridges once (Phil) - Display QOM path while d
Merge tag 'hw-misc-20240222' of https://github.com/philmd/qemu into staging
Misc HW patch queue
- Remove sysbus_add_io (Phil) - Build PPC 4xx PCI host bridges once (Phil) - Display QOM path while debugging SMBus targets (Joe) - Simplify x86 PC code (Bernhard) - Remove qemu_[un]register_reset() calls in x86 PC CMOS (Peter) - Fix wiring of ICH9 LPC interrupts (Bernhard) - Split core IDE as device / bus / dma (Thomas) - Prefer QDev API over QOM for devices (Phil) - Fix invalid use of DO_UPCAST() in Leon3 (Thomas)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXXQ1IACgkQ4+MsLN6t # wN4e2xAAig55EJh/JwpdGx55rFUab3Ay22jgXrExmBir8hzhyzssY+RUj2ALRa5e # T26kxCEqiuT549FtWm/ci6kVax0QD6bqz/6/j451XB9469Z/3BDOV5rhsqF6zlr5 # BMbyC8PKnMUluG8v1ZuRjC3m2lK3ZvkVnZtj7SZUR50ssEnR32fVIziN14/OYkts # 2B24sLrnLBfvyatMRsuFqGWrcbtMdnwNpjenGfDPOTF33W1sxTQ8GSvx1RV32l69 # Yr/iCVoCl+rGxbLLP1TwqtOwzk32p8RsbIt6rWMqVMv/p5F6ezFeiOk7VHnnEJRH # e7TPxt4XeLGPARMQLT3gQh0MGIIodanSHePRBkczuNmKYTJrz+5jMu2Qg4MmMUE/ # TV0fKgdjh/edhAOHzJgZqLmNV71icl8WBjfsw2qT4ZwgJzWq7YM2/XZKkeWhk2nQ # whLxfgiU4PNJ6vHhebJNjOovCYQTK2FbXR+PvVn5FEbH4CuFr8mqkYc+vNYM9dLA # b7uMk1H8kcb5+kqfPPU2lVd1wO7uqhxYOYU2O9nYq8aw7ioLoLeEdj2IicLtrA/H # GMtyA5cYeabeRzSXF30tM2AR1uQ/e4Z7oNxW6z3GVK1NrQtKilqPgMKut8uWYvva # crJLpRQhGiY3sDrIkkCcAHzv256dZaJNLR1KPViaHOyVPZV+x2s= # =+h2O # -----END PGP SIGNATURE----- # gpg: Signature made Thu 22 Feb 2024 12:51:30 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20240222' of https://github.com/philmd/qemu: (32 commits) hw/sparc/leon3: Fix wrong usage of DO_UPCAST macro hw/ide: Stop exposing internal.h to non-IDE files hw/ide: Remove the include/hw/ide.h legacy file hw/ide: Move IDE bus related definitions to a new header ide-bus.h hw/ide: Move IDE device related definitions to ide-dev.h hw/ide: Move IDE DMA related definitions to a separate header ide-dma.h hw/ide: Split qdev.c into ide-bus.c and ide-dev.c hw/ide: Add the possibility to disable the CompactFlash device in the build hw/acpi/ich9_tco: Include missing 'migration/vmstate.h' header hw/acpi/cpu: Use CPUState typedef hw/acpi: Include missing 'qapi/qapi-types-acpi.h' generated header hw/isa/meson.build: Sort alphabetically hw/i386/pc_q35: Populate interrupt handlers before realizing LPC PCI function hw/i386/pc_sysfw: Use qdev_is_realized() instead of QOM API hw/i386/pc_sysfw: Inline pc_system_flash_create() and remove it hw/i386/pc: Confine system flash handling to pc_sysfw hw/i386/pc: Defer smbios_set_defaults() to machine_done hw/i386/pc: Merge pc_guest_info_init() into pc_machine_initfn() hw/i386/x86: Turn apic_xrupt_override into class attribute hw/i386/pc: Do pc_cmos_init_late() from pc_machine_done() ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
# Conflicts: # include/hw/i386/pc.h
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Revision tags: v8.0.0, v7.2.0, v7.0.0, v6.2.0 |
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40f27a78 |
| 05-Nov-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
hw/input/pckbd: Open-code i8042_setup_a20_line() wrapper
Since the named GPIO lines are a "public" interface to the device, we can directly call qdev_connect_gpio_out_named(), making it consistent w
hw/input/pckbd: Open-code i8042_setup_a20_line() wrapper
Since the named GPIO lines are a "public" interface to the device, we can directly call qdev_connect_gpio_out_named(), making it consistent with how the other A20 input source (port92) is wired.
Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Yanan Wang <wangyanan55@huawei.com> Message-Id: <20211218130437.1516929-6-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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d328fef9 |
| 04-Jan-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging
Mark VMStateField and VMStateDescription arrays const.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXA
Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging
Mark VMStateField and VMStateDescription arrays const.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmWPOFsdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8cCQgAnQjy3Ic1i225AElh # 0Ph3Aiw6WT9pECLoKmyroxHbTGuaEJoIXeaOhMAnowCTBLoKRR3/Ooq0DGOW+l/Z # f5PwWSkjkb+OcS+dj/kgQBu58/Gk5G8ogksqKQvci8k2okhjHmITSQDu0dtwzDZr # jVGh3gmGoat73jQyD/nAwgWFawlLkklOMR/yvnFX7EJIBepRVbkMPayoKlB+6W07 # 1kqhSwoI0vQCjhJ3Q7Q0GC4rrHK3KUq7o/25yvICf4EgPKfsaym1wAjDhdKToixl # 9T+ALZG8SiZZkBlb6l3QZ7pqtqavxYtPdZ2Gx/nMu0RRu4G33d5AVGHRrXj9qttW # 5mL7ZQ== # =uQ4C # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 Dec 2023 21:21:31 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-20231230' of https://gitlab.com/rth7680/qemu: (71 commits) docs: Constify VMstate in examples tests/unit/test-vmstate: Constify VMState util/fifo8: Constify VMState replay: Constify VMState system: Constify VMState migration: Constify VMState cpu-target: Constify VMState backends: Constify VMState audio: Constify VMState hw/misc/macio: Constify VMState hw/watchdog: Constify VMState hw/virtio: Constify VMState hw/vfio: Constify VMState hw/usb: Constify VMState hw/tpm: Constify VMState hw/timer: Constify VMState hw/ssi: Constify VMState hw/sparc: Constify VMState hw/sensor: Constify VMState hw/sd: Constify VMState ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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af0f07df |
| 20-Dec-2023 |
Richard Henderson <richard.henderson@linaro.org> |
hw/input: Constify VMState
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-34-richard.henderson@linaro.org>
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f9d9fff7 |
| 19-Jul-2022 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'qemu-sparc-20220718' of https://github.com/mcayland/qemu into staging
qemu-sparc queue
# gpg: Signature made Mon 18 Jul 2022 19:29:32 BST # gpg: using RSA key CC621AB98E82
Merge tag 'qemu-sparc-20220718' of https://github.com/mcayland/qemu into staging
qemu-sparc queue
# gpg: Signature made Mon 18 Jul 2022 19:29:32 BST # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* tag 'qemu-sparc-20220718' of https://github.com/mcayland/qemu: (40 commits) pckbd: remove legacy i8042_mm_init() function ps2: remove unused legacy ps2_mouse_init() function pckbd: don't use legacy ps2_mouse_init() function ps2: remove unused legacy ps2_kbd_init() function pckbd: don't use legacy ps2_kbd_init() function pckbd: introduce new vmstate_kbd_mmio VMStateDescription for the I8042_MMIO device lasips2: update VMStateDescription for LASIPS2 device lasips2: don't use legacy ps2_mouse_init() function lasips2: don't use legacy ps2_kbd_init() function lasips2: switch register memory region to DEVICE_BIG_ENDIAN lasips2: standardise on lp name for LASIPS2Port variables lasips2: rename LASIPS2Port parent pointer to lasips2 lasips2: switch to using port-based IRQs lasips2: add named input gpio to handle incoming port IRQs lasips2: add named input gpio to port for downstream PS2 device IRQ lasips2: introduce LASIPS2PortDeviceClass for the LASIPS2_PORT device lasips2: introduce port IRQ and new lasips2_port_init() function lasips2: rename LASIPS2Port irq field to birq lasips2: introduce lasips2_mouse_port_class_init() and lasips2_mouse_port_realize() lasips2: introduce lasips2_kbd_port_class_init() and lasips2_kbd_port_realize() ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
b704d63d |
| 12-Jul-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: remove legacy i8042_mm_init() function
This legacy function is only used during the initialisation of the MIPS magnum machine, so inline its functionality directly into mips_jazz_init() and t
pckbd: remove legacy i8042_mm_init() function
This legacy function is only used during the initialisation of the MIPS magnum machine, so inline its functionality directly into mips_jazz_init() and then remove it.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220712215251.7944-41-mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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9d1a4250 |
| 12-Jul-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: don't use legacy ps2_mouse_init() function
Instantiate the PS2 mouse device within KBDState using object_initialize_child() in i8042_initfn() and i8042_mmio_init() and realize it in i8042_rea
pckbd: don't use legacy ps2_mouse_init() function
Instantiate the PS2 mouse device within KBDState using object_initialize_child() in i8042_initfn() and i8042_mmio_init() and realize it in i8042_realizefn() and i8042_mmio_realize() accordingly.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220712215251.7944-39-mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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652fbff4 |
| 12-Jul-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: don't use legacy ps2_kbd_init() function
Instantiate the PS2 keyboard device within KBDState using object_initialize_child() in i8042_initfn() and i8042_mmio_init() and realize it in i8042_re
pckbd: don't use legacy ps2_kbd_init() function
Instantiate the PS2 keyboard device within KBDState using object_initialize_child() in i8042_initfn() and i8042_mmio_init() and realize it in i8042_realizefn() and i8042_mmio_realize() accordingly.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220712215251.7944-37-mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
abcacb20 |
| 12-Jul-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: introduce new vmstate_kbd_mmio VMStateDescription for the I8042_MMIO device
This enables us to register the VMStateDescription using the DeviceClass vmsd property rather than having to call v
pckbd: introduce new vmstate_kbd_mmio VMStateDescription for the I8042_MMIO device
This enables us to register the VMStateDescription using the DeviceClass vmsd property rather than having to call vmstate_register() from i8042_mmio_realize().
Note that this is a migration break for the MIPS magnum machine which is the only user of the I8042_MMIO device.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220712215251.7944-36-mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
097ccbbb |
| 26-Jun-2022 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'qemu-sparc-20220626' of https://github.com/mcayland/qemu into staging
qemu-sparc queue
# -----BEGIN PGP SIGNATURE----- # # iQFSBAABCgA8FiEEzGIauY6CIA2RXMnEW8LFb64PMh8FAmK4moUeHG1hcmsuY2F
Merge tag 'qemu-sparc-20220626' of https://github.com/mcayland/qemu into staging
qemu-sparc queue
# -----BEGIN PGP SIGNATURE----- # # iQFSBAABCgA8FiEEzGIauY6CIA2RXMnEW8LFb64PMh8FAmK4moUeHG1hcmsuY2F2 # ZS1heWxhbmRAaWxhbmRlLmNvLnVrAAoJEFvCxW+uDzIfaXsH/0+FT9TbHXCplB8h # gvOETq9r5UscYMqUIbRPv7eFIhhZUfq4mCzpthZHYfMA6Tag0jMqaP5ymATm6Jm/ # GgS/7Fx+14uO54Cu4NwIFylRuDt39cESrBHrVjmXmYzOXx7a040+TPxtHHwSRXiQ # Vvx5Oo0P8qQfADQe/Y9iray3JBdFMg4yejO37yrdfP58Nh2dzr9dNKw6apY8dwcv # eTVTqVbYY5AAKOjStpxb0x8dFq/WXttclbeaiSZsK1wnuqhJdUtiMY3UaAfYdMEW # kputMhTZqV/oopUY0mHmBEUK843s8bSQs2aoCSXLamGTWcrm27XNOsX0f4AYwf/y # jWBcSvg= # =0MrK # -----END PGP SIGNATURE----- # gpg: Signature made Sun 26 Jun 2022 11:12:29 PM +0530 # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* tag 'qemu-sparc-20220626' of https://github.com/mcayland/qemu: (55 commits) artist: set memory region owners for buffers to the artist device ps2: remove update_irq() function and update_arg parameter pckbd: add QEMU interface comment for I8042 device pckbd: switch I8042 device from update_irq() function to PS2 device gpio pckbd: add i8042_reset() function to I8042 device pckbd: add QEMU interface comment for I8042_MMIO device pckbd: switch I8042_MMIO device from update_irq() function to PS2 device gpio lasips2: add QEMU interface comment lasips2: switch over from update_irq() function to PS2 device gpio lasips2: use sysbus IRQ for output IRQ lasips2: implement lasips2_realize() lasips2: add base property lasips2: move initialisation of PS2 ports from lasi_initfn() to lasi_init() lasips2: move mapping of LASIPS2 registers to HPPA machine lasips2: implement lasips2_init() function lasips2: rename lasips2_init() to lasips2_initfn() and update it to return the LASIPS2 device lasips2: move lasips2 QOM types from lasips2.c to lasips2.h lasips2: QOMify LASIPS2State pl050: add QEMU interface comment pl050: switch over from update_irq() function to PS2 device gpio ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
7227de94 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
ps2: remove update_irq() function and update_arg parameter
Now that all the PS2 devices have been converted to use GPIOs the update_irq() callback function and the update_arg parameter can be remove
ps2: remove update_irq() function and update_arg parameter
Now that all the PS2 devices have been converted to use GPIOs the update_irq() callback function and the update_arg parameter can be removed.
This allows these arguments to be completely removed from ps2_kbd_init() and ps2_mouse_init(), along with the transitional logic that was added to ps2_raise_irq() and ps2_lower_irq().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-55-mark.cave-ayland@ilande.co.uk>
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6eb252d5 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: switch I8042 device from update_irq() function to PS2 device gpio
Define a new qdev input gpio for handling incoming PS2 IRQs, and then wire up the PS2 keyboard and mouse devices to use it. A
pckbd: switch I8042 device from update_irq() function to PS2 device gpio
Define a new qdev input gpio for handling incoming PS2 IRQs, and then wire up the PS2 keyboard and mouse devices to use it. At the same time set update_irq() and update_arg to NULL in ps2_kbd_init() and ps2_mouse_init() to ensure that any accidental attempt to use the legacy update_irq() function will cause a NULL pointer dereference.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-53-mark.cave-ayland@ilande.co.uk>
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55870d6f |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: add i8042_reset() function to I8042 device
This means that it is no longer necessary to call qemu_register_reset() manually within i8042_realizefn().
Signed-off-by: Mark Cave-Ayland <mark.ca
pckbd: add i8042_reset() function to I8042 device
This means that it is no longer necessary to call qemu_register_reset() manually within i8042_realizefn().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-52-mark.cave-ayland@ilande.co.uk>
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cb663a81 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: switch I8042_MMIO device from update_irq() function to PS2 device gpio
Define a new qdev input gpio for handling incoming PS2 IRQs, and then wire up the PS2 keyboard and mouse devices to use
pckbd: switch I8042_MMIO device from update_irq() function to PS2 device gpio
Define a new qdev input gpio for handling incoming PS2 IRQs, and then wire up the PS2 keyboard and mouse devices to use it. At the same time set update_irq() and update_arg to NULL in ps2_kbd_init() and ps2_mouse_init() to ensure that any accidental attempt to use the legacy update_irq() function will cause a NULL pointer dereference.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-50-mark.cave-ayland@ilande.co.uk>
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c2b17479 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: replace irq_kbd and irq_mouse with qemu_irq array in KBDState
This allows both IRQs to be declared as a single qdev gpio array.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk
pckbd: replace irq_kbd and irq_mouse with qemu_irq array in KBDState
This allows both IRQs to be declared as a single qdev gpio array.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-36-mark.cave-ayland@ilande.co.uk>
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488d1537 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: move ps2_kbd_init() and ps2_mouse_init() to i8042_mmio_realize()
Move ps2_kbd_init() and ps2_mouse_init() from i8042_mm_init() to i8042_mmio_realize() to further reduce the initialisation log
pckbd: move ps2_kbd_init() and ps2_mouse_init() to i8042_mmio_realize()
Move ps2_kbd_init() and ps2_mouse_init() from i8042_mm_init() to i8042_mmio_realize() to further reduce the initialisation logic done in i8042_mm_init().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-31-mark.cave-ayland@ilande.co.uk>
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75877e93 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: more vmstate_register() from i8042_mm_init() to i8042_mmio_realize()
Note in this case it is not possible to register a (new) VMStateDescription in the DeviceClass without breaking migration
pckbd: more vmstate_register() from i8042_mm_init() to i8042_mmio_realize()
Note in this case it is not possible to register a (new) VMStateDescription in the DeviceClass without breaking migration compatibility for the MIPS magnum machine.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-30-mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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01d924dc |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: move mapping of I8042_MMIO registers to MIPS magnum machine
Now that the register memory region is exposed as a SysBus memory region, move the mapping of the I8042_MMIO registers from i8042_m
pckbd: move mapping of I8042_MMIO registers to MIPS magnum machine
Now that the register memory region is exposed as a SysBus memory region, move the mapping of the I8042_MMIO registers from i8042_mm_init() to the MIPS magnum machine (which is its only user).
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-29-mark.cave-ayland@ilande.co.uk>
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903dd0e4 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: alter i8042_mm_init() to return a I8042_MMIO device
This exposes the I8042_MMIO device to the caller to allow the register memory region to be mapped outside of i8042_mm_init().
Signed-off-b
pckbd: alter i8042_mm_init() to return a I8042_MMIO device
This exposes the I8042_MMIO device to the caller to allow the register memory region to be mapped outside of i8042_mm_init().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-28-mark.cave-ayland@ilande.co.uk>
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47fc7415 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: implement i8042_mmio_init() function
This enables use to set the required value of extended_state directly during device init rather than in i8042_mm_init().
Signed-off-by: Mark Cave-Ayland
pckbd: implement i8042_mmio_init() function
This enables use to set the required value of extended_state directly during device init rather than in i8042_mm_init().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-27-mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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f4de68d1 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: implement i8042_mmio_realize() function
Move the initialisation of the register memory region to the I8042_MMIO device realize function and expose it using sysbus_init_mmio().
Signed-off-by:
pckbd: implement i8042_mmio_realize() function
Move the initialisation of the register memory region to the I8042_MMIO device realize function and expose it using sysbus_init_mmio().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-26-mark.cave-ayland@ilande.co.uk>
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7b9fff29 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: add size qdev property to I8042_MMIO device
This will soon be used to set the size of the register memory region using a qdev property.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilan
pckbd: add size qdev property to I8042_MMIO device
This will soon be used to set the size of the register memory region using a qdev property.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-25-mark.cave-ayland@ilande.co.uk>
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d4f5b4d8 |
| 24-Jun-2022 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
pckbd: add mask qdev property to I8042_MMIO device
This allows the KBDState mask value to be set using a qdev property rather than directly in i8042_mm_init().
Signed-off-by: Mark Cave-Ayland <mark
pckbd: add mask qdev property to I8042_MMIO device
This allows the KBDState mask value to be set using a qdev property rather than directly in i8042_mm_init().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-24-mark.cave-ayland@ilande.co.uk>
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